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[axge] Add driver for ASIX 10/100/1000 USB Ethernet NICs

Add driver for the AX88178A (USB2) and AX88179 (USB3) 10/100/1000
Ethernet NICs.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 8 years ago
parent
commit
ee5dfb75aa
3 changed files with 973 additions and 0 deletions
  1. 798
    0
      src/drivers/net/axge.c
  2. 174
    0
      src/drivers/net/axge.h
  3. 1
    0
      src/include/ipxe/errfile.h

+ 798
- 0
src/drivers/net/axge.c View File

@@ -0,0 +1,798 @@
1
+/*
2
+ * Copyright (C) 2016 Michael Brown <mbrown@fensystems.co.uk>.
3
+ *
4
+ * This program is free software; you can redistribute it and/or
5
+ * modify it under the terms of the GNU General Public License as
6
+ * published by the Free Software Foundation; either version 2 of the
7
+ * License, or (at your option) any later version.
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+ *
9
+ * This program is distributed in the hope that it will be useful, but
10
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
11
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12
+ * General Public License for more details.
13
+ *
14
+ * You should have received a copy of the GNU General Public License
15
+ * along with this program; if not, write to the Free Software
16
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17
+ * 02110-1301, USA.
18
+ *
19
+ * You can also choose to distribute this program under the terms of
20
+ * the Unmodified Binary Distribution Licence (as given in the file
21
+ * COPYING.UBDL), provided that you have satisfied its requirements.
22
+ */
23
+
24
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
25
+
26
+#include <stdint.h>
27
+#include <string.h>
28
+#include <unistd.h>
29
+#include <errno.h>
30
+#include <ipxe/netdevice.h>
31
+#include <ipxe/ethernet.h>
32
+#include <ipxe/if_ether.h>
33
+#include <ipxe/profile.h>
34
+#include <ipxe/usb.h>
35
+#include "axge.h"
36
+
37
+/** @file
38
+ *
39
+ * Asix 10/100/1000 USB Ethernet driver
40
+ *
41
+ * Large chunks of functionality are undocumented in the available
42
+ * datasheets.  The gaps are deduced from combinations of the Linux
43
+ * driver, the FreeBSD driver, and experimentation with the hardware.
44
+ */
45
+
46
+/** Interrupt completion profiler */
47
+static struct profiler axge_intr_profiler __profiler =
48
+	{ .name = "axge.intr" };
49
+
50
+/** Bulk IN completion profiler */
51
+static struct profiler axge_in_profiler __profiler =
52
+	{ .name = "axge.in" };
53
+
54
+/** Bulk OUT profiler */
55
+static struct profiler axge_out_profiler __profiler =
56
+	{ .name = "axge.out" };
57
+
58
+/** Default bulk IN configuration
59
+ *
60
+ * The Linux and FreeBSD drivers have set of magic constants which are
61
+ * chosen based on both the Ethernet and USB link speeds.
62
+ *
63
+ * Experimentation shows that setting the "timer" value to zero seems
64
+ * to prevent the device from ever coalescing multiple packets into a
65
+ * single bulk IN transfer.  This allows us to get away with using a
66
+ * 2kB receive I/O buffer and a zerocopy receive path.
67
+ */
68
+static struct axge_bulk_in_control axge_bicr = {
69
+	.ctrl = 7,
70
+	.timer = cpu_to_le16 ( 0 ),
71
+	.size = 0,
72
+	.ifg = 0,
73
+};
74
+
75
+/******************************************************************************
76
+ *
77
+ * Register access
78
+ *
79
+ ******************************************************************************
80
+ */
81
+
82
+/**
83
+ * Read register
84
+ *
85
+ * @v asix		AXGE device
86
+ * @v offset		Register offset
87
+ * @v data		Data buffer
88
+ * @v len		Length of data
89
+ * @ret rc		Return status code
90
+ */
91
+static inline int axge_read_register ( struct axge_device *axge,
92
+				       unsigned int offset, void *data,
93
+				       size_t len ) {
94
+
95
+	return usb_control ( axge->usb, AXGE_READ_MAC_REGISTER,
96
+			     offset, len, data, len );
97
+}
98
+
99
+/**
100
+ * Read one-byte register
101
+ *
102
+ * @v asix		AXGE device
103
+ * @v offset		Register offset
104
+ * @v value		Value to fill in
105
+ * @ret rc		Return status code
106
+ */
107
+static inline int axge_read_byte ( struct axge_device *axge,
108
+				   unsigned int offset, uint8_t *value ) {
109
+
110
+	return axge_read_register ( axge, offset, value, sizeof ( *value ) );
111
+}
112
+
113
+/**
114
+ * Read two-byte register
115
+ *
116
+ * @v asix		AXGE device
117
+ * @v offset		Register offset
118
+ * @v value		Value to fill in
119
+ * @ret rc		Return status code
120
+ */
121
+static inline int axge_read_word ( struct axge_device *axge,
122
+				   unsigned int offset, uint16_t *value ) {
123
+
124
+	return axge_read_register ( axge, offset, value, sizeof ( *value ) );
125
+}
126
+
127
+/**
128
+ * Read four-byte register
129
+ *
130
+ * @v asix		AXGE device
131
+ * @v offset		Register offset
132
+ * @v value		Value to fill in
133
+ * @ret rc		Return status code
134
+ */
135
+static inline int axge_read_dword ( struct axge_device *axge,
136
+				    unsigned int offset, uint32_t *value ) {
137
+
138
+	return axge_read_register ( axge, offset, value, sizeof ( *value ) );
139
+}
140
+
141
+/**
142
+ * Write register
143
+ *
144
+ * @v asix		AXGE device
145
+ * @v offset		Register offset
146
+ * @v data		Data buffer
147
+ * @v len		Length of data
148
+ * @ret rc		Return status code
149
+ */
150
+static inline int axge_write_register ( struct axge_device *axge,
151
+					unsigned int offset, void *data,
152
+					size_t len ) {
153
+
154
+	return usb_control ( axge->usb, AXGE_WRITE_MAC_REGISTER,
155
+			     offset, len, data, len );
156
+}
157
+
158
+/**
159
+ * Write one-byte register
160
+ *
161
+ * @v asix		AXGE device
162
+ * @v offset		Register offset
163
+ * @v value		Value
164
+ * @ret rc		Return status code
165
+ */
166
+static inline int axge_write_byte ( struct axge_device *axge,
167
+				    unsigned int offset, uint8_t value ) {
168
+
169
+	return axge_write_register ( axge, offset, &value, sizeof ( value ));
170
+}
171
+
172
+/**
173
+ * Write two-byte register
174
+ *
175
+ * @v asix		AXGE device
176
+ * @v offset		Register offset
177
+ * @v value		Value
178
+ * @ret rc		Return status code
179
+ */
180
+static inline int axge_write_word ( struct axge_device *axge,
181
+				    unsigned int offset, uint16_t value ) {
182
+
183
+	return axge_write_register ( axge, offset, &value, sizeof ( value ));
184
+}
185
+
186
+/**
187
+ * Write one-byte register
188
+ *
189
+ * @v asix		AXGE device
190
+ * @v offset		Register offset
191
+ * @v value		Value
192
+ * @ret rc		Return status code
193
+ */
194
+static inline int axge_write_dword ( struct axge_device *axge,
195
+				     unsigned int offset, uint32_t value ) {
196
+
197
+	return axge_write_register ( axge, offset, &value, sizeof ( value ));
198
+}
199
+
200
+/******************************************************************************
201
+ *
202
+ * Link status
203
+ *
204
+ ******************************************************************************
205
+ */
206
+
207
+/**
208
+ * Get link status
209
+ *
210
+ * @v asix		AXGE device
211
+ * @ret rc		Return status code
212
+ */
213
+static int axge_check_link ( struct axge_device *axge ) {
214
+	struct net_device *netdev = axge->netdev;
215
+	uint8_t plsr;
216
+	int rc;
217
+
218
+	/* Read physical link status register */
219
+	if ( ( rc = axge_read_byte ( axge, AXGE_PLSR, &plsr ) ) != 0 ) {
220
+		DBGC ( axge, "AXGE %p could not read PLSR: %s\n",
221
+		       axge, strerror ( rc ) );
222
+		return rc;
223
+	}
224
+
225
+	/* Update link status */
226
+	if ( plsr & AXGE_PLSR_EPHY_ANY ) {
227
+		DBGC ( axge, "AXGE %p link up (PLSR %02x)\n", axge, plsr );
228
+		netdev_link_up ( netdev );
229
+	} else {
230
+		DBGC ( axge, "AXGE %p link down (PLSR %02x)\n", axge, plsr );
231
+		netdev_link_down ( netdev );
232
+	}
233
+
234
+	return 0;
235
+}
236
+
237
+/******************************************************************************
238
+ *
239
+ * AXGE communications interface
240
+ *
241
+ ******************************************************************************
242
+ */
243
+
244
+/**
245
+ * Complete interrupt transfer
246
+ *
247
+ * @v ep		USB endpoint
248
+ * @v iobuf		I/O buffer
249
+ * @v rc		Completion status code
250
+ */
251
+static void axge_intr_complete ( struct usb_endpoint *ep,
252
+				 struct io_buffer *iobuf, int rc ) {
253
+	struct axge_device *axge = container_of ( ep, struct axge_device,
254
+						  usbnet.intr );
255
+	struct net_device *netdev = axge->netdev;
256
+	struct axge_interrupt *intr;
257
+	size_t len = iob_len ( iobuf );
258
+	unsigned int link_ok;
259
+
260
+	/* Profile completions */
261
+	profile_start ( &axge_intr_profiler );
262
+
263
+	/* Ignore packets cancelled when the endpoint closes */
264
+	if ( ! ep->open )
265
+		goto ignore;
266
+
267
+	/* Drop packets with errors */
268
+	if ( rc != 0 ) {
269
+		DBGC ( axge, "AXGE %p interrupt failed: %s\n",
270
+		       axge, strerror ( rc ) );
271
+		DBGC_HDA ( axge, 0, iobuf->data, iob_len ( iobuf ) );
272
+		goto error;
273
+	}
274
+
275
+	/* Extract message header */
276
+	if ( len < sizeof ( *intr ) ) {
277
+		DBGC ( axge, "AXGE %p underlength interrupt:\n", axge );
278
+		DBGC_HDA ( axge, 0, iobuf->data, iob_len ( iobuf ) );
279
+		rc = -EINVAL;
280
+		goto error;
281
+	}
282
+	intr = iobuf->data;
283
+
284
+	/* Check magic signature */
285
+	if ( intr->magic != cpu_to_le16 ( AXGE_INTR_MAGIC ) ) {
286
+		DBGC ( axge, "AXGE %p malformed interrupt:\n", axge );
287
+		DBGC_HDA ( axge, 0, iobuf->data, iob_len ( iobuf ) );
288
+		rc = -EINVAL;
289
+		goto error;
290
+	}
291
+
292
+	/* Extract link status */
293
+	link_ok = ( intr->link & cpu_to_le16 ( AXGE_INTR_LINK_PPLS ) );
294
+	if ( link_ok && ! netdev_link_ok ( netdev ) ) {
295
+		DBGC ( axge, "AXGE %p link up\n", axge );
296
+		netdev_link_up ( netdev );
297
+	} else if ( netdev_link_ok ( netdev ) && ! link_ok ) {
298
+		DBGC ( axge, "AXGE %p link down\n", axge );
299
+		netdev_link_down ( netdev );
300
+	}
301
+
302
+	/* Free I/O buffer */
303
+	free_iob ( iobuf );
304
+	profile_stop ( &axge_intr_profiler );
305
+
306
+	return;
307
+
308
+ error:
309
+	netdev_rx_err ( netdev, iob_disown ( iobuf ), rc );
310
+ ignore:
311
+	free_iob ( iobuf );
312
+	return;
313
+}
314
+
315
+/** Interrupt endpoint operations */
316
+static struct usb_endpoint_driver_operations axge_intr_operations = {
317
+	.complete = axge_intr_complete,
318
+};
319
+
320
+/******************************************************************************
321
+ *
322
+ * AXGE data interface
323
+ *
324
+ ******************************************************************************
325
+ */
326
+
327
+/**
328
+ * Complete bulk IN transfer
329
+ *
330
+ * @v ep		USB endpoint
331
+ * @v iobuf		I/O buffer
332
+ * @v rc		Completion status code
333
+ */
334
+static void axge_in_complete ( struct usb_endpoint *ep,
335
+			       struct io_buffer *iobuf, int rc ) {
336
+	struct axge_device *axge = container_of ( ep, struct axge_device,
337
+						  usbnet.in );
338
+	struct net_device *netdev = axge->netdev;
339
+	struct axge_rx_footer *ftr;
340
+	struct axge_rx_descriptor *desc;
341
+	struct io_buffer *pkt;
342
+	unsigned int count;
343
+	unsigned int offset;
344
+	size_t len;
345
+	size_t padded_len;
346
+
347
+	/* Profile receive completions */
348
+	profile_start ( &axge_in_profiler );
349
+
350
+	/* Ignore packets cancelled when the endpoint closes */
351
+	if ( ! ep->open )
352
+		goto ignore;
353
+
354
+	/* Record USB errors against the network device */
355
+	if ( rc != 0 ) {
356
+		DBGC ( axge, "AXGE %p bulk IN failed: %s\n",
357
+		       axge, strerror ( rc ) );
358
+		goto error;
359
+	}
360
+
361
+	/* Sanity check */
362
+	if ( iob_len ( iobuf ) < sizeof ( *ftr ) ) {
363
+		DBGC ( axge, "AXGE %p underlength bulk IN:\n", axge );
364
+		DBGC_HDA ( axge, 0, iobuf->data, iob_len ( iobuf ) );
365
+		rc = -EINVAL;
366
+		goto error;
367
+	}
368
+
369
+	/* Parse ftr, strip ftr and descriptors */
370
+	iob_unput ( iobuf, sizeof ( *ftr ) );
371
+	ftr = ( iobuf->data + iob_len ( iobuf ) );
372
+	count = le16_to_cpu ( ftr->count );
373
+	if ( count == 0 ) {
374
+		DBGC ( axge, "AXGE %p zero-packet bulk IN:\n", axge );
375
+		DBGC_HDA ( axge, 0, iobuf->data, iob_len ( iobuf ) );
376
+		goto ignore;
377
+	}
378
+	offset = le16_to_cpu ( ftr->offset );
379
+	if ( ( iob_len ( iobuf ) < offset ) ||
380
+	     ( ( iob_len ( iobuf ) - offset ) < ( count * sizeof ( *desc ) ) )){
381
+		DBGC ( axge, "AXGE %p malformed bulk IN footer:\n", axge );
382
+		DBGC_HDA ( axge, 0, iobuf->data, iob_len ( iobuf ) );
383
+		rc = -EINVAL;
384
+		goto error;
385
+	}
386
+	desc = ( iobuf->data + offset );
387
+	iob_unput ( iobuf, ( iob_len ( iobuf ) - offset ) );
388
+
389
+	/* Process packets */
390
+	for ( ; count-- ; desc++ ) {
391
+
392
+		/* Parse descriptor */
393
+		len = ( le16_to_cpu ( desc->len_flags ) & AXGE_RX_LEN_MASK );
394
+		padded_len = ( ( len + AXGE_RX_LEN_PAD_ALIGN - 1 ) &
395
+			       ~( AXGE_RX_LEN_PAD_ALIGN - 1 ) );
396
+		if ( iob_len ( iobuf ) < padded_len ) {
397
+			DBGC ( axge, "AXGE %p malformed bulk IN descriptor:\n",
398
+			       axge );
399
+			DBGC_HDA ( axge, 0, iobuf->data, iob_len ( iobuf ) );
400
+			rc = -EINVAL;
401
+			goto error;
402
+		}
403
+
404
+		/* Check for previous dropped packets */
405
+		if ( desc->len_flags & cpu_to_le16 ( AXGE_RX_CRC_ERROR ) )
406
+			netdev_rx_err ( netdev, NULL, -EIO );
407
+		if ( desc->len_flags & cpu_to_le16 ( AXGE_RX_DROP_ERROR ) )
408
+			netdev_rx_err ( netdev, NULL, -ENOBUFS );
409
+
410
+		/* Allocate new I/O buffer, if applicable */
411
+		if ( count ) {
412
+
413
+			/* More packets remain: allocate a new buffer */
414
+			pkt = alloc_iob ( AXGE_IN_RESERVE + len );
415
+			if ( ! pkt ) {
416
+				/* Record error and continue */
417
+				netdev_rx_err ( netdev, NULL, -ENOMEM );
418
+				iob_pull ( iobuf, padded_len );
419
+				continue;
420
+			}
421
+			iob_reserve ( pkt, AXGE_IN_RESERVE );
422
+			memcpy ( iob_put ( pkt, len ), iobuf->data, len );
423
+			iob_pull ( iobuf, padded_len );
424
+
425
+		} else {
426
+
427
+			/* This is the last (or only) packet: use this buffer */
428
+			iob_unput ( iobuf, ( padded_len - len ) );
429
+			pkt = iob_disown ( iobuf );
430
+		}
431
+
432
+		/* Hand off to network stack */
433
+		netdev_rx ( netdev, iob_disown ( pkt ) );
434
+	}
435
+
436
+	assert ( iobuf == NULL );
437
+	profile_stop ( &axge_in_profiler );
438
+	return;
439
+
440
+ error:
441
+	netdev_rx_err ( netdev, iob_disown ( iobuf ), rc );
442
+ ignore:
443
+	free_iob ( iobuf );
444
+}
445
+
446
+/** Bulk IN endpoint operations */
447
+static struct usb_endpoint_driver_operations axge_in_operations = {
448
+	.complete = axge_in_complete,
449
+};
450
+
451
+/**
452
+ * Transmit packet
453
+ *
454
+ * @v asix		AXGE device
455
+ * @v iobuf		I/O buffer
456
+ * @ret rc		Return status code
457
+ */
458
+static int axge_out_transmit ( struct axge_device *axge,
459
+			       struct io_buffer *iobuf ) {
460
+	struct axge_tx_header *hdr;
461
+	size_t len = iob_len ( iobuf );
462
+	int rc;
463
+
464
+	/* Profile transmissions */
465
+	profile_start ( &axge_out_profiler );
466
+
467
+	/* Prepend header */
468
+	if ( ( rc = iob_ensure_headroom ( iobuf, sizeof ( *hdr ) ) ) != 0 )
469
+		return rc;
470
+	hdr = iob_push ( iobuf, sizeof ( *hdr ) );
471
+	hdr->len = cpu_to_le32 ( len );
472
+	hdr->wtf = 0;
473
+
474
+	/* Enqueue I/O buffer */
475
+	if ( ( rc = usb_stream ( &axge->usbnet.out, iobuf, 0 ) ) != 0 )
476
+		return rc;
477
+
478
+	profile_stop ( &axge_out_profiler );
479
+	return 0;
480
+}
481
+
482
+/**
483
+ * Complete bulk OUT transfer
484
+ *
485
+ * @v ep		USB endpoint
486
+ * @v iobuf		I/O buffer
487
+ * @v rc		Completion status code
488
+ */
489
+static void axge_out_complete ( struct usb_endpoint *ep,
490
+				struct io_buffer *iobuf, int rc ) {
491
+	struct axge_device *axge = container_of ( ep, struct axge_device,
492
+						  usbnet.out );
493
+	struct net_device *netdev = axge->netdev;
494
+
495
+	/* Report TX completion */
496
+	netdev_tx_complete_err ( netdev, iobuf, rc );
497
+}
498
+
499
+/** Bulk OUT endpoint operations */
500
+static struct usb_endpoint_driver_operations axge_out_operations = {
501
+	.complete = axge_out_complete,
502
+};
503
+
504
+/******************************************************************************
505
+ *
506
+ * Network device interface
507
+ *
508
+ ******************************************************************************
509
+ */
510
+
511
+/**
512
+ * Open network device
513
+ *
514
+ * @v netdev		Network device
515
+ * @ret rc		Return status code
516
+ */
517
+static int axge_open ( struct net_device *netdev ) {
518
+	struct axge_device *axge = netdev->priv;
519
+	uint16_t rcr;
520
+	int rc;
521
+
522
+	/* Open USB network device */
523
+	if ( ( rc = usbnet_open ( &axge->usbnet ) ) != 0 ) {
524
+		DBGC ( axge, "AXGE %p could not open: %s\n",
525
+		       axge, strerror ( rc ) );
526
+		goto err_open;
527
+	}
528
+
529
+	/* Set MAC address */
530
+	if ( ( rc = axge_write_register ( axge, AXGE_NIDR,
531
+					  netdev->ll_addr, ETH_ALEN ) ) !=0){
532
+		DBGC ( axge, "AXGE %p could not set MAC address: %s\n",
533
+		       axge, strerror ( rc ) );
534
+		goto err_write_mac;
535
+	}
536
+
537
+	/* Enable receiver */
538
+	rcr = cpu_to_le16 ( AXGE_RCR_PRO | AXGE_RCR_AMALL |
539
+			    AXGE_RCR_AB | AXGE_RCR_SO );
540
+	if ( ( rc = axge_write_word ( axge, AXGE_RCR, rcr ) ) != 0 ) {
541
+		DBGC ( axge, "AXGE %p could not write RCR: %s\n",
542
+		       axge, strerror ( rc ) );
543
+		goto err_write_rcr;
544
+	}
545
+
546
+	/* Update link status */
547
+	axge_check_link ( axge );
548
+
549
+	return 0;
550
+
551
+	axge_write_word ( axge, AXGE_RCR, 0 );
552
+ err_write_rcr:
553
+ err_write_mac:
554
+	usbnet_close ( &axge->usbnet );
555
+ err_open:
556
+	return rc;
557
+}
558
+
559
+/**
560
+ * Close network device
561
+ *
562
+ * @v netdev		Network device
563
+ */
564
+static void axge_close ( struct net_device *netdev ) {
565
+	struct axge_device *axge = netdev->priv;
566
+
567
+	/* Disable receiver */
568
+	axge_write_word ( axge, AXGE_RCR, 0 );
569
+
570
+	/* Close USB network device */
571
+	usbnet_close ( &axge->usbnet );
572
+}
573
+
574
+/**
575
+ * Transmit packet
576
+ *
577
+ * @v netdev		Network device
578
+ * @v iobuf		I/O buffer
579
+ * @ret rc		Return status code
580
+ */
581
+static int axge_transmit ( struct net_device *netdev,
582
+			   struct io_buffer *iobuf ) {
583
+	struct axge_device *axge = netdev->priv;
584
+	int rc;
585
+
586
+	/* Transmit packet */
587
+	if ( ( rc = axge_out_transmit ( axge, iobuf ) ) != 0 )
588
+		return rc;
589
+
590
+	return 0;
591
+}
592
+
593
+/**
594
+ * Poll for completed and received packets
595
+ *
596
+ * @v netdev		Network device
597
+ */
598
+static void axge_poll ( struct net_device *netdev ) {
599
+	struct axge_device *axge = netdev->priv;
600
+	int rc;
601
+
602
+	/* Poll USB bus */
603
+	usb_poll ( axge->bus );
604
+
605
+	/* Refill endpoints */
606
+	if ( ( rc = usbnet_refill ( &axge->usbnet ) ) != 0 )
607
+		netdev_rx_err ( netdev, NULL, rc );
608
+}
609
+
610
+/** AXGE network device operations */
611
+static struct net_device_operations axge_operations = {
612
+	.open		= axge_open,
613
+	.close		= axge_close,
614
+	.transmit	= axge_transmit,
615
+	.poll		= axge_poll,
616
+};
617
+
618
+/******************************************************************************
619
+ *
620
+ * USB interface
621
+ *
622
+ ******************************************************************************
623
+ */
624
+
625
+/**
626
+ * Probe device
627
+ *
628
+ * @v func		USB function
629
+ * @v config		Configuration descriptor
630
+ * @ret rc		Return status code
631
+ */
632
+static int axge_probe ( struct usb_function *func,
633
+			struct usb_configuration_descriptor *config ) {
634
+	struct usb_device *usb = func->usb;
635
+	struct net_device *netdev;
636
+	struct axge_device *axge;
637
+	uint16_t epprcr;
638
+	uint16_t msr;
639
+	uint8_t csr;
640
+	int rc;
641
+
642
+	/* Allocate and initialise structure */
643
+	netdev = alloc_etherdev ( sizeof ( *axge ) );
644
+	if ( ! netdev ) {
645
+		rc = -ENOMEM;
646
+		goto err_alloc;
647
+	}
648
+	netdev_init ( netdev, &axge_operations );
649
+	netdev->dev = &func->dev;
650
+	axge = netdev->priv;
651
+	memset ( axge, 0, sizeof ( *axge ) );
652
+	axge->usb = usb;
653
+	axge->bus = usb->port->hub->bus;
654
+	axge->netdev = netdev;
655
+	usbnet_init ( &axge->usbnet, func, &axge_intr_operations,
656
+		      &axge_in_operations, &axge_out_operations );
657
+	usb_refill_init ( &axge->usbnet.intr, 0, 0, AXGE_INTR_MAX_FILL );
658
+	usb_refill_init ( &axge->usbnet.in, AXGE_IN_RESERVE,
659
+			  AXGE_IN_MTU, AXGE_IN_MAX_FILL );
660
+	DBGC ( axge, "AXGE %p on %s\n", axge, func->name );
661
+
662
+	/* Describe USB network device */
663
+	if ( ( rc = usbnet_describe ( &axge->usbnet, config ) ) != 0 ) {
664
+		DBGC ( axge, "AXGE %p could not describe: %s\n",
665
+		       axge, strerror ( rc ) );
666
+		goto err_describe;
667
+	}
668
+
669
+	/* Fetch MAC address */
670
+	if ( ( rc = axge_read_register ( axge, AXGE_NIDR, netdev->hw_addr,
671
+					 ETH_ALEN ) ) != 0 ) {
672
+		DBGC ( axge, "AXGE %p could not fetch MAC address: %s\n",
673
+		       axge, strerror ( rc ) );
674
+		goto err_read_mac;
675
+	}
676
+
677
+	/* Power up PHY */
678
+	if ( ( rc = axge_write_word ( axge, AXGE_EPPRCR, 0 ) ) != 0 ) {
679
+		DBGC ( axge, "AXGE %p could not write EPPRCR: %s\n",
680
+		       axge, strerror ( rc ) );
681
+		goto err_write_epprcr_off;
682
+	}
683
+	epprcr = cpu_to_le16 ( AXGE_EPPRCR_IPRL );
684
+	if ( ( rc = axge_write_word ( axge, AXGE_EPPRCR, epprcr ) ) != 0){
685
+		DBGC ( axge, "AXGE %p could not write EPPRCR: %s\n",
686
+		       axge, strerror ( rc ) );
687
+		goto err_write_epprcr_on;
688
+	}
689
+	mdelay ( AXGE_EPPRCR_DELAY_MS );
690
+
691
+	/* Select clocks */
692
+	csr = ( AXGE_CSR_BCS | AXGE_CSR_ACS );
693
+	if ( ( rc = axge_write_byte ( axge, AXGE_CSR, csr ) ) != 0){
694
+		DBGC ( axge, "AXGE %p could not write CSR: %s\n",
695
+		       axge, strerror ( rc ) );
696
+		goto err_write_csr;
697
+	}
698
+	mdelay ( AXGE_CSR_DELAY_MS );
699
+
700
+	/* Configure bulk IN pipeline */
701
+	if ( ( rc = axge_write_register ( axge, AXGE_BICR, &axge_bicr,
702
+					  sizeof ( axge_bicr ) ) ) != 0 ){
703
+		DBGC ( axge, "AXGE %p could not write BICR: %s\n",
704
+		       axge, strerror ( rc ) );
705
+		goto err_write_bicr;
706
+	}
707
+
708
+	/* Set medium status */
709
+	msr = cpu_to_le16 ( AXGE_MSR_GM | AXGE_MSR_FD | AXGE_MSR_RFC |
710
+			    AXGE_MSR_TFC | AXGE_MSR_RE );
711
+	if ( ( rc = axge_write_word ( axge, AXGE_MSR, msr ) ) != 0 ) {
712
+		DBGC ( axge, "AXGE %p could not write MSR: %s\n",
713
+		       axge, strerror ( rc ) );
714
+		goto err_write_msr;
715
+	}
716
+
717
+	/* Register network device */
718
+	if ( ( rc = register_netdev ( netdev ) ) != 0 )
719
+		goto err_register;
720
+
721
+	/* Update link status */
722
+	axge_check_link ( axge );
723
+
724
+	usb_func_set_drvdata ( func, axge );
725
+	return 0;
726
+
727
+	unregister_netdev ( netdev );
728
+ err_register:
729
+ err_write_msr:
730
+ err_write_bicr:
731
+ err_write_csr:
732
+ err_write_epprcr_on:
733
+ err_write_epprcr_off:
734
+ err_read_mac:
735
+ err_describe:
736
+	netdev_nullify ( netdev );
737
+	netdev_put ( netdev );
738
+ err_alloc:
739
+	return rc;
740
+}
741
+
742
+/**
743
+ * Remove device
744
+ *
745
+ * @v func		USB function
746
+ */
747
+static void axge_remove ( struct usb_function *func ) {
748
+	struct axge_device *axge = usb_func_get_drvdata ( func );
749
+	struct net_device *netdev = axge->netdev;
750
+
751
+	unregister_netdev ( netdev );
752
+	netdev_nullify ( netdev );
753
+	netdev_put ( netdev );
754
+}
755
+
756
+/** AXGE device IDs */
757
+static struct usb_device_id axge_ids[] = {
758
+	{
759
+		.name = "ax88179",
760
+		.vendor = 0x0b95,
761
+		.product = 0x1790,
762
+	},
763
+	{
764
+		.name = "ax88178a",
765
+		.vendor = 0x0b95,
766
+		.product = 0x178a,
767
+	},
768
+	{
769
+		.name = "dub1312",
770
+		.vendor = 0x2001,
771
+		.product = 0x4a00,
772
+	},
773
+	{
774
+		.name = "axge-sitecom",
775
+		.vendor = 0x0df6,
776
+		.product = 0x0072,
777
+	},
778
+	{
779
+		.name = "axge-samsung",
780
+		.vendor = 0x04e8,
781
+		.product = 0xa100,
782
+	},
783
+	{
784
+		.name = "onelinkdock",
785
+		.vendor = 0x17ef,
786
+		.product = 0x304b,
787
+	},
788
+};
789
+
790
+/** AXGE driver */
791
+struct usb_driver axge_driver __usb_driver = {
792
+	.ids = axge_ids,
793
+	.id_count = ( sizeof ( axge_ids ) / sizeof ( axge_ids[0] ) ),
794
+	.class = USB_CLASS_ID ( USB_ANY_ID, USB_ANY_ID, USB_ANY_ID ),
795
+	.score = USB_SCORE_NORMAL,
796
+	.probe = axge_probe,
797
+	.remove = axge_remove,
798
+};

+ 174
- 0
src/drivers/net/axge.h View File

@@ -0,0 +1,174 @@
1
+#ifndef _AXGE_H
2
+#define _AXGE_H
3
+
4
+/** @file
5
+ *
6
+ * Asix 10/100/1000 USB Ethernet driver
7
+ *
8
+ */
9
+
10
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
11
+
12
+#include <ipxe/usb.h>
13
+#include <ipxe/usbnet.h>
14
+
15
+/** Read MAC register */
16
+#define AXGE_READ_MAC_REGISTER						\
17
+	( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE |		\
18
+	  USB_REQUEST_TYPE ( 0x01 ) )
19
+
20
+/** Write MAC register */
21
+#define AXGE_WRITE_MAC_REGISTER						\
22
+	( USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE |		\
23
+	  USB_REQUEST_TYPE ( 0x01 ) )
24
+
25
+/** Physical Link Status Register */
26
+#define AXGE_PLSR 0x02
27
+#define AXGE_PLSR_EPHY_10		0x10	/**< Ethernet at 10Mbps */
28
+#define AXGE_PLSR_EPHY_100		0x20	/**< Ethernet at 100Mbps */
29
+#define AXGE_PLSR_EPHY_1000		0x40	/**< Ethernet at 1000Mbps */
30
+#define AXGE_PLSR_EPHY_ANY						\
31
+	( AXGE_PLSR_EPHY_10 |						\
32
+	  AXGE_PLSR_EPHY_100 |						\
33
+	  AXGE_PLSR_EPHY_1000 )
34
+
35
+/** RX Control Register */
36
+#define AXGE_RCR 0x0b
37
+#define AXGE_RCR_PRO			0x0001	/**< Promiscuous mode */
38
+#define AXGE_RCR_AMALL			0x0002	/**< Accept all multicasts */
39
+#define AXGE_RCR_AB			0x0008	/**< Accept broadcasts */
40
+#define AXGE_RCR_SO			0x0080	/**< Start operation */
41
+
42
+/** Node ID Register */
43
+#define AXGE_NIDR 0x10
44
+
45
+/** Medium Status Register */
46
+#define AXGE_MSR 0x22
47
+#define AXGE_MSR_GM			0x0001	/**< Gigabit mode */
48
+#define AXGE_MSR_FD			0x0002	/**< Full duplex */
49
+#define AXGE_MSR_RFC			0x0010	/**< RX flow control enable */
50
+#define AXGE_MSR_TFC			0x0020	/**< TX flow control enable */
51
+#define AXGE_MSR_RE			0x0100	/**< Receive enable */
52
+
53
+/** Ethernet PHY Power and Reset Control Register */
54
+#define AXGE_EPPRCR 0x26
55
+#define AXGE_EPPRCR_IPRL		0x0020	/**< Undocumented */
56
+
57
+/** Delay after initialising EPPRCR */
58
+#define AXGE_EPPRCR_DELAY_MS 200
59
+
60
+/** Bulk IN Control Register (undocumented) */
61
+#define AXGE_BICR 0x2e
62
+
63
+/** Bulk IN Control (undocumented) */
64
+struct axge_bulk_in_control {
65
+	/** Control */
66
+	uint8_t ctrl;
67
+	/** Timer */
68
+	uint16_t timer;
69
+	/** Size */
70
+	uint8_t size;
71
+	/** Inter-frame gap */
72
+	uint8_t ifg;
73
+} __attribute__ (( packed ));
74
+
75
+/** Clock Select Register (undocumented) */
76
+#define AXGE_CSR 0x33
77
+#define AXGE_CSR_BCS			0x01	/**< Undocumented */
78
+#define AXGE_CSR_ACS			0x02	/**< Undocumented */
79
+
80
+/** Delay after initialising CSR */
81
+#define AXGE_CSR_DELAY_MS 100
82
+
83
+/** Transmit packet header */
84
+struct axge_tx_header {
85
+	/** Packet length */
86
+	uint32_t len;
87
+	/** Answers on a postcard, please */
88
+	uint32_t wtf;
89
+} __attribute__ (( packed ));
90
+
91
+/** Receive packet footer */
92
+struct axge_rx_footer {
93
+	/** Packet count */
94
+	uint16_t count;
95
+	/** Header offset */
96
+	uint16_t offset;
97
+} __attribute__ (( packed ));
98
+
99
+/** Receive packet descriptor */
100
+struct axge_rx_descriptor {
101
+	/** Checksum information */
102
+	uint16_t check;
103
+	/** Length and error flags */
104
+	uint16_t len_flags;
105
+} __attribute__ (( packed ));
106
+
107
+/** Receive packet length mask */
108
+#define AXGE_RX_LEN_MASK 0x1fff
109
+
110
+/** Receive packet length alignment */
111
+#define AXGE_RX_LEN_PAD_ALIGN 8
112
+
113
+/** Receive packet CRC error */
114
+#define AXGE_RX_CRC_ERROR 0x2000
115
+
116
+/** Receive packet dropped error */
117
+#define AXGE_RX_DROP_ERROR 0x8000
118
+
119
+/** Interrupt data */
120
+struct axge_interrupt {
121
+	/** Magic signature */
122
+	uint16_t magic;
123
+	/** Link state */
124
+	uint16_t link;
125
+	/** PHY register MR01 */
126
+	uint16_t mr01;
127
+	/** PHY register MR05 */
128
+	uint16_t mr05;
129
+} __attribute__ (( packed ));
130
+
131
+/** Interrupt magic signature */
132
+#define AXGE_INTR_MAGIC 0x00a1
133
+
134
+/** Link is up */
135
+#define AXGE_INTR_LINK_PPLS 0x0001
136
+
137
+/** An AXGE network device */
138
+struct axge_device {
139
+	/** USB device */
140
+	struct usb_device *usb;
141
+	/** USB bus */
142
+	struct usb_bus *bus;
143
+	/** Network device */
144
+	struct net_device *netdev;
145
+	/** USB network device */
146
+	struct usbnet_device usbnet;
147
+};
148
+
149
+/** Interrupt maximum fill level
150
+ *
151
+ * This is a policy decision.
152
+ */
153
+#define AXGE_INTR_MAX_FILL 2
154
+
155
+/** Bulk IN maximum fill level
156
+ *
157
+ * This is a policy decision.
158
+ */
159
+#define AXGE_IN_MAX_FILL 8
160
+
161
+/** Bulk IN buffer size
162
+ *
163
+ * This is a policy decision.
164
+ */
165
+#define AXGE_IN_MTU 2048
166
+
167
+/** Amount of space to reserve at start of bulk IN buffers
168
+ *
169
+ * This is required to allow for protocols such as ARP which may reuse
170
+ * a received I/O buffer for transmission.
171
+ */
172
+#define AXGE_IN_RESERVE sizeof ( struct axge_tx_header )
173
+
174
+#endif /* _AXGE_H */

+ 1
- 0
src/include/ipxe/errfile.h View File

@@ -190,6 +190,7 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
190 190
 #define ERRFILE_flexboot_nodnic	     ( ERRFILE_DRIVER | 0x007e0000 )
191 191
 #define ERRFILE_virtio_pci	     ( ERRFILE_DRIVER | 0x007f0000 )
192 192
 #define ERRFILE_pciea		     ( ERRFILE_DRIVER | 0x00c00000 )
193
+#define ERRFILE_axge		     ( ERRFILE_DRIVER | 0x00c10000 )
193 194
 
194 195
 #define ERRFILE_aoe			( ERRFILE_NET | 0x00000000 )
195 196
 #define ERRFILE_arp			( ERRFILE_NET | 0x00010000 )

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