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			| 1 |  | -#ifndef	ETHERBOOT_IO_H
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			| 2 |  | -#define ETHERBOOT_IO_H
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			| 3 |  | -
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			| 4 |  | -#include <stdint.h>
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			| 5 |  | -#include "virtaddr.h"
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			| 6 |  | -
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			| 7 |  | -/* virt_to_bus converts an addresss inside of etherboot [_start, _end]
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			| 8 |  | - * into a memory access cards can use.
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			| 9 |  | - */
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			| 10 |  | -#define virt_to_bus virt_to_phys
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			| 11 |  | -
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			| 12 |  | -
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			| 13 |  | -/* bus_to_virt reverses virt_to_bus, the address must be output
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			| 14 |  | - * from virt_to_bus to be valid.  This function does not work on
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			| 15 |  | - * all bus addresses.
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			| 16 |  | - */
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			| 17 |  | -#define bus_to_virt phys_to_virt
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			| 18 |  | -
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			| 19 |  | -/* ioremap converts a random 32bit bus address into something
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			| 20 |  | - * etherboot can access.
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			| 21 |  | - */
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			| 22 |  | -static inline void *ioremap(unsigned long bus_addr, unsigned long length __unused)
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			| 23 |  | -{
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			| 24 |  | -	return bus_to_virt(bus_addr);
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			| 25 |  | -}
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			| 26 |  | -
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			| 27 |  | -/* iounmap cleans up anything ioremap had to setup */
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			| 28 |  | -static inline void iounmap(void *virt_addr __unused)
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			| 29 |  | -{
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			| 30 |  | -	return;
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			| 31 |  | -}
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			| 32 |  | -
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			| 33 |  | -/*
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			| 34 |  | - * This file contains the definitions for the x86 IO instructions
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			| 35 |  | - * inb/inw/inl/outb/outw/outl and the "string versions" of the same
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			| 36 |  | - * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
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			| 37 |  | - * versions of the single-IO instructions (inb_p/inw_p/..).
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			| 38 |  | - *
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			| 39 |  | - * This file is not meant to be obfuscating: it's just complicated
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			| 40 |  | - * to (a) handle it all in a way that makes gcc able to optimize it
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			| 41 |  | - * as well as possible and (b) trying to avoid writing the same thing
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			| 42 |  | - * over and over again with slight variations and possibly making a
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			| 43 |  | - * mistake somewhere.
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			| 44 |  | - */
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			| 45 |  | -
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			| 46 |  | -/*
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			| 47 |  | - * Thanks to James van Artsdalen for a better timing-fix than
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			| 48 |  | - * the two short jumps: using outb's to a nonexistent port seems
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			| 49 |  | - * to guarantee better timings even on fast machines.
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			| 50 |  | - *
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			| 51 |  | - * On the other hand, I'd like to be sure of a non-existent port:
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			| 52 |  | - * I feel a bit unsafe about using 0x80 (should be safe, though)
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			| 53 |  | - *
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			| 54 |  | - *		Linus
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			| 55 |  | - */
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			| 56 |  | -
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			| 57 |  | -#ifdef	SLOW_IO_BY_JUMPING
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			| 58 |  | -#define __SLOW_DOWN_IO __asm__ __volatile__("jmp 1f\n1:\tjmp 1f\n1:")
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			| 59 |  | -#else
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			| 60 |  | -#define __SLOW_DOWN_IO __asm__ __volatile__("outb %al,$0x80")
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			| 61 |  | -#endif
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			| 62 |  | -
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			| 63 |  | -#ifdef	REALLY_SLOW_IO
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			| 64 |  | -#define SLOW_DOWN_IO { __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; __SLOW_DOWN_IO; }
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			| 65 |  | -#else
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			| 66 |  | -#define SLOW_DOWN_IO __SLOW_DOWN_IO
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			| 67 |  | -#endif
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			| 68 |  | -
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			| 69 |  | -/*
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			| 70 |  | - * readX/writeX() are used to access memory mapped devices. On some
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			| 71 |  | - * architectures the memory mapped IO stuff needs to be accessed
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			| 72 |  | - * differently. On the x86 architecture, we just read/write the
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			| 73 |  | - * memory location directly.
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			| 74 |  | - */
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			| 75 |  | -static inline __attribute__ (( always_inline )) unsigned long
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			| 76 |  | -_readb ( volatile uint8_t *addr ) {
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			| 77 |  | -	unsigned long data = *addr;
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			| 78 |  | -	DBGIO ( "[%08lx] => %02lx\n", virt_to_phys ( addr ), data );
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			| 79 |  | -	return data;
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			| 80 |  | -}
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			| 81 |  | -static inline __attribute__ (( always_inline )) unsigned long
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			| 82 |  | -_readw ( volatile uint16_t *addr ) {
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			| 83 |  | -	unsigned long data = *addr;
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			| 84 |  | -	DBGIO ( "[%08lx] => %04lx\n", virt_to_phys ( addr ), data );
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			| 85 |  | -	return data;
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			| 86 |  | -}
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			| 87 |  | -static inline __attribute__ (( always_inline )) unsigned long
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			| 88 |  | -_readl ( volatile uint32_t *addr ) {
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			| 89 |  | -	unsigned long data = *addr;
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			| 90 |  | -	DBGIO ( "[%08lx] => %08lx\n", virt_to_phys ( addr ), data );
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			| 91 |  | -	return data;
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			| 92 |  | -}
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			| 93 |  | -#define readb( addr ) _readb ( ( volatile uint8_t * ) (addr) )
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			| 94 |  | -#define readw( addr ) _readw ( ( volatile uint16_t * ) (addr) )
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			| 95 |  | -#define readl( addr ) _readl ( ( volatile uint32_t * ) (addr) )
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			| 96 |  | -
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			| 97 |  | -static inline __attribute__ (( always_inline )) void
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			| 98 |  | -_writeb ( unsigned long data, volatile uint8_t *addr ) {
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			| 99 |  | -	DBGIO ( "[%08lx] <= %02lx\n", virt_to_phys ( addr ), data );
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			| 100 |  | -	*addr = data;
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			| 101 |  | -}
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			| 102 |  | -static inline __attribute__ (( always_inline )) void
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			| 103 |  | -_writew ( unsigned long data, volatile uint16_t *addr ) {
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			| 104 |  | -	DBGIO ( "[%08lx] <= %04lx\n", virt_to_phys ( addr ), data );
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			| 105 |  | -	*addr = data;
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			| 106 |  | -}
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			| 107 |  | -static inline __attribute__ (( always_inline )) void
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			| 108 |  | -_writel ( unsigned long data, volatile uint32_t *addr ) {
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			| 109 |  | -	DBGIO ( "[%08lx] <= %08lx\n", virt_to_phys ( addr ), data );
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			| 110 |  | -	*addr = data;
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			| 111 |  | -}
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			| 112 |  | -#define writeb( b, addr ) _writeb ( (b), ( volatile uint8_t * ) (addr) )
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			| 113 |  | -#define writew( b, addr ) _writew ( (b), ( volatile uint16_t * ) (addr) )
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			| 114 |  | -#define writel( b, addr ) _writel ( (b), ( volatile uint32_t * ) (addr) )
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			| 115 |  | -
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			| 116 |  | -#define memcpy_fromio(a,b,c)	memcpy((a),(void *)(b),(c))
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			| 117 |  | -#define memcpy_toio(a,b,c)	memcpy((void *)(a),(b),(c))
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			| 118 |  | -
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			| 119 |  | -/*
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			| 120 |  | - * Force strict CPU ordering.
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			| 121 |  | - * And yes, this is required on UP too when we're talking
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			| 122 |  | - * to devices.
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			| 123 |  | - *
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			| 124 |  | - * For now, "wmb()" doesn't actually do anything, as all
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			| 125 |  | - * Intel CPU's follow what Intel calls a *Processor Order*,
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			| 126 |  | - * in which all writes are seen in the program order even
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			| 127 |  | - * outside the CPU.
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			| 128 |  | - *
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			| 129 |  | - * I expect future Intel CPU's to have a weaker ordering,
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			| 130 |  | - * but I'd also expect them to finally get their act together
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			| 131 |  | - * and add some real memory barriers if so.
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			| 132 |  | - *
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			| 133 |  | - * Some non intel clones support out of order store. wmb() ceases to be a
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			| 134 |  | - * nop for these.
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			| 135 |  | - */
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			| 136 |  | - 
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			| 137 |  | -#define mb() 	__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")
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			| 138 |  | -#define rmb()	mb()
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			| 139 |  | -#define wmb()	mb();
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			| 140 |  | -
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			| 141 |  | -
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			| 142 |  | -/*
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			| 143 |  | - * Talk about misusing macros..
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			| 144 |  | - */
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			| 145 |  | -
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			| 146 |  | -#define __OUT1(s,x) \
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			| 147 |  | -extern void __out##s(unsigned x value, unsigned short port); \
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			| 148 |  | -extern inline void __out##s(unsigned x value, unsigned short port) {
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			| 149 |  | -
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			| 150 |  | -#define __OUT2(s,s1,s2) \
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			| 151 |  | -__asm__ __volatile__ ("out" #s " %" s1 "0,%" s2 "1"
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			| 152 |  | -
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			| 153 |  | -#define __OUT(s,s1,x) \
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			| 154 |  | -__OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "d" (port)); } \
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			| 155 |  | -__OUT1(s##c,x) __OUT2(s,s1,"") : : "a" (value), "id" (port)); } \
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			| 156 |  | -__OUT1(s##_p,x) __OUT2(s,s1,"w") : : "a" (value), "d" (port)); SLOW_DOWN_IO; } \
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			| 157 |  | -__OUT1(s##c_p,x) __OUT2(s,s1,"") : : "a" (value), "id" (port)); SLOW_DOWN_IO; }
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			| 158 |  | -
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			| 159 |  | -#define __IN1(s,x) \
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			| 160 |  | -extern unsigned x __in##s(unsigned short port); \
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			| 161 |  | -extern inline unsigned x __in##s(unsigned short port) { unsigned x _v;
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			| 162 |  | -
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			| 163 |  | -#define __IN2(s,s1,s2) \
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			| 164 |  | -__asm__ __volatile__ ("in" #s " %" s2 "1,%" s1 "0"
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			| 165 |  | -
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			| 166 |  | -#define __IN(s,s1,x,i...) \
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			| 167 |  | -__IN1(s,x) __IN2(s,s1,"w") : "=a" (_v) : "d" (port) ,##i ); return _v; } \
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			| 168 |  | -__IN1(s##c,x) __IN2(s,s1,"") : "=a" (_v) : "id" (port) ,##i ); return _v; } \
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			| 169 |  | -__IN1(s##_p,x) __IN2(s,s1,"w") : "=a" (_v) : "d" (port) ,##i ); SLOW_DOWN_IO; return _v; } \
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			| 170 |  | -__IN1(s##c_p,x) __IN2(s,s1,"") : "=a" (_v) : "id" (port) ,##i ); SLOW_DOWN_IO; return _v; }
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			| 171 |  | -
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			| 172 |  | -#define __INS(s) \
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			| 173 |  | -extern void ins##s(unsigned short port, void * addr, unsigned long count); \
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			| 174 |  | -extern inline void ins##s(unsigned short port, void * addr, unsigned long count) \
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			| 175 |  | -{ __asm__ __volatile__ ("cld ; rep ; ins" #s \
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			| 176 |  | -: "=D" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
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			| 177 |  | -
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			| 178 |  | -#define __OUTS(s) \
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			| 179 |  | -extern void outs##s(unsigned short port, const void * addr, unsigned long  count); \
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			| 180 |  | -extern inline void outs##s(unsigned short port, const void * addr, unsigned long count) \
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			| 181 |  | -{ __asm__ __volatile__ ("cld ; rep ; outs" #s \
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			| 182 |  | -: "=S" (addr), "=c" (count) : "d" (port),"0" (addr),"1" (count)); }
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			| 183 |  | -
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			| 184 |  | -__IN(b,"", char)
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			| 185 |  | -__IN(w,"",short)
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			| 186 |  | -__IN(l,"", long)
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			| 187 |  | -
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			| 188 |  | -__OUT(b,"b",char)
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			| 189 |  | -__OUT(w,"w",short)
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			| 190 |  | -__OUT(l,,int)
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			| 191 |  | -
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			| 192 |  | -__INS(b)
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			| 193 |  | -__INS(w)
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			| 194 |  | -__INS(l)
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			| 195 |  | -
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			| 196 |  | -__OUTS(b)
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			| 197 |  | -__OUTS(w)
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			| 198 |  | -__OUTS(l)
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			| 199 |  | -
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			| 200 |  | -/*
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			| 201 |  | - * Note that due to the way __builtin_constant_p() works, you
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			| 202 |  | - *  - can't use it inside a inline function (it will never be true)
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			| 203 |  | - *  - you don't have to worry about side effects within the __builtin..
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			| 204 |  | - */
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			| 205 |  | -#define outb(val,port) \
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			| 206 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 207 |  | -	__outbc((val),(port)) : \
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			| 208 |  | -	__outb((val),(port)))
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			| 209 |  | -
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			| 210 |  | -#define inb(port) \
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			| 211 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 212 |  | -	__inbc(port) : \
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			| 213 |  | -	__inb(port))
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			| 214 |  | -
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			| 215 |  | -#define outb_p(val,port) \
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			| 216 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 217 |  | -	__outbc_p((val),(port)) : \
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			| 218 |  | -	__outb_p((val),(port)))
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			| 219 |  | -
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			| 220 |  | -#define inb_p(port) \
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			| 221 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 222 |  | -	__inbc_p(port) : \
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			| 223 |  | -	__inb_p(port))
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			| 224 |  | -
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			| 225 |  | -#define outw(val,port) \
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			| 226 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 227 |  | -	__outwc((val),(port)) : \
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			| 228 |  | -	__outw((val),(port)))
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			| 229 |  | -
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			| 230 |  | -#define inw(port) \
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			| 231 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 232 |  | -	__inwc(port) : \
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			| 233 |  | -	__inw(port))
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			| 234 |  | -
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			| 235 |  | -#define outw_p(val,port) \
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			| 236 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 237 |  | -	__outwc_p((val),(port)) : \
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			| 238 |  | -	__outw_p((val),(port)))
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			| 239 |  | -
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			| 240 |  | -#define inw_p(port) \
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			| 241 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 242 |  | -	__inwc_p(port) : \
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			| 243 |  | -	__inw_p(port))
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			| 244 |  | -
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			| 245 |  | -#define outl(val,port) \
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			| 246 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 247 |  | -	__outlc((val),(port)) : \
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			| 248 |  | -	__outl((val),(port)))
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			| 249 |  | -
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			| 250 |  | -#define inl(port) \
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			| 251 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 252 |  | -	__inlc(port) : \
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			| 253 |  | -	__inl(port))
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			| 254 |  | -
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			| 255 |  | -#define outl_p(val,port) \
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			| 256 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 257 |  | -	__outlc_p((val),(port)) : \
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			| 258 |  | -	__outl_p((val),(port)))
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			| 259 |  | -
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			| 260 |  | -#define inl_p(port) \
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			| 261 |  | -((__builtin_constant_p((port)) && (port) < 256) ? \
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			| 262 |  | -	__inlc_p(port) : \
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			| 263 |  | -	__inl_p(port))
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			| 264 |  | -
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			| 265 |  | -#endif /* ETHERBOOT_IO_H */
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