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Standardise DBG_PRINTF()->DBG(), and remove custom definitions for

DBG_PRINTF() and assert().
tags/v0.9.3
Michael Brown 17 years ago
parent
commit
ed5ff61790
1 changed files with 9 additions and 28 deletions
  1. 9
    28
      src/drivers/net/r8169.c

+ 9
- 28
src/drivers/net/r8169.c View File

73
 #define RTL8169_USE_IO
73
 #define RTL8169_USE_IO
74
 
74
 
75
 
75
 
76
-#ifdef RTL8169_DEBUG
77
-
78
-#if 0
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-#define assert(expr) \
80
-               if(!(expr)) { printk( "Assertion failed! %s,%s,%s,line=%d\n", #expr,__FILE__,__FUNCTION__,__LINE__); }
81
-#endif
82
-
83
-#define DBG_PRINTF( fmt, args...)   printk("r8169: " fmt, ## args);
84
-
85
-#else
86
-
87
-#if 0
88
-#define assert(expr) do {} while (0)
89
-#endif
90
-
91
-#define DBG_PRINTF( fmt, args...)   ;
92
-
93
-#endif				// end of #ifdef RTL8169_DEBUG
94
-
95
 /* media options 
76
 /* media options 
96
         _10_Half = 0x01,
77
         _10_Half = 0x01,
97
         _10_Full = 0x02,
78
         _10_Full = 0x02,
759
 	if (tpc->mcfg == MCFG_METHOD_2 || tpc->mcfg == MCFG_METHOD_3) {
740
 	if (tpc->mcfg == MCFG_METHOD_2 || tpc->mcfg == MCFG_METHOD_3) {
760
 		RTL_W16(CPlusCmd,
741
 		RTL_W16(CPlusCmd,
761
 			(RTL_R16(CPlusCmd) | (1 << 14) | (1 << 3)));
742
 			(RTL_R16(CPlusCmd) | (1 << 14) | (1 << 3)));
762
-		DBG_PRINTF
743
+		DBG
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 		    ("Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n");
744
 		    ("Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n");
764
 	} else {
745
 	} else {
765
 		RTL_W16(CPlusCmd, (RTL_R16(CPlusCmd) | (1 << 3)));
746
 		RTL_W16(CPlusCmd, (RTL_R16(CPlusCmd) | (1 << 3)));
766
-		DBG_PRINTF("Set MAC Reg C+CR Offset 0xE0: bit-3.\n");
747
+		DBG("Set MAC Reg C+CR Offset 0xE0: bit-3.\n");
767
 	}
748
 	}
768
 
749
 
769
 	{
750
 	{
919
 	/* Config PHY */
900
 	/* Config PHY */
920
 	rtl8169_hw_PHY_config(nic);
901
 	rtl8169_hw_PHY_config(nic);
921
 
902
 
922
-	DBG_PRINTF("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
903
+	DBG("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
923
 	RTL_W8(0x82, 0x01);
904
 	RTL_W8(0x82, 0x01);
924
 
905
 
925
 	if (tpc->mcfg < MCFG_METHOD_3) {
906
 	if (tpc->mcfg < MCFG_METHOD_3) {
926
-		DBG_PRINTF("Set PCI Latency=0x40\n");
907
+		DBG("Set PCI Latency=0x40\n");
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 		pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0x40);
908
 		pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0x40);
928
 	}
909
 	}
929
 
910
 
930
 	if (tpc->mcfg == MCFG_METHOD_2) {
911
 	if (tpc->mcfg == MCFG_METHOD_2) {
931
-		DBG_PRINTF("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
912
+		DBG("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
932
 		RTL_W8(0x82, 0x01);
913
 		RTL_W8(0x82, 0x01);
933
-		DBG_PRINTF("Set PHY Reg 0x0bh = 0x00h\n");
914
+		DBG("Set PHY Reg 0x0bh = 0x00h\n");
934
 		RTL8169_WRITE_GMII_REG(ioaddr, 0x0b, 0x0000);	//w 0x0b 15 0 0
915
 		RTL8169_WRITE_GMII_REG(ioaddr, 0x0b, 0x0000);	//w 0x0b 15 0 0
935
 	}
916
 	}
936
 
917
 
1049
         struct rtl8169_private *priv = dev->priv;
1030
         struct rtl8169_private *priv = dev->priv;
1050
         unsigned long ioaddr = priv->ioaddr;
1031
         unsigned long ioaddr = priv->ioaddr;
1051
 
1032
 
1052
-        DBG_PRINTF("%s: Reset RTL8169s PHY\n", dev->name);
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+        DBG("%s: Reset RTL8169s PHY\n", dev->name);
1053
 
1034
 
1054
         val = ( RTL8169_READ_GMII_REG( ioaddr, 0 ) | 0x8000 ) & 0xffff;
1035
         val = ( RTL8169_READ_GMII_REG( ioaddr, 0 ) | 0x8000 ) & 0xffff;
1055
         RTL8169_WRITE_GMII_REG( ioaddr, 0, val );
1036
         RTL8169_WRITE_GMII_REG( ioaddr, 0, val );
1074
 static void rtl8169_hw_PHY_config(struct nic *nic __unused)
1055
 static void rtl8169_hw_PHY_config(struct nic *nic __unused)
1075
 {
1056
 {
1076
 
1057
 
1077
-	DBG_PRINTF("priv->mcfg=%d, priv->pcfg=%d\n", tpc->mcfg, tpc->pcfg);
1058
+	DBG("priv->mcfg=%d, priv->pcfg=%d\n", tpc->mcfg, tpc->pcfg);
1078
 
1059
 
1079
 	if (tpc->mcfg == MCFG_METHOD_4) {
1060
 	if (tpc->mcfg == MCFG_METHOD_4) {
1080
 /*
1061
 /*
1175
 		RTL8169_WRITE_GMII_REG((unsigned long) ioaddr, 0x0B,
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 		RTL8169_WRITE_GMII_REG((unsigned long) ioaddr, 0x0B,
1176
 				       0x0000);
1157
 				       0x0000);
1177
 	} else {
1158
 	} else {
1178
-		DBG_PRINTF("tpc->mcfg=%d. Discard hw PHY config.\n",
1159
+		DBG("tpc->mcfg=%d. Discard hw PHY config.\n",
1179
 			  tpc->mcfg);
1160
 			  tpc->mcfg);
1180
 	}
1161
 	}
1181
 }
1162
 }

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