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compilation warnings cleanup

tags/v0.9.3
Marty Connor 18 years ago
parent
commit
e753444e04
1 changed files with 27 additions and 33 deletions
  1. 27
    33
      src/drivers/net/r8169.c

+ 27
- 33
src/drivers/net/r8169.c View File

44
 *    Indent Options: indent -kr -i8
44
 *    Indent Options: indent -kr -i8
45
 ***************************************************************************/
45
 ***************************************************************************/
46
 
46
 
47
-/* to get some global routines like printf */
48
 #include "etherboot.h"
47
 #include "etherboot.h"
49
-/* to get the interface to the body of the program */
50
 #include "nic.h"
48
 #include "nic.h"
51
-/* to get the PCI support functions, if this is a PCI NIC */
52
 #include <gpxe/pci.h>
49
 #include <gpxe/pci.h>
50
+#include <gpxe/ethernet.h>
53
 #include "timer.h"
51
 #include "timer.h"
54
 
52
 
55
 #define drv_version "v1.6"
53
 #define drv_version "v1.6"
59
 
57
 
60
 static u32 ioaddr;
58
 static u32 ioaddr;
61
 
59
 
62
-#ifdef EDEBUG
63
-#define dprintf(x) printf x
64
-#else
65
-#define dprintf(x)
66
-#endif
67
-
68
 /* Condensed operations for readability. */
60
 /* Condensed operations for readability. */
69
 #define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
61
 #define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
70
 #define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))
62
 #define le32desc_to_virt(addr)  bus_to_virt(le32_to_cpu(addr))
84
 #ifdef RTL8169_DEBUG
76
 #ifdef RTL8169_DEBUG
85
 #define assert(expr) \
77
 #define assert(expr) \
86
                if(!(expr)) { printk( "Assertion failed! %s,%s,%s,line=%d\n", #expr,__FILE__,__FUNCTION__,__LINE__); }
78
                if(!(expr)) { printk( "Assertion failed! %s,%s,%s,line=%d\n", #expr,__FILE__,__FUNCTION__,__LINE__); }
87
-#define DBG_PRINT( fmt, args...)   printk("r8169: " fmt, ## args);
79
+#define DBG_PRINTF( fmt, args...)   printk("r8169: " fmt, ## args);
88
 #else
80
 #else
89
 #define assert(expr) do {} while (0)
81
 #define assert(expr) do {} while (0)
90
-#define DBG_PRINT( fmt, args...)   ;
82
+#define DBG_PRINTF( fmt, args...)   ;
91
 #endif				// end of #ifdef RTL8169_DEBUG
83
 #endif				// end of #ifdef RTL8169_DEBUG
92
 
84
 
93
 /* media options 
85
 /* media options 
436
 }
428
 }
437
 
429
 
438
 
430
 
431
+#if 0
439
 static void mdio_write(int RegAddr, int value)
432
 static void mdio_write(int RegAddr, int value)
440
 {
433
 {
441
 	int i;
434
 	int i;
471
 	}
464
 	}
472
 	return value;
465
 	return value;
473
 }
466
 }
467
+#endif
474
 
468
 
475
 #define IORESOURCE_MEM 0x00000200
469
 #define IORESOURCE_MEM 0x00000200
476
 
470
 
477
 static int rtl8169_init_board(struct pci_device *pdev)
471
 static int rtl8169_init_board(struct pci_device *pdev)
478
 {
472
 {
479
 	int i;
473
 	int i;
480
-	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
474
+//	unsigned long mmio_end, mmio_flags
475
+        unsigned long mmio_start, mmio_len;
481
 
476
 
482
 	adjust_pci_device(pdev);
477
 	adjust_pci_device(pdev);
483
 
478
 
556
 			goto match;
551
 			goto match;
557
 		}
552
 		}
558
 	/* if unknown chip, assume array element #0, original RTL-8169 in this case */
553
 	/* if unknown chip, assume array element #0, original RTL-8169 in this case */
559
-	dprintf(("PCI device: unknown chip version, assuming RTL-8169\n"));
560
-	dprintf(("PCI device: TxConfig = 0x%hX\n",
561
-		 (unsigned long) RTL_R32(TxConfig)));
554
+	DBG ( "PCI device: unknown chip version, assuming RTL-8169\n" );
555
+	DBG ( "PCI device: TxConfig = %#lX\n", ( unsigned long ) RTL_R32 ( TxConfig ) );
562
 
556
 
563
 	tpc->chipset = 0;
557
 	tpc->chipset = 0;
564
 	return 1;
558
 	return 1;
755
 	if (tpc->mcfg == MCFG_METHOD_2 || tpc->mcfg == MCFG_METHOD_3) {
749
 	if (tpc->mcfg == MCFG_METHOD_2 || tpc->mcfg == MCFG_METHOD_3) {
756
 		RTL_W16(CPlusCmd,
750
 		RTL_W16(CPlusCmd,
757
 			(RTL_R16(CPlusCmd) | (1 << 14) | (1 << 3)));
751
 			(RTL_R16(CPlusCmd) | (1 << 14) | (1 << 3)));
758
-		DBG_PRINT
752
+		DBG_PRINTF
759
 		    ("Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n");
753
 		    ("Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n");
760
 	} else {
754
 	} else {
761
 		RTL_W16(CPlusCmd, (RTL_R16(CPlusCmd) | (1 << 3)));
755
 		RTL_W16(CPlusCmd, (RTL_R16(CPlusCmd) | (1 << 3)));
762
-		DBG_PRINT("Set MAC Reg C+CR Offset 0xE0: bit-3.\n");
756
+		DBG_PRINTF("Set MAC Reg C+CR Offset 0xE0: bit-3.\n");
763
 	}
757
 	}
764
 
758
 
765
 	{
759
 	{
889
 	int i, rc;
883
 	int i, rc;
890
 	int option = -1, Cap10_100 = 0, Cap1000 = 0;
884
 	int option = -1, Cap10_100 = 0, Cap1000 = 0;
891
 
885
 
892
-	printf("r8169.c: Found %s, Vendor=%hX Device=%hX\n",
893
-	       pci->name, pci->vendor, pci->device);
886
+	printf ( "r8169.c: Found %s, Vendor=%hX Device=%hX\n",
887
+	       pci->name, pci->vendor, pci->device );
894
 
888
 
895
 	board_idx++;
889
 	board_idx++;
896
 
890
 
905
 	for (i = 0; i < MAC_ADDR_LEN; i++)
899
 	for (i = 0; i < MAC_ADDR_LEN; i++)
906
 		nic->node_addr[i] = RTL_R8(MAC0 + i);
900
 		nic->node_addr[i] = RTL_R8(MAC0 + i);
907
 
901
 
908
-	dprintf(("%s: Identified chip type is '%s'.\n", pci->name,
909
-		 rtl_chip_info[tpc->chipset].name));
902
+	DBG ( "%s: Identified chip type is '%s'.\n", pci->name,
903
+		 rtl_chip_info[tpc->chipset].name );
904
+
910
 	/* Print out some hardware info */
905
 	/* Print out some hardware info */
911
-	printf("%s: %! at ioaddr %hX, ", pci->name, nic->node_addr,
912
-	       ioaddr);
906
+	DBG ( "%s: %s at IOAddr %#hX, ", pci->name, eth_ntoa ( nic->node_addr ),
907
+	       ioaddr );
913
 
908
 
914
-	// Config PHY
909
+	/* Config PHY */
915
 	rtl8169_hw_PHY_config(nic);
910
 	rtl8169_hw_PHY_config(nic);
916
 
911
 
917
-	DBG_PRINT("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
912
+	DBG_PRINTF("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
918
 	RTL_W8(0x82, 0x01);
913
 	RTL_W8(0x82, 0x01);
919
 
914
 
920
 	if (tpc->mcfg < MCFG_METHOD_3) {
915
 	if (tpc->mcfg < MCFG_METHOD_3) {
921
-		DBG_PRINT("Set PCI Latency=0x40\n");
916
+		DBG_PRINTF("Set PCI Latency=0x40\n");
922
 		pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0x40);
917
 		pci_write_config_byte(pci, PCI_LATENCY_TIMER, 0x40);
923
 	}
918
 	}
924
 
919
 
925
 	if (tpc->mcfg == MCFG_METHOD_2) {
920
 	if (tpc->mcfg == MCFG_METHOD_2) {
926
-		DBG_PRINT("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
921
+		DBG_PRINTF("Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
927
 		RTL_W8(0x82, 0x01);
922
 		RTL_W8(0x82, 0x01);
928
-		DBG_PRINT("Set PHY Reg 0x0bh = 0x00h\n");
923
+		DBG_PRINTF("Set PHY Reg 0x0bh = 0x00h\n");
929
 		RTL8169_WRITE_GMII_REG(ioaddr, 0x0b, 0x0000);	//w 0x0b 15 0 0
924
 		RTL8169_WRITE_GMII_REG(ioaddr, 0x0b, 0x0000);	//w 0x0b 15 0 0
930
 	}
925
 	}
931
 
926
 
970
 			RTL8169_WRITE_GMII_REG(ioaddr, PHY_1000_CTRL_REG,
965
 			RTL8169_WRITE_GMII_REG(ioaddr, PHY_1000_CTRL_REG,
971
 					       Cap1000);
966
 					       Cap1000);
972
 		} else {
967
 		} else {
973
-			dprintf(("Auto-negotiation Enabled.\n",
974
-				 pci->name));
968
+			DBG ( "%s: Auto-negotiation Enabled.\n",  pci->name );
975
 
969
 
976
 			// enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged
970
 			// enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged
977
 			RTL8169_WRITE_GMII_REG(ioaddr, PHY_AUTO_NEGO_REG,
971
 			RTL8169_WRITE_GMII_REG(ioaddr, PHY_AUTO_NEGO_REG,
1045
         struct rtl8169_private *priv = dev->priv;
1039
         struct rtl8169_private *priv = dev->priv;
1046
         unsigned long ioaddr = priv->ioaddr;
1040
         unsigned long ioaddr = priv->ioaddr;
1047
 
1041
 
1048
-        DBG_PRINT("%s: Reset RTL8169s PHY\n", dev->name);
1042
+        DBG_PRINTF("%s: Reset RTL8169s PHY\n", dev->name);
1049
 
1043
 
1050
         val = ( RTL8169_READ_GMII_REG( ioaddr, 0 ) | 0x8000 ) & 0xffff;
1044
         val = ( RTL8169_READ_GMII_REG( ioaddr, 0 ) | 0x8000 ) & 0xffff;
1051
         RTL8169_WRITE_GMII_REG( ioaddr, 0, val );
1045
         RTL8169_WRITE_GMII_REG( ioaddr, 0, val );
1070
 static void rtl8169_hw_PHY_config(struct nic *nic __unused)
1064
 static void rtl8169_hw_PHY_config(struct nic *nic __unused)
1071
 {
1065
 {
1072
 
1066
 
1073
-	DBG_PRINT("priv->mcfg=%d, priv->pcfg=%d\n", tpc->mcfg, tpc->pcfg);
1067
+	DBG_PRINTF("priv->mcfg=%d, priv->pcfg=%d\n", tpc->mcfg, tpc->pcfg);
1074
 
1068
 
1075
 	if (tpc->mcfg == MCFG_METHOD_4) {
1069
 	if (tpc->mcfg == MCFG_METHOD_4) {
1076
 /*
1070
 /*
1171
 		RTL8169_WRITE_GMII_REG((unsigned long) ioaddr, 0x0B,
1165
 		RTL8169_WRITE_GMII_REG((unsigned long) ioaddr, 0x0B,
1172
 				       0x0000);
1166
 				       0x0000);
1173
 	} else {
1167
 	} else {
1174
-		DBG_PRINT("tpc->mcfg=%d. Discard hw PHY config.\n",
1168
+		DBG_PRINTF("tpc->mcfg=%d. Discard hw PHY config.\n",
1175
 			  tpc->mcfg);
1169
 			  tpc->mcfg);
1176
 	}
1170
 	}
1177
 }
1171
 }

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