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@@ -123,6 +123,15 @@ static int intelxl_fetch_mac ( struct intelxl_nic *intelxl,
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******************************************************************************
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*/
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+/** Admin queue register offsets */
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+static const struct intelxl_admin_offsets intelxl_admin_offsets = {
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+ .bal = INTELXL_ADMIN_BAL,
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+ .bah = INTELXL_ADMIN_BAH,
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+ .len = INTELXL_ADMIN_LEN,
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+ .head = INTELXL_ADMIN_HEAD,
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+ .tail = INTELXL_ADMIN_TAIL,
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+};
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+
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/**
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* Create admin queue
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*
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@@ -133,7 +142,8 @@ static int intelxl_fetch_mac ( struct intelxl_nic *intelxl,
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static int intelxl_create_admin ( struct intelxl_nic *intelxl,
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struct intelxl_admin *admin ) {
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size_t len = ( sizeof ( admin->desc[0] ) * INTELXL_ADMIN_NUM_DESC );
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- void *admin_regs = ( intelxl->regs + admin->reg );
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+ const struct intelxl_admin_offsets *regs = admin->regs;
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+ void *admin_regs = ( intelxl->regs + admin->base );
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physaddr_t address;
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/* Allocate admin queue */
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@@ -147,30 +157,30 @@ static int intelxl_create_admin ( struct intelxl_nic *intelxl,
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memset ( admin->desc, 0, len );
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/* Reset head and tail registers */
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- writel ( 0, admin_regs + INTELXL_ADMIN_HEAD );
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- writel ( 0, admin_regs + INTELXL_ADMIN_TAIL );
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+ writel ( 0, admin_regs + regs->head );
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+ writel ( 0, admin_regs + regs->tail );
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/* Reset queue index */
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admin->index = 0;
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/* Program queue address */
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address = virt_to_bus ( admin->desc );
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- writel ( ( address & 0xffffffffUL ), admin_regs + INTELXL_ADMIN_BAL );
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+ writel ( ( address & 0xffffffffUL ), admin_regs + regs->bal );
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if ( sizeof ( physaddr_t ) > sizeof ( uint32_t ) ) {
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writel ( ( ( ( uint64_t ) address ) >> 32 ),
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- admin_regs + INTELXL_ADMIN_BAH );
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+ admin_regs + regs->bah );
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} else {
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- writel ( 0, admin_regs + INTELXL_ADMIN_BAH );
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+ writel ( 0, admin_regs + regs->bah );
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}
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/* Program queue length and enable queue */
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writel ( ( INTELXL_ADMIN_LEN_LEN ( INTELXL_ADMIN_NUM_DESC ) |
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INTELXL_ADMIN_LEN_ENABLE ),
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- admin_regs + INTELXL_ADMIN_LEN );
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+ admin_regs + regs->len );
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DBGC ( intelxl, "INTELXL %p A%cQ is at [%08llx,%08llx) buf "
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"[%08llx,%08llx)\n", intelxl,
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- ( ( admin->reg == INTELXL_ADMIN_CMD ) ? 'T' : 'R' ),
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+ ( ( admin == &intelxl->command ) ? 'T' : 'R' ),
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( ( unsigned long long ) address ),
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( ( unsigned long long ) address + len ),
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( ( unsigned long long ) virt_to_bus ( admin->buffer ) ),
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@@ -188,10 +198,11 @@ static int intelxl_create_admin ( struct intelxl_nic *intelxl,
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static void intelxl_destroy_admin ( struct intelxl_nic *intelxl,
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struct intelxl_admin *admin ) {
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size_t len = ( sizeof ( admin->desc[0] ) * INTELXL_ADMIN_NUM_DESC );
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- void *admin_regs = ( intelxl->regs + admin->reg );
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+ const struct intelxl_admin_offsets *regs = admin->regs;
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+ void *admin_regs = ( intelxl->regs + admin->base );
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/* Disable queue */
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- writel ( 0, admin_regs + INTELXL_ADMIN_LEN );
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+ writel ( 0, admin_regs + regs->len );
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/* Free queue */
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free_dma ( admin->desc, ( len + sizeof ( *admin->buffer ) ) );
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@@ -207,7 +218,8 @@ static void intelxl_destroy_admin ( struct intelxl_nic *intelxl,
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static int intelxl_admin_command ( struct intelxl_nic *intelxl,
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struct intelxl_admin_descriptor *cmd ) {
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struct intelxl_admin *admin = &intelxl->command;
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- void *admin_regs = ( intelxl->regs + admin->reg );
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+ const struct intelxl_admin_offsets *regs = admin->regs;
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+ void *admin_regs = ( intelxl->regs + admin->base );
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struct intelxl_admin_descriptor *desc;
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uint64_t buffer;
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unsigned int index;
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@@ -245,7 +257,7 @@ static int intelxl_admin_command ( struct intelxl_nic *intelxl,
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/* Post command descriptor */
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wmb();
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- writel ( tail, admin_regs + INTELXL_ADMIN_TAIL );
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+ writel ( tail, admin_regs + regs->tail );
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/* Wait for completion */
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for ( i = 0 ; i < INTELXL_ADMIN_MAX_WAIT_MS ; i++ ) {
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@@ -558,13 +570,14 @@ static int intelxl_admin_link ( struct net_device *netdev ) {
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*/
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static void intelxl_refill_admin ( struct intelxl_nic *intelxl ) {
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struct intelxl_admin *admin = &intelxl->event;
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- void *admin_regs = ( intelxl->regs + admin->reg );
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+ const struct intelxl_admin_offsets *regs = admin->regs;
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+ void *admin_regs = ( intelxl->regs + admin->base );
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unsigned int tail;
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/* Update tail pointer */
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tail = ( ( admin->index + INTELXL_ADMIN_NUM_DESC - 1 ) %
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INTELXL_ADMIN_NUM_DESC );
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- writel ( tail, admin_regs + INTELXL_ADMIN_TAIL );
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+ writel ( tail, admin_regs + regs->tail );
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}
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/**
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@@ -1383,8 +1396,10 @@ static int intelxl_probe ( struct pci_device *pci ) {
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netdev->dev = &pci->dev;
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memset ( intelxl, 0, sizeof ( *intelxl ) );
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intelxl->pf = PCI_FUNC ( pci->busdevfn );
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- intelxl_init_admin ( &intelxl->command, INTELXL_ADMIN_CMD );
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- intelxl_init_admin ( &intelxl->event, INTELXL_ADMIN_EVT );
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+ intelxl_init_admin ( &intelxl->command, INTELXL_ADMIN_CMD,
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+ &intelxl_admin_offsets );
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+ intelxl_init_admin ( &intelxl->event, INTELXL_ADMIN_EVT,
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+ &intelxl_admin_offsets );
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intelxl_init_ring ( &intelxl->tx, INTELXL_TX_NUM_DESC,
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intelxl_context_tx );
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intelxl_init_ring ( &intelxl->rx, INTELXL_RX_NUM_DESC,
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