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@@ -43,42 +43,83 @@ IOAPI_INLINE ( arm, bus_to_phys ) ( unsigned long bus_addr ) {
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*
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*/
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-#define ARM_READX( _api_func, _type, _insn_suffix, _reg_prefix ) \
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+#define ARM_READX( _suffix, _type, _insn_suffix, _reg_prefix ) \
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static inline __always_inline _type \
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-IOAPI_INLINE ( arm, _api_func ) ( volatile _type *io_addr ) { \
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+IOAPI_INLINE ( arm, read ## _suffix ) ( volatile _type *io_addr ) { \
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_type data; \
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__asm__ __volatile__ ( "ldr" _insn_suffix " %" _reg_prefix "0, %1" \
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: "=r" ( data ) : "Qo" ( *io_addr ) ); \
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return data; \
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}
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#ifdef __aarch64__
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-ARM_READX ( readb, uint8_t, "b", "w" );
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-ARM_READX ( readw, uint16_t, "h", "w" );
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-ARM_READX ( readl, uint32_t, "", "w" );
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-ARM_READX ( readq, uint64_t, "", "" );
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+ARM_READX ( b, uint8_t, "b", "w" );
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+ARM_READX ( w, uint16_t, "h", "w" );
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+ARM_READX ( l, uint32_t, "", "w" );
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+ARM_READX ( q, uint64_t, "", "" );
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#else
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-ARM_READX ( readb, uint8_t, "b", "" );
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-ARM_READX ( readw, uint16_t, "h", "" );
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-ARM_READX ( readl, uint32_t, "", "" );
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+ARM_READX ( b, uint8_t, "b", "" );
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+ARM_READX ( w, uint16_t, "h", "" );
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+ARM_READX ( l, uint32_t, "", "" );
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#endif
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-#define ARM_WRITEX( _api_func, _type, _insn_suffix, _reg_prefix ) \
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+#define ARM_WRITEX( _suffix, _type, _insn_suffix, _reg_prefix ) \
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static inline __always_inline void \
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-IOAPI_INLINE ( arm, _api_func ) ( _type data, volatile _type *io_addr ) { \
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+IOAPI_INLINE ( arm, write ## _suffix ) ( _type data, \
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+ volatile _type *io_addr ) { \
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__asm__ __volatile__ ( "str" _insn_suffix " %" _reg_prefix "0, %1" \
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: : "r" ( data ), "Qo" ( *io_addr ) ); \
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}
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#ifdef __aarch64__
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-ARM_WRITEX ( writeb, uint8_t, "b", "w" );
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-ARM_WRITEX ( writew, uint16_t, "h", "w" );
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-ARM_WRITEX ( writel, uint32_t, "", "w" );
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-ARM_WRITEX ( writeq, uint64_t, "", "" );
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+ARM_WRITEX ( b, uint8_t, "b", "w" );
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+ARM_WRITEX ( w, uint16_t, "h", "w" );
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+ARM_WRITEX ( l, uint32_t, "", "w" );
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+ARM_WRITEX ( q, uint64_t, "", "" );
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#else
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-ARM_WRITEX ( writeb, uint8_t, "b", "" );
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-ARM_WRITEX ( writew, uint16_t, "h", "" );
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-ARM_WRITEX ( writel, uint32_t, "", "" );
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+ARM_WRITEX ( b, uint8_t, "b", "" );
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+ARM_WRITEX ( w, uint16_t, "h", "" );
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+ARM_WRITEX ( l, uint32_t, "", "" );
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#endif
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+/*
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+ * Dummy PIO reads and writes up to 32 bits
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+ *
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+ * There is no common standard for I/O-space access for ARM, and
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+ * non-MMIO peripherals are vanishingly rare. Provide dummy
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+ * implementations that will allow code to link and should cause
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+ * drivers to simply fail to detect hardware at runtime.
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+ *
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+ */
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+
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+#define ARM_INX( _suffix, _type ) \
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+static inline __always_inline _type \
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+IOAPI_INLINE ( arm, in ## _suffix ) ( volatile _type *io_addr __unused) { \
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+ return ~( (_type) 0 ); \
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+} \
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+static inline __always_inline void \
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+IOAPI_INLINE ( arm, ins ## _suffix ) ( volatile _type *io_addr __unused, \
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+ _type *data, unsigned int count ) { \
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+ memset ( data, 0xff, count * sizeof ( *data ) ); \
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+}
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+ARM_INX ( b, uint8_t );
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+ARM_INX ( w, uint16_t );
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+ARM_INX ( l, uint32_t );
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+
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+#define ARM_OUTX( _suffix, _type ) \
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+static inline __always_inline void \
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+IOAPI_INLINE ( arm, out ## _suffix ) ( _type data __unused, \
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+ volatile _type *io_addr __unused ) { \
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+ /* Do nothing */ \
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+} \
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+static inline __always_inline void \
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+IOAPI_INLINE ( arm, outs ## _suffix ) ( volatile _type *io_addr __unused, \
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+ const _type *data __unused, \
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+ unsigned int count __unused ) { \
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+ /* Do nothing */ \
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+}
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+ARM_OUTX ( b, uint8_t );
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+ARM_OUTX ( w, uint16_t );
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+ARM_OUTX ( l, uint32_t );
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+
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/*
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* Slow down I/O
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*
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