[ethernet] Update mii.h and use it in drivers that had a private copy

Signed-off-by: Michael Brown <mcb30@etherboot.org>

src/drivers/net/bnx2.c

@@ -20,6 +20,7 @@ FILE_LICENCE ( GPL_ANY );
 #include <gpxe/pci.h>
 #include <gpxe/ethernet.h>
 #include "string.h"
+#include <mii.h>
 #include "bnx2.h"
 #include "bnx2_fw.h"
 

src/drivers/net/bnx2.h

@@ -92,113 +92,6 @@ typedef int pci_power_t;
 #define WAKE_MAGIC		(1 << 5)
 #define WAKE_MAGICSECURE	(1 << 6) /* only meaningful if WAKE_MAGIC */
 
-/* Generic MII registers. */
-
-#define MII_BMCR            0x00        /* Basic mode control register */
-#define MII_BMSR            0x01        /* Basic mode status register  */
-#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
-#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
-#define MII_ADVERTISE       0x04        /* Advertisement control reg   */
-#define MII_LPA             0x05        /* Link partner ability reg    */
-#define MII_EXPANSION       0x06        /* Expansion register          */
-#define MII_CTRL1000        0x09        /* 1000BASE-T control          */
-#define MII_STAT1000        0x0a        /* 1000BASE-T status           */
-#define MII_DCOUNTER        0x12        /* Disconnect counter          */
-#define MII_FCSCOUNTER      0x13        /* False carrier counter       */
-#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
-#define MII_RERRCOUNTER     0x15        /* Receive error counter       */
-#define MII_SREVISION       0x16        /* Silicon revision            */
-#define MII_RESV1           0x17        /* Reserved...                 */
-#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
-#define MII_PHYADDR         0x19        /* PHY address                 */
-#define MII_RESV2           0x1a        /* Reserved...                 */
-#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
-#define MII_NCONFIG         0x1c        /* Network interface config    */
-
-/* Basic mode control register. */
-#define BMCR_RESV               0x007f  /* Unused...                   */
-#define BMCR_SPEED1000		0x0040  /* MSB of Speed (1000)         */
-#define BMCR_CTST               0x0080  /* Collision test              */
-#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
-#define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
-#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
-#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
-#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
-#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
-#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
-#define BMCR_RESET              0x8000  /* Reset the DP83840           */
-
-/* Basic mode status register. */
-#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
-#define BMSR_JCD                0x0002  /* Jabber detected             */
-#define BMSR_LSTATUS            0x0004  /* Link status                 */
-#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
-#define BMSR_RFAULT             0x0010  /* Remote fault detected       */
-#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
-#define BMSR_RESV               0x07c0  /* Unused...                   */
-#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
-#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
-#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
-#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
-
-/* Advertisement control register. */
-#define ADVERTISE_SLCT          0x001f  /* Selector bits               */
-#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
-#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
-#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
-#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
-#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
-#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
-#define ADVERTISE_RESV          0x1c00  /* Unused...                   */
-#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
-#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
-#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
-#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
-#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
-#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
-#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
-#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
-#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
-#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
-
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
-                       ADVERTISE_100HALF | ADVERTISE_100FULL)
-
-/* Link partner ability register. */
-#define LPA_SLCT                0x001f  /* Same as advertise selector  */
-#define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
-#define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
-#define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
-#define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
-#define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
-#define LPA_RESV                0x1c00  /* Unused...                   */
-#define LPA_RFAULT              0x2000  /* Link partner faulted        */
-#define LPA_LPACK               0x4000  /* Link partner acked us       */
-#define LPA_NPAGE               0x8000  /* Next page bit               */
-
-#define LPA_DUPLEX		(LPA_10FULL | LPA_100FULL)
-#define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
-
-/* Expansion register for auto-negotiation. */
-#define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */
-#define EXPANSION_LCWP          0x0002  /* Got new RX page code word   */
-#define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */
-#define EXPANSION_NPCAPABLE     0x0008  /* Link partner supports npage */
-#define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
-#define EXPANSION_RESV          0xffe0  /* Unused...                   */
-
-/* 1000BASE-T Control register */
-#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
-#define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */
-
-/* N-way test register. */
-#define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
-#define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
-#define NWAYTEST_RESV2          0xfe00  /* Unused...                   */
-
 /* The following are all involved in forcing a particular link
  *  * mode for the device for setting things.  When getting the
  *   * devices settings, these indicate the current mode and whether

src/drivers/net/etherfabric.c

@@ -32,6 +32,7 @@ FILE_LICENCE ( GPL_ANY );
 #include <gpxe/iobuf.h>
 #include <gpxe/netdevice.h>
 #include <gpxe/timer.h>
+#include <mii.h>
 #include "etherfabric.h"
 #include "etherfabric_nic.h"
 
@@ -84,39 +85,23 @@ static void falcon_mdio_write (struct efab_nic *efab, int device,
 static int falcon_mdio_read ( struct efab_nic *efab, int device, int location );
 
 /* GMII registers */
-#define MII_BMSR		0x01	/* Basic mode status register  */
-#define MII_ADVERTISE		0x04	/* Advertisement control register */
-#define MII_LPA			0x05	/* Link partner ability register*/
-#define GMII_GTCR		0x09	/* 1000BASE-T control register */
-#define GMII_GTSR		0x0a	/* 1000BASE-T status register */
 #define GMII_PSSR		0x11	/* PHY-specific status register */
 
-/* Basic mode status register. */
-#define BMSR_LSTATUS		0x0004	/* Link status                 */
-
-/* Link partner ability register. */
-#define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
-#define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
-#define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
-#define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
-#define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
-#define LPA_PAUSE		0x0400	/* Bit 10 - MAC pause */
-
 /* Pseudo extensions to the link partner ability register */
-#define LPA_1000FULL		0x00020000
-#define LPA_1000HALF		0x00010000
-#define LPA_10000FULL		0x00040000
-#define LPA_10000HALF		0x00080000
+#define LPA_EF_1000FULL		0x00020000
+#define LPA_EF_1000HALF		0x00010000
+#define LPA_EF_10000FULL		0x00040000
+#define LPA_EF_10000HALF		0x00080000
 
 #define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
-#define LPA_1000		( LPA_1000FULL | LPA_1000HALF )
-#define LPA_10000               ( LPA_10000FULL | LPA_10000HALF )
-#define LPA_DUPLEX		( LPA_10FULL | LPA_100FULL | LPA_1000FULL | \
-				  LPA_10000FULL )
+#define LPA_EF_1000		( LPA_EF_1000FULL | LPA_EF_1000HALF )
+#define LPA_EF_10000               ( LPA_EF_10000FULL | LPA_EF_10000HALF )
+#define LPA_EF_DUPLEX		( LPA_10FULL | LPA_100FULL | LPA_EF_1000FULL | \
+				  LPA_EF_10000FULL )
 
 /* Mask of bits not associated with speed or duplexity. */
 #define LPA_OTHER		~( LPA_10FULL | LPA_10HALF | LPA_100FULL | \
-				   LPA_100HALF | LPA_1000FULL | LPA_1000HALF )
+				   LPA_100HALF | LPA_EF_1000FULL | LPA_EF_1000HALF )
 
 /* PHY-specific status register */
 #define PSSR_LSTATUS		0x0400	/* Bit 10 - link status */
@@ -131,9 +116,9 @@ gmii_autoneg_advertised ( struct efab_nic *efab )
 	unsigned int mii_advertise;
 	unsigned int gmii_advertise;
 
-	/* Extended bits are in bits 8 and 9 of GMII_GTCR */
+	/* Extended bits are in bits 8 and 9 of MII_CTRL1000 */
 	mii_advertise = falcon_mdio_read ( efab, 0, MII_ADVERTISE );
-	gmii_advertise = ( ( falcon_mdio_read ( efab, 0, GMII_GTCR ) >> 8 )
+	gmii_advertise = ( ( falcon_mdio_read ( efab, 0, MII_CTRL1000 ) >> 8 )
 			   & 0x03 );
 	return ( ( gmii_advertise << 16 ) | mii_advertise );
 }
@@ -148,9 +133,9 @@ gmii_autoneg_lpa ( struct efab_nic *efab )
 	unsigned int mii_lpa;
 	unsigned int gmii_lpa;
 
-	/* Extended bits are in bits 10 and 11 of GMII_GTSR */
+	/* Extended bits are in bits 10 and 11 of MII_STAT1000 */
 	mii_lpa = falcon_mdio_read ( efab, 0, MII_LPA );
-	gmii_lpa = ( falcon_mdio_read ( efab, 0, GMII_GTSR ) >> 10 ) & 0x03;
+	gmii_lpa = ( falcon_mdio_read ( efab, 0, MII_STAT1000 ) >> 10 ) & 0x03;
 	return ( ( gmii_lpa << 16 ) | mii_lpa );
 }
 
@@ -166,10 +151,10 @@ gmii_nway_result ( unsigned int negotiated )
 	/* Mask out the speed and duplexity bits */
 	other_bits = negotiated & LPA_OTHER;
 
-	if ( negotiated & LPA_1000FULL )
-		return ( other_bits | LPA_1000FULL );
-	else if ( negotiated & LPA_1000HALF )
-		return ( other_bits | LPA_1000HALF );
+	if ( negotiated & LPA_EF_1000FULL )
+		return ( other_bits | LPA_EF_1000FULL );
+	else if ( negotiated & LPA_EF_1000HALF )
+		return ( other_bits | LPA_EF_1000HALF );
 	else if ( negotiated & LPA_100FULL )
 		return ( other_bits | LPA_100FULL );
 	else if ( negotiated & LPA_100BASE4 )
@@ -1740,9 +1725,9 @@ falcon_reconfigure_mac_wrapper ( struct efab_nic *efab )
 	efab_oword_t reg;
 	int link_speed;
 
-	if ( efab->link_options & LPA_10000 ) {
+	if ( efab->link_options & LPA_EF_10000 ) {
 		link_speed = 0x3;
-	} else if ( efab->link_options & LPA_1000 ) {
+	} else if ( efab->link_options & LPA_EF_1000 ) {
 		link_speed = 0x2;
 	} else if ( efab->link_options & LPA_100 ) {
 		link_speed = 0x1;
@@ -1951,8 +1936,8 @@ mentormac_init ( struct efab_nic *efab )
 	efab_dword_t reg;
 
 	/* Configuration register 1 */
-	pause = ( efab->link_options & LPA_PAUSE ) ? 1 : 0;
-	if ( ! ( efab->link_options & LPA_DUPLEX ) ) {
+	pause = ( efab->link_options & LPA_PAUSE_CAP ) ? 1 : 0;
+	if ( ! ( efab->link_options & LPA_EF_DUPLEX ) ) {
 		/* Half-duplex operation requires TX flow control */
 		pause = 1;
 	}
@@ -1965,8 +1950,8 @@ mentormac_init ( struct efab_nic *efab )
 	udelay ( 10 );
 
 	/* Configuration register 2 */
-	if_mode = ( efab->link_options & LPA_1000 ) ? 2 : 1;
-	full_duplex = ( efab->link_options & LPA_DUPLEX ) ? 1 : 0;
+	if_mode = ( efab->link_options & LPA_EF_1000 ) ? 2 : 1;
+	full_duplex = ( efab->link_options & LPA_EF_DUPLEX ) ? 1 : 0;
 	EFAB_POPULATE_DWORD_4 ( reg,
 				GM_IF_MODE, if_mode,
 				GM_PAD_CRC_EN, 1,
@@ -2018,8 +2003,8 @@ mentormac_init ( struct efab_nic *efab )
 	udelay ( 10 );
 	
 	/* FIFO configuration register 5 */
-	bytemode = ( efab->link_options & LPA_1000 ) ? 1 : 0;
-	half_duplex = ( efab->link_options & LPA_DUPLEX ) ? 0 : 1;
+	bytemode = ( efab->link_options & LPA_EF_1000 ) ? 1 : 0;
+	half_duplex = ( efab->link_options & LPA_EF_DUPLEX ) ? 0 : 1;
 	falcon_gmac_readl ( efab, &reg, GMF_CFG5_REG_MAC );
 	EFAB_SET_DWORD_FIELD ( reg, GMF_CFGBYTMODE, bytemode );
 	EFAB_SET_DWORD_FIELD ( reg, GMF_CFGHDPLX, half_duplex );
@@ -2415,7 +2400,7 @@ static int
 falcon_xaui_phy_init ( struct efab_nic *efab )
 {
 	/* CX4 is always 10000FD only */
-	efab->link_options = LPA_10000FULL;
+	efab->link_options = LPA_EF_10000FULL;
 
 	/* There is no PHY! */
 	return 0;
@@ -2480,7 +2465,7 @@ falcon_xfp_phy_init ( struct efab_nic *efab )
 	int rc;
 
 	/* Optical link is always 10000FD only */
-	efab->link_options = LPA_10000FULL;
+	efab->link_options = LPA_EF_10000FULL;
 
 	/* Reset the PHY */
 	rc = mdio_clause45_reset_mmd ( efab, MDIO_MMD_PHYXS );
@@ -2567,7 +2552,7 @@ falcon_txc_phy_init ( struct efab_nic *efab )
 	int rc;
 
 	/* CX4 is always 10000FD only */
-	efab->link_options = LPA_10000FULL;
+	efab->link_options = LPA_EF_10000FULL;
 
 	/* reset the phy */
 	rc = mdio_clause45_reset_mmd ( efab, MDIO_MMD_PMAPMD );
@@ -2685,7 +2670,7 @@ falcon_tenxpress_phy_init ( struct efab_nic *efab )
 	int rc, reg;
 
 	/* 10XPRESS is always 10000FD (at the moment) */
-	efab->link_options = LPA_10000FULL;
+	efab->link_options = LPA_EF_10000FULL;
 
 	/* Wait for the blocks to come out of reset */
 	rc = mdio_clause45_wait_reset_mmds ( efab );
@@ -2765,7 +2750,7 @@ falcon_pm8358_phy_init ( struct efab_nic *efab )
 	int rc, reg, i;
 
 	/* This is a XAUI retimer part */
-	efab->link_options = LPA_10000FULL;
+	efab->link_options = LPA_EF_10000FULL;
 
 	rc = mdio_clause45_reset_mmd ( efab, MDIO_MMDREG_DEVS0_DTEXS );
 	if ( rc )
@@ -4039,10 +4024,10 @@ efab_init_mac ( struct efab_nic *efab )
 		}
 
 		EFAB_LOG ( "\n%dMbps %s-duplex\n",
-			   ( efab->link_options & LPA_10000 ? 10000 :
-			     ( efab->link_options & LPA_1000 ? 1000 :
+			   ( efab->link_options & LPA_EF_10000 ? 10000 :
+			     ( efab->link_options & LPA_EF_1000 ? 1000 :
 			       ( efab->link_options & LPA_100 ? 100 : 10 ) ) ),
-			   ( efab->link_options & LPA_DUPLEX ?
+			   ( efab->link_options & LPA_EF_DUPLEX ?
 			     "full" : "half" ) );
 
 		/* TODO: Move link state handling to the poll() routine */

src/drivers/net/forcedeth.c

@@ -373,13 +373,6 @@ enum {
 #define PHY_1000	0x2
 #define PHY_HALF	0x100
 
-/* FIXME: MII defines that should be added to <linux/mii.h> */
-#define MII_1000BT_CR	0x09
-#define MII_1000BT_SR	0x0a
-#define ADVERTISE_1000FULL	0x0200
-#define ADVERTISE_1000HALF	0x0100
-#define LPA_1000FULL	0x0800
-#define LPA_1000HALF	0x0400
 
 /* Bit to know if MAC addr is stored in correct order */
 #define MAC_ADDR_CORRECT	0x01
@@ -465,26 +458,6 @@ static int reg_delay(int offset, u32 mask,
 }
 
 #define MII_READ	(-1)
-#define MII_PHYSID1         0x02	/* PHYS ID 1                   */
-#define MII_PHYSID2         0x03	/* PHYS ID 2                   */
-#define MII_BMCR            0x00	/* Basic mode control register */
-#define MII_BMSR            0x01	/* Basic mode status register  */
-#define MII_ADVERTISE       0x04	/* Advertisement control reg   */
-#define MII_LPA             0x05	/* Link partner ability reg    */
-
-#define BMSR_ANEGCOMPLETE       0x0020	/* Auto-negotiation complete   */
-
-/* Link partner ability register. */
-#define LPA_SLCT                0x001f	/* Same as advertise selector  */
-#define LPA_10HALF              0x0020	/* Can do 10mbps half-duplex   */
-#define LPA_10FULL              0x0040	/* Can do 10mbps full-duplex   */
-#define LPA_100HALF             0x0080	/* Can do 100mbps half-duplex  */
-#define LPA_100FULL             0x0100	/* Can do 100mbps full-duplex  */
-#define LPA_100BASE4            0x0200	/* Can do 100mbps 4k packets   */
-#define LPA_RESV                0x1c00	/* Unused...                   */
-#define LPA_RFAULT              0x2000	/* Link partner faulted        */
-#define LPA_LPACK               0x4000	/* Link partner acked us       */
-#define LPA_NPAGE               0x8000	/* Next page bit               */
 
 /* mii_rw: read/write a register on the PHY.
  *
@@ -586,7 +559,7 @@ static int phy_init(struct nic *nic)
 	if (mii_status & PHY_GIGABIT) {
 		np->gigabit = PHY_GIGABIT;
 		mii_control_1000 =
-		    mii_rw(nic, np->phyaddr, MII_1000BT_CR, MII_READ);
+		    mii_rw(nic, np->phyaddr, MII_CTRL1000, MII_READ);
 		mii_control_1000 &= ~ADVERTISE_1000HALF;
 		if (phyinterface & PHY_RGMII)
 			mii_control_1000 |= ADVERTISE_1000FULL;
@@ -594,7 +567,7 @@ static int phy_init(struct nic *nic)
 			mii_control_1000 &= ~ADVERTISE_1000FULL;
 
 		if (mii_rw
-		    (nic, np->phyaddr, MII_1000BT_CR, mii_control_1000)) {
+		    (nic, np->phyaddr, MII_CTRL1000, mii_control_1000)) {
 			printf("phy init failed.\n");
 			return PHY_ERROR;
 		}
@@ -788,9 +761,9 @@ static int update_linkspeed(struct nic *nic)
 	retval = 1;
 	if (np->gigabit == PHY_GIGABIT) {
 		control_1000 =
-		    mii_rw(nic, np->phyaddr, MII_1000BT_CR, MII_READ);
+		    mii_rw(nic, np->phyaddr, MII_CTRL1000, MII_READ);
 		status_1000 =
-		    mii_rw(nic, np->phyaddr, MII_1000BT_SR, MII_READ);
+		    mii_rw(nic, np->phyaddr, MII_STAT1000, MII_READ);
 
 		if ((control_1000 & ADVERTISE_1000FULL) &&
 		    (status_1000 & LPA_1000FULL)) {

src/drivers/net/mtd80x.c

@@ -32,6 +32,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
 /* to get the PCI support functions, if this is a PCI NIC */
 #include <gpxe/pci.h>
 #include <gpxe/ethernet.h>
+#include <mii.h>
 
 /* Condensed operations for readability. */
 #define virt_to_le32desc(addr)  cpu_to_le32(virt_to_bus(addr))
@@ -61,71 +62,6 @@ FILE_LICENCE ( GPL2_OR_LATER );
  */
 #define PKT_BUF_SZ 1536
 
-/* Generic MII registers. */
-
-#define MII_BMCR            0x00        /* Basic mode control register */
-#define MII_BMSR            0x01        /* Basic mode status register  */
-#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
-#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
-#define MII_ADVERTISE       0x04        /* Advertisement control reg   */
-#define MII_LPA             0x05        /* Link partner ability reg    */
-#define MII_EXPANSION       0x06        /* Expansion register          */
-#define MII_DCOUNTER        0x12        /* Disconnect counter          */
-#define MII_FCSCOUNTER      0x13        /* False carrier counter       */
-#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
-#define MII_RERRCOUNTER     0x15        /* Receive error counter       */
-#define MII_SREVISION       0x16        /* Silicon revision            */
-#define MII_RESV1           0x17        /* Reserved...                 */
-#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
-#define MII_PHYADDR         0x19        /* PHY address                 */
-#define MII_RESV2           0x1a        /* Reserved...                 */
-#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
-#define MII_NCONFIG         0x1c        /* Network interface config    */
-
-/* Basic mode control register. */
-#define BMCR_RESV               0x007f  /* Unused...                   */
-#define BMCR_CTST               0x0080  /* Collision test              */
-#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
-#define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
-#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
-#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
-#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
-#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
-#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
-#define BMCR_RESET              0x8000  /* Reset the DP83840           */
-
-/* Basic mode status register. */
-#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
-#define BMSR_JCD                0x0002  /* Jabber detected             */
-#define BMSR_LSTATUS            0x0004  /* Link status                 */
-#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
-#define BMSR_RFAULT             0x0010  /* Remote fault detected       */
-#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
-#define BMSR_RESV               0x07c0  /* Unused...                   */
-#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
-#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
-#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
-#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
-
-/* Advertisement control register. */
-#define ADVERTISE_SLCT          0x001f  /* Selector bits               */
-#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
-#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
-#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
-#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
-#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
-#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
-#define ADVERTISE_RESV          0x1c00  /* Unused...                   */
-#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
-#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
-#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
-
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
-                       ADVERTISE_100HALF | ADVERTISE_100FULL)
-
 /* for different PHY */
 enum phy_type_flags {
     MysonPHY = 1,

src/drivers/net/r8169.c

@@ -41,6 +41,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
 #include <gpxe/netdevice.h>
 #include <gpxe/pci.h>
 #include <gpxe/timer.h>
+#include <mii.h>
 
 #include "r8169.h"
 

src/drivers/net/r8169.h

@@ -54,90 +54,9 @@ FILE_LICENCE ( GPL2_OR_LATER );
 #define DUPLEX_HALF		0x00
 #define DUPLEX_FULL		0x01
 
-/* Generic MII registers. */
-
-#define MII_BMCR            0x00        /* Basic mode control register */
-#define MII_BMSR            0x01        /* Basic mode status register  */
-#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
-#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
-#define MII_ADVERTISE       0x04        /* Advertisement control reg   */
-#define MII_LPA             0x05        /* Link partner ability reg    */
-#define MII_EXPANSION       0x06        /* Expansion register          */
-#define MII_CTRL1000        0x09        /* 1000BASE-T control          */
-#define MII_STAT1000        0x0a        /* 1000BASE-T status           */
-#define MII_ESTATUS	    0x0f	/* Extended Status */
-#define MII_DCOUNTER        0x12        /* Disconnect counter          */
-#define MII_FCSCOUNTER      0x13        /* False carrier counter       */
-#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
-#define MII_RERRCOUNTER     0x15        /* Receive error counter       */
-#define MII_SREVISION       0x16        /* Silicon revision            */
-#define MII_RESV1           0x17        /* Reserved...                 */
-#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
-#define MII_PHYADDR         0x19        /* PHY address                 */
-#define MII_RESV2           0x1a        /* Reserved...                 */
-#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
-#define MII_NCONFIG         0x1c        /* Network interface config    */
-
-/* Basic mode control register. */
-#define BMCR_RESV               0x003f  /* Unused...                   */
-#define BMCR_SPEED1000		0x0040  /* MSB of Speed (1000)         */
-#define BMCR_CTST               0x0080  /* Collision test              */
-#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
-#define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
-#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
-#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
-#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
-#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
-#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
-#define BMCR_RESET              0x8000  /* Reset the DP83840           */
-
-/* Basic mode status register. */
-#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
-#define BMSR_JCD                0x0002  /* Jabber detected             */
-#define BMSR_LSTATUS            0x0004  /* Link status                 */
-#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
-#define BMSR_RFAULT             0x0010  /* Remote fault detected       */
-#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
-#define BMSR_RESV               0x00c0  /* Unused...                   */
-#define BMSR_ESTATEN		0x0100	/* Extended Status in R15 */
-#define BMSR_100HALF2           0x0200  /* Can do 100BASE-T2 HDX */
-#define BMSR_100FULL2           0x0400  /* Can do 100BASE-T2 FDX */
-#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
-#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
-#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
-#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
-
 #define AUTONEG_DISABLE		0x00
 #define AUTONEG_ENABLE		0x01
 
-#define MII_ADVERTISE           0x04        /* Advertisement control reg   */
-#define ADVERTISE_SLCT          0x001f  /* Selector bits               */
-#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
-#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
-#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
-#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
-#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
-#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
-#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
-#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
-#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
-#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
-#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
-#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
-#define ADVERTISE_RESV          0x1000  /* Unused...                   */
-#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
-#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
-#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
-		       ADVERTISE_100HALF | ADVERTISE_100FULL)
-
-/* 1000BASE-T Control register */
-#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
-#define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */
-
 /* MAC address length */
 #define MAC_ADDR_LEN	6
 

src/drivers/net/smc9000.h

@@ -231,14 +231,6 @@ typedef unsigned long int		dword;
 #define RS_MULTICAST	0x0001
 #define RS_ERRORS	(RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
 
-// Management Interface Register (MII)
-#define MII_REG         0x0008
-#define MII_MSK_CRS100  0x4000 // Disables CRS100 detection during tx half dup
-#define MII_MDOE        0x0008 // MII Output Enable
-#define MII_MCLK        0x0004 // MII Clock, pin MDCLK
-#define MII_MDI         0x0002 // MII Input, pin MDI
-#define MII_MDO         0x0001 // MII Output, pin MDO
-
 // PHY Register Addresses (LAN91C111 Internal PHY)
 
 // PHY Control Register

src/drivers/net/tg3.c

@@ -20,6 +20,7 @@ FILE_LICENCE ( GPL2_ONLY );
 #include <gpxe/pci.h>
 #include <gpxe/ethernet.h>
 #include "string.h"
+#include <mii.h>
 #include "tg3.h"
 
 #define SUPPORT_COPPER_PHY  1

src/drivers/net/tg3.h

@@ -77,100 +77,6 @@ typedef unsigned long dma_addr_t;
 #define WAKE_MAGIC		(1 << 5)
 #define WAKE_MAGICSECURE	(1 << 6) /* only meaningful if WAKE_MAGIC */
 
-/* Generic MII registers. */
-
-#define MII_BMCR            0x00        /* Basic mode control register */
-#define MII_BMSR            0x01        /* Basic mode status register  */
-#define MII_PHYSID1         0x02        /* PHYS ID 1                   */
-#define MII_PHYSID2         0x03        /* PHYS ID 2                   */
-#define MII_ADVERTISE       0x04        /* Advertisement control reg   */
-#define MII_LPA             0x05        /* Link partner ability reg    */
-#define MII_EXPANSION       0x06        /* Expansion register          */
-#define MII_DCOUNTER        0x12        /* Disconnect counter          */
-#define MII_FCSCOUNTER      0x13        /* False carrier counter       */
-#define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
-#define MII_RERRCOUNTER     0x15        /* Receive error counter       */
-#define MII_SREVISION       0x16        /* Silicon revision            */
-#define MII_RESV1           0x17        /* Reserved...                 */
-#define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
-#define MII_PHYADDR         0x19        /* PHY address                 */
-#define MII_RESV2           0x1a        /* Reserved...                 */
-#define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
-#define MII_NCONFIG         0x1c        /* Network interface config    */
-
-/* Basic mode control register. */
-#define BMCR_RESV               0x007f  /* Unused...                   */
-#define BMCR_CTST               0x0080  /* Collision test              */
-#define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
-#define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
-#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
-#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
-#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
-#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
-#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
-#define BMCR_RESET              0x8000  /* Reset the DP83840           */
-
-/* Basic mode status register. */
-#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
-#define BMSR_JCD                0x0002  /* Jabber detected             */
-#define BMSR_LSTATUS            0x0004  /* Link status                 */
-#define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
-#define BMSR_RFAULT             0x0010  /* Remote fault detected       */
-#define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
-#define BMSR_RESV               0x07c0  /* Unused...                   */
-#define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
-#define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
-#define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
-#define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
-#define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
-
-/* Advertisement control register. */
-#define ADVERTISE_SLCT          0x001f  /* Selector bits               */
-#define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
-#define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
-#define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
-#define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
-#define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
-#define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
-#define ADVERTISE_RESV          0x1c00  /* Unused...                   */
-#define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
-#define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
-#define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
-
-#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
-			ADVERTISE_CSMA)
-#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
-                       ADVERTISE_100HALF | ADVERTISE_100FULL)
-
-/* Link partner ability register. */
-#define LPA_SLCT                0x001f  /* Same as advertise selector  */
-#define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
-#define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
-#define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
-#define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
-#define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
-#define LPA_RESV                0x1c00  /* Unused...                   */
-#define LPA_RFAULT              0x2000  /* Link partner faulted        */
-#define LPA_LPACK               0x4000  /* Link partner acked us       */
-#define LPA_NPAGE               0x8000  /* Next page bit               */
-
-#define LPA_DUPLEX		(LPA_10FULL | LPA_100FULL)
-#define LPA_100			(LPA_100FULL | LPA_100HALF | LPA_100BASE4)
-
-/* Expansion register for auto-negotiation. */
-#define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */
-#define EXPANSION_LCWP          0x0002  /* Got new RX page code word   */
-#define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */
-#define EXPANSION_NPCAPABLE     0x0008  /* Link partner supports npage */
-#define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
-#define EXPANSION_RESV          0xffe0  /* Unused...                   */
-
-/* N-way test register. */
-#define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
-#define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
-#define NWAYTEST_RESV2          0xfe00  /* Unused...                   */
-
-
 /* From tg3.h */
 
 #define TG3_64BIT_REG_HIGH		0x00UL
@@ -1634,19 +1540,6 @@ typedef unsigned long dma_addr_t;
 #define MII_TG3_INT_DUPLEXCHG		0x0008
 #define MII_TG3_INT_ANEG_PAGE_RX	0x0400
 
-/* XXX Add this to mii.h */
-#ifndef ADVERTISE_PAUSE
-#define ADVERTISE_PAUSE_CAP		0x0400
-#endif
-#ifndef ADVERTISE_PAUSE_ASYM
-#define ADVERTISE_PAUSE_ASYM		0x0800
-#endif
-#ifndef LPA_PAUSE
-#define LPA_PAUSE_CAP			0x0400
-#endif
-#ifndef LPA_PAUSE_ASYM
-#define LPA_PAUSE_ASYM			0x0800
-#endif
 
 /* There are two ways to manage the TX descriptors on the tigon3.
  * Either the descriptors are in host DMA'able memory, or they

src/drivers/net/tlan.c

@@ -44,6 +44,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
 #include "nic.h"
 #include <gpxe/pci.h>
 #include <gpxe/ethernet.h>
+#include <mii.h>
 #include "tlan.h"
 
 #define drv_version "v1.4"
@@ -400,21 +401,21 @@ void TLan_FinishReset(struct nic *nic)
 	}
 	TLan_DioWrite8(BASE, TLAN_NET_MASK, data);
 	TLan_DioWrite16(BASE, TLAN_MAX_RX, ((1536) + 7) & ~7);
-	TLan_MiiReadReg(nic, phy, MII_GEN_ID_HI, &tlphy_id1);
-	TLan_MiiReadReg(nic, phy, MII_GEN_ID_LO, &tlphy_id2);
+	TLan_MiiReadReg(nic, phy, MII_PHYSID1, &tlphy_id1);
+	TLan_MiiReadReg(nic, phy, MII_PHYSID2, &tlphy_id2);
 
 	if ((tlan_pci_tbl[chip_idx].flags & TLAN_ADAPTER_UNMANAGED_PHY)
 	    || (priv->aui)) {
-		status = MII_GS_LINK;
+		status = BMSR_LSTATUS;
 		DBG ( "TLAN:  %s: Link forced.\n", priv->nic_name );
 	} else {
-		TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
+		TLan_MiiReadReg(nic, phy, MII_BMSR, &status);
 		udelay(1000);
-		TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
-		if ((status & MII_GS_LINK) &&	/* We only support link info on Nat.Sem. PHY's */
+		TLan_MiiReadReg(nic, phy, MII_BMSR, &status);
+		if ((status & BMSR_LSTATUS) &&	/* We only support link info on Nat.Sem. PHY's */
 		    (tlphy_id1 == NAT_SEM_ID1)
 		    && (tlphy_id2 == NAT_SEM_ID2)) {
-			TLan_MiiReadReg(nic, phy, MII_AN_LPA, &partner);
+			TLan_MiiReadReg(nic, phy, MII_LPA, &partner);
 			TLan_MiiReadReg(nic, phy, TLAN_TLPHY_PAR,
 					&tlphy_par);
 
@@ -450,7 +451,7 @@ void TLan_FinishReset(struct nic *nic)
 			mdelay(10000);
 			TLan_PhyMonitor(nic);
 #endif
-		} else if (status & MII_GS_LINK) {
+		} else if (status & BMSR_LSTATUS) {
 			DBG ( "TLAN: %s: Link active\n", priv->nic_name );
 			TLan_DioWrite8(BASE, TLAN_LED_REG, TLAN_LED_LINK);
 		}
@@ -465,7 +466,7 @@ void TLan_FinishReset(struct nic *nic)
 		TLan_DioWrite8(BASE, TLAN_NET_SIO, sio);
 	}
 
-	if (status & MII_GS_LINK) {
+	if (status & BMSR_LSTATUS) {
 		TLan_SetMac(nic, 0, nic->node_addr);
 		priv->phyOnline = 1;
 		outb((TLAN_HC_INT_ON >> 8), BASE + TLAN_HOST_CMD + 1);
@@ -1346,7 +1347,7 @@ void TLan_PhyDetect(struct nic *nic)
 		return;
 	}
 
-	TLan_MiiReadReg(nic, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi);
+	TLan_MiiReadReg(nic, TLAN_PHY_MAX_ADDR, MII_PHYSID1, &hi);
 
 	if (hi != 0xFFFF) {
 		priv->phy[0] = TLAN_PHY_MAX_ADDR;
@@ -1356,9 +1357,9 @@ void TLan_PhyDetect(struct nic *nic)
 
 	priv->phy[1] = TLAN_PHY_NONE;
 	for (phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++) {
-		TLan_MiiReadReg(nic, phy, MII_GEN_CTL, &control);
-		TLan_MiiReadReg(nic, phy, MII_GEN_ID_HI, &hi);
-		TLan_MiiReadReg(nic, phy, MII_GEN_ID_LO, &lo);
+		TLan_MiiReadReg(nic, phy, MII_BMCR, &control);
+		TLan_MiiReadReg(nic, phy, MII_PHYSID1, &hi);
+		TLan_MiiReadReg(nic, phy, MII_PHYSID2, &lo);
 		if ((control != 0xFFFF) || (hi != 0xFFFF)
 		    || (lo != 0xFFFF)) {
 			printf("PHY found at %hX %hX %hX %hX\n", 
@@ -1386,15 +1387,15 @@ void TLan_PhyPowerDown(struct nic *nic)
 
 	u16 value;
 	DBG ( "%s: Powering down PHY(s).\n", priv->nic_name );
-	value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
+	value = BMCR_PDOWN | BMCR_LOOPBACK | BMCR_ISOLATE;
 	TLan_MiiSync(BASE);
-	TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_GEN_CTL, value);
+	TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_BMCR, value);
 	if ((priv->phyNum == 0) && (priv->phy[1] != TLAN_PHY_NONE)
 	    &&
 	    (!(tlan_pci_tbl[chip_idx].
 	       flags & TLAN_ADAPTER_USE_INTERN_10))) {
 		TLan_MiiSync(BASE);
-		TLan_MiiWriteReg(nic, priv->phy[1], MII_GEN_CTL, value);
+		TLan_MiiWriteReg(nic, priv->phy[1], MII_BMCR, value);
 	}
 
 	/* Wait for 50 ms and powerup
@@ -1414,8 +1415,8 @@ void TLan_PhyPowerUp(struct nic *nic)
 
 	DBG ( "%s: Powering up PHY.\n", priv->nic_name );
 	TLan_MiiSync(BASE);
-	value = MII_GC_LOOPBK;
-	TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_GEN_CTL, value);
+	value = BMCR_LOOPBACK;
+	TLan_MiiWriteReg(nic, priv->phy[priv->phyNum], MII_BMCR, value);
 	TLan_MiiSync(BASE);
 	/* Wait for 500 ms and reset the
 	 * tranceiver.  The TLAN docs say both 50 ms and
@@ -1436,11 +1437,11 @@ void TLan_PhyReset(struct nic *nic)
 
 	DBG ( "%s: Reseting PHY.\n", priv->nic_name );
 	TLan_MiiSync(BASE);
-	value = MII_GC_LOOPBK | MII_GC_RESET;
-	TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, value);
-	TLan_MiiReadReg(nic, phy, MII_GEN_CTL, &value);
-	while (value & MII_GC_RESET) {
-		TLan_MiiReadReg(nic, phy, MII_GEN_CTL, &value);
+	value = BMCR_LOOPBACK | BMCR_RESET;
+	TLan_MiiWriteReg(nic, phy, MII_BMCR, value);
+	TLan_MiiReadReg(nic, phy, MII_BMCR, &value);
+	while (value & BMCR_RESET) {
+		TLan_MiiReadReg(nic, phy, MII_BMCR, &value);
 	}
 
 	/* Wait for 500 ms and initialize.
@@ -1466,34 +1467,34 @@ void TLan_PhyStartLink(struct nic *nic)
 
 	phy = priv->phy[priv->phyNum];
 	DBG ( "%s: Trying to activate link.\n", priv->nic_name );
-	TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
-	TLan_MiiReadReg(nic, phy, MII_GEN_STS, &ability);
+	TLan_MiiReadReg(nic, phy, MII_BMSR, &status);
+	TLan_MiiReadReg(nic, phy, MII_BMSR, &ability);
 
-	if ((status & MII_GS_AUTONEG) && (!priv->aui)) {
+	if ((status & BMSR_ANEGCAPABLE) && (!priv->aui)) {
 		ability = status >> 11;
 		if (priv->speed == TLAN_SPEED_10 &&
 		    priv->duplex == TLAN_DUPLEX_HALF) {
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x0000);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR, 0x0000);
 		} else if (priv->speed == TLAN_SPEED_10 &&
 			   priv->duplex == TLAN_DUPLEX_FULL) {
 			priv->tlanFullDuplex = TRUE;
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x0100);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR, 0x0100);
 		} else if (priv->speed == TLAN_SPEED_100 &&
 			   priv->duplex == TLAN_DUPLEX_HALF) {
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x2000);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR, 0x2000);
 		} else if (priv->speed == TLAN_SPEED_100 &&
 			   priv->duplex == TLAN_DUPLEX_FULL) {
 			priv->tlanFullDuplex = TRUE;
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x2100);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR, 0x2100);
 		} else {
 
 			/* Set Auto-Neg advertisement */
-			TLan_MiiWriteReg(nic, phy, MII_AN_ADV,
+			TLan_MiiWriteReg(nic, phy, MII_ADVERTISE,
 					 (ability << 5) | 1);
 			/* Enablee Auto-Neg */
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x1000);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR, 0x1000);
 			/* Restart Auto-Neg */
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, 0x1200);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR, 0x1200);
 			/* Wait for 4 sec for autonegotiation
 			 * to complete.  The max spec time is less than this
 			 * but the card need additional time to start AN.
@@ -1527,14 +1528,14 @@ void TLan_PhyStartLink(struct nic *nic)
 		} else {
 			tctl &= ~TLAN_TC_AUISEL;
 			if (priv->duplex == TLAN_DUPLEX_FULL) {
-				control |= MII_GC_DUPLEX;
+				control |= BMCR_FULLDPLX;
 				priv->tlanFullDuplex = TRUE;
 			}
 			if (priv->speed == TLAN_SPEED_100) {
-				control |= MII_GC_SPEEDSEL;
+				control |= BMCR_SPEED100;
 			}
 		}
-		TLan_MiiWriteReg(nic, phy, MII_GEN_CTL, control);
+		TLan_MiiWriteReg(nic, phy, MII_BMCR, control);
 		TLan_MiiWriteReg(nic, phy, TLAN_TLPHY_CTL, tctl);
 	}
 
@@ -1559,11 +1560,11 @@ void TLan_PhyFinishAutoNeg(struct nic *nic)
 
 	phy = priv->phy[priv->phyNum];
 
-	TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
+	TLan_MiiReadReg(nic, phy, MII_BMSR, &status);
 	udelay(1000);
-	TLan_MiiReadReg(nic, phy, MII_GEN_STS, &status);
+	TLan_MiiReadReg(nic, phy, MII_BMSR, &status);
 
-	if (!(status & MII_GS_AUTOCMPLT)) {
+	if (!(status & BMSR_ANEGCOMPLETE)) {
 		/* Wait for 8 sec to give the process
 		 * more time.  Perhaps we should fail after a while.
 		 */
@@ -1584,8 +1585,8 @@ void TLan_PhyFinishAutoNeg(struct nic *nic)
 	}
 
 	DBG ( "TLAN: %s: Autonegotiation complete.\n", priv->nic_name );
-	TLan_MiiReadReg(nic, phy, MII_AN_ADV, &an_adv);
-	TLan_MiiReadReg(nic, phy, MII_AN_LPA, &an_lpa);
+	TLan_MiiReadReg(nic, phy, MII_ADVERTISE, &an_adv);
+	TLan_MiiReadReg(nic, phy, MII_LPA, &an_lpa);
 	mode = an_adv & an_lpa & 0x03E0;
 	if (mode & 0x0100) {
 		printf("Full Duplex\n");
@@ -1612,13 +1613,13 @@ void TLan_PhyFinishAutoNeg(struct nic *nic)
 	if (priv->phyNum == 0) {
 		if ((priv->duplex == TLAN_DUPLEX_FULL)
 		    || (an_adv & an_lpa & 0x0040)) {
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL,
-					 MII_GC_AUTOENB | MII_GC_DUPLEX);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR,
+					 BMCR_ANENABLE | BMCR_FULLDPLX);
 			DBG 
 			    ( "TLAN:  Starting internal PHY with FULL-DUPLEX\n" );
 		} else {
-			TLan_MiiWriteReg(nic, phy, MII_GEN_CTL,
-					 MII_GC_AUTOENB);
+			TLan_MiiWriteReg(nic, phy, MII_BMCR,
+					 BMCR_ANENABLE);
 			DBG 
 			    ( "TLAN:  Starting internal PHY with HALF-DUPLEX\n" );
 		}
@@ -1661,10 +1662,10 @@ void TLan_PhyMonitor(struct net_device *dev)
 	phy = priv->phy[priv->phyNum];
 
 	/* Get PHY status register */
-	TLan_MiiReadReg(nic, phy, MII_GEN_STS, &phy_status);
+	TLan_MiiReadReg(nic, phy, MII_BMSR, &phy_status);
 
 	/* Check if link has been lost */
-	if (!(phy_status & MII_GS_LINK)) {
+	if (!(phy_status & BMSR_LSTATUS)) {
 		if (priv->link) {
 			priv->link = 0;
 			printf("TLAN: %s has lost link\n", priv->nic_name);
@@ -1677,7 +1678,7 @@ void TLan_PhyMonitor(struct net_device *dev)
 	}
 
 	/* Link restablished? */
-	if ((phy_status & MII_GS_LINK) && !priv->link) {
+	if ((phy_status & BMSR_LSTATUS) && !priv->link) {
 		priv->link = 1;
 		printf("TLAN: %s has reestablished link\n",
 		       priv->nic_name);

src/drivers/net/tlan.h

@@ -313,41 +313,6 @@ typedef struct tlan_adapter_entry {
 
 /* ThunderLAN MII Registers */
 
-/* Generic MII/PHY Registers */
-
-#define MII_GEN_CTL			0x00
-#define 	MII_GC_RESET		0x8000
-#define		MII_GC_LOOPBK		0x4000
-#define		MII_GC_SPEEDSEL		0x2000
-#define		MII_GC_AUTOENB		0x1000
-#define		MII_GC_PDOWN		0x0800
-#define		MII_GC_ISOLATE		0x0400
-#define		MII_GC_AUTORSRT		0x0200
-#define		MII_GC_DUPLEX		0x0100
-#define		MII_GC_COLTEST		0x0080
-#define		MII_GC_RESERVED		0x007F
-#define MII_GEN_STS			0x01
-#define		MII_GS_100BT4		0x8000
-#define		MII_GS_100BTXFD		0x4000
-#define		MII_GS_100BTXHD		0x2000
-#define		MII_GS_10BTFD		0x1000
-#define		MII_GS_10BTHD		0x0800
-#define		MII_GS_RESERVED		0x07C0
-#define		MII_GS_AUTOCMPLT	0x0020
-#define		MII_GS_RFLT		0x0010
-#define		MII_GS_AUTONEG		0x0008
-#define		MII_GS_LINK		0x0004
-#define		MII_GS_JABBER		0x0002
-#define		MII_GS_EXTCAP		0x0001
-#define MII_GEN_ID_HI			0x02
-#define MII_GEN_ID_LO			0x03
-#define 	MII_GIL_OUI		0xFC00
-#define 	MII_GIL_MODEL		0x03F0
-#define 	MII_GIL_REVISION	0x000F
-#define MII_AN_ADV			0x04
-#define MII_AN_LPA			0x05
-#define MII_AN_EXP			0x06
-
 /* ThunderLAN Specific MII/PHY Registers */
 
 #define TLAN_TLPHY_ID			0x10

src/include/mii.h

@@ -24,6 +24,9 @@ FILE_LICENCE ( GPL2_ONLY );
 #define MII_ADVERTISE       0x04	/* Advertisement control reg   */
 #define MII_LPA             0x05	/* Link partner ability reg    */
 #define MII_EXPANSION       0x06        /* Expansion register          */
+#define MII_CTRL1000        0x09        /* 1000BASE-T control          */
+#define MII_STAT1000        0x0a        /* 1000BASE-T status           */
+#define MII_ESTATUS         0x0f        /* Extended Status */
 #define MII_DCOUNTER        0x12        /* Disconnect counter          */
 #define MII_FCSCOUNTER      0x13        /* False carrier counter       */
 #define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
@@ -37,7 +40,8 @@ FILE_LICENCE ( GPL2_ONLY );
 #define MII_NCONFIG         0x1c        /* Network interface config    */
 
 /* Basic mode control register. */
-#define BMCR_RESV               0x007f  /* Unused...                   */
+#define BMCR_RESV               0x003f  /* Unused...                   */
+#define BMCR_SPEED1000          0x0040  /* MSB of Speed (1000)         */
 #define BMCR_CTST               0x0080  /* Collision test              */
 #define BMCR_FULLDPLX           0x0100	/* Full duplex                 */
 #define BMCR_ANRESTART          0x0200	/* Auto negotiation restart    */
@@ -55,7 +59,10 @@ FILE_LICENCE ( GPL2_ONLY );
 #define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
 #define BMSR_RFAULT             0x0010  /* Remote fault detected       */
 #define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
-#define BMSR_RESV               0x07c0  /* Unused...                   */
+#define BMSR_RESV               0x00c0  /* Unused...                   */
+#define BMSR_ESTATEN            0x0100  /* Extended Status in R15 */
+#define BMSR_100HALF2           0x0200  /* Can do 100BASE-T2 HDX */
+#define BMSR_100FULL2           0x0400  /* Can do 100BASE-T2 FDX */
 #define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
 #define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
 #define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
@@ -66,11 +73,17 @@ FILE_LICENCE ( GPL2_ONLY );
 #define ADVERTISE_SLCT          0x001f  /* Selector bits               */
 #define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
 #define ADVERTISE_10HALF        0x0020	/* Try for 10mbps half-duplex  */
+#define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
 #define ADVERTISE_10FULL        0x0040	/* Try for 10mbps full-duplex  */
+#define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
 #define ADVERTISE_100HALF       0x0080	/* Try for 100mbps half-duplex */
+#define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
 #define ADVERTISE_100FULL       0x0100	/* Try for 100mbps full-duplex */
+#define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
 #define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
-#define ADVERTISE_RESV          0x1c00  /* Unused...                   */
+#define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
+#define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
+#define ADVERTISE_RESV          0x1000  /* Unused...                   */
 #define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
 #define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
 #define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
@@ -83,11 +96,17 @@ FILE_LICENCE ( GPL2_ONLY );
 /* Link partner ability register. */
 #define LPA_SLCT                0x001f  /* Same as advertise selector  */
 #define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
+#define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
 #define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
+#define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
 #define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
+#define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
 #define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
+#define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
 #define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
-#define LPA_RESV                0x1c00  /* Unused...                   */
+#define LPA_PAUSE_CAP           0x0400  /* Can pause                   */
+#define LPA_PAUSE_ASYM          0x0800  /* Can pause asymetrically     */
+#define LPA_RESV                0x1000  /* Unused...                   */
 #define LPA_RFAULT              0x2000  /* Link partner faulted        */
 #define LPA_LPACK               0x4000  /* Link partner acked us       */
 #define LPA_NPAGE               0x8000  /* Next page bit               */
@@ -103,11 +122,24 @@ FILE_LICENCE ( GPL2_ONLY );
 #define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
 #define EXPANSION_RESV          0xffe0  /* Unused...                   */
 
+#define ESTATUS_1000_TFULL      0x2000  /* Can do 1000BT Full */
+#define ESTATUS_1000_THALF      0x1000  /* Can do 1000BT Half */
+
 /* N-way test register. */
 #define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
 #define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
 #define NWAYTEST_RESV2          0xfe00  /* Unused...                   */
 
+/* 1000BASE-T Control register */
+#define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
+#define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */
+
+/* 1000BASE-T Status register */
+#define LPA_1000LOCALRXOK       0x2000  /* Link partner local receiver status */
+#define LPA_1000REMRXOK         0x1000  /* Link partner remote receiver status */
+#define LPA_1000FULL            0x0800  /* Link partner 1000BASE-T full duplex */
+#define LPA_1000HALF            0x0400  /* Link partner 1000BASE-T half duplex */
+
 #include <gpxe/netdevice.h>
 
 struct mii_if_info {