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[tg3] Fix compilation on newer gcc versions

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Christian Hesse 13 years ago
parent
commit
b5ed30b2d0
3 changed files with 2 additions and 13 deletions
  1. 1
    2
      src/drivers/net/tg3/tg3.c
  2. 1
    8
      src/drivers/net/tg3/tg3_hw.c
  3. 0
    3
      src/drivers/net/tg3/tg3_phy.c

+ 1
- 2
src/drivers/net/tg3/tg3.c View File

@@ -533,7 +533,7 @@ static int tg3_test_dma(struct tg3 *tp)
533 533
 {	DBGP("%s\n", __func__);
534 534
 
535 535
 	dma_addr_t buf_dma;
536
-	u32 *buf, saved_dma_rwctrl;
536
+	u32 *buf;
537 537
 	int ret = 0;
538 538
 
539 539
 	buf = malloc_dma(TEST_BUFFER_SIZE, TG3_DMA_ALIGNMENT);
@@ -624,7 +624,6 @@ static int tg3_test_dma(struct tg3 *tp)
624 624
 	/* It is best to perform DMA test with maximum write burst size
625 625
 	 * to expose the 5700/5701 write DMA bug.
626 626
 	 */
627
-	saved_dma_rwctrl = tp->dma_rwctrl;
628 627
 	tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
629 628
 	tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
630 629
 

+ 1
- 8
src/drivers/net/tg3/tg3_hw.c View File

@@ -1778,7 +1778,7 @@ static void tg3_rings_reset(struct tg3 *tp)
1778 1778
 {	DBGP("%s\n", __func__);
1779 1779
 
1780 1780
 	int i;
1781
-	u32 stblk, txrcb, rxrcb, limit;
1781
+	u32 txrcb, rxrcb, limit;
1782 1782
 
1783 1783
 	/* Disable all transmit rings but the first. */
1784 1784
 	if (!tg3_flag(tp, 5705_PLUS))
@@ -1854,8 +1854,6 @@ static void tg3_rings_reset(struct tg3 *tp)
1854 1854
 				BDINFO_FLAGS_MAXLEN_SHIFT, 0);
1855 1855
 		rxrcb += TG3_BDINFO_SIZE;
1856 1856
 	}
1857
-
1858
-	stblk = HOSTCC_STATBLCK_RING1;
1859 1857
 }
1860 1858
 
1861 1859
 static void tg3_setup_rxbd_thresholds(struct tg3 *tp)
@@ -2569,14 +2567,9 @@ void tg3_set_txd(struct tg3 *tp, int entry,
2569 2567
 u32 tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
2570 2568
 {	DBGP("%s\n", __func__);
2571 2569
 
2572
-	int cacheline_size;
2573 2570
 	u8 byte;
2574 2571
 
2575 2572
 	pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, &byte);
2576
-	if (byte == 0)
2577
-		cacheline_size = 1024;
2578
-	else
2579
-		cacheline_size = (int) byte * 4;
2580 2573
 
2581 2574
 	/* On 5703 and later chips, the boundary bits have no
2582 2575
 	 * effect.

+ 0
- 3
src/drivers/net/tg3/tg3_phy.c View File

@@ -1124,13 +1124,10 @@ static u8 tg3_resolve_flowctrl_1000X(u16 lcladv, u16 rmtadv)
1124 1124
 static void tg3_setup_flow_control(struct tg3 *tp, u32 lcladv, u32 rmtadv)
1125 1125
 {	DBGP("%s\n", __func__);
1126 1126
 
1127
-	u8 autoneg;
1128 1127
 	u8 flowctrl = 0;
1129 1128
 	u32 old_rx_mode = tp->rx_mode;
1130 1129
 	u32 old_tx_mode = tp->tx_mode;
1131 1130
 
1132
-	autoneg = tp->link_config.autoneg;
1133
-
1134 1131
 	if (tg3_flag(tp, PAUSE_AUTONEG)) {
1135 1132
 		if (tp->phy_flags & TG3_PHYFLG_ANY_SERDES)
1136 1133
 			flowctrl = tg3_resolve_flowctrl_1000X(lcladv, rmtadv);

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