|
|
|
|
20
|
* set" (LBA48), in which case each of these byte-wide registers is
|
20
|
* set" (LBA48), in which case each of these byte-wide registers is
|
21
|
* actually a two-entry FIFO, and the "previous" byte pushed into the
|
21
|
* actually a two-entry FIFO, and the "previous" byte pushed into the
|
22
|
* FIFO is used as the corresponding high-order byte. So, to set up
|
22
|
* FIFO is used as the corresponding high-order byte. So, to set up
|
23
|
- * the 48-bit address 0x12345678abcd, you would issue
|
|
|
|
|
23
|
+ * the 48-bit address 0x123456abcdef, you would issue
|
24
|
*
|
24
|
*
|
25
|
* 0x56 -> LBA Low register
|
25
|
* 0x56 -> LBA Low register
|
26
|
- * 0xcd -> LBA Low register
|
|
|
|
|
26
|
+ * 0xef -> LBA Low register
|
27
|
* 0x34 -> LBA Mid register
|
27
|
* 0x34 -> LBA Mid register
|
28
|
- * 0xab -> LBA Mid register
|
|
|
|
|
28
|
+ * 0xcd -> LBA Mid register
|
29
|
* 0x12 -> LBA High register
|
29
|
* 0x12 -> LBA High register
|
30
|
- * 0x78 -> LBA High register
|
|
|
|
|
30
|
+ * 0xab -> LBA High register
|
31
|
*
|
31
|
*
|
32
|
* This structure encapsulates this information by providing a single
|
32
|
* This structure encapsulates this information by providing a single
|
33
|
* 64-bit integer in native byte order, unioned with bytes named so
|
33
|
* 64-bit integer in native byte order, unioned with bytes named so
|