Browse Source

[pci] Formalise the PCI I/O API

tags/v0.9.6
Michael Brown 16 years ago
parent
commit
8a4ccebec9

+ 7
- 1
src/arch/i386/core/pcidirect.c View File

17
  */
17
  */
18
 
18
 
19
 #include <gpxe/pci.h>
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 #include <gpxe/pci.h>
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-#include <pcidirect.h>
21
 
20
 
22
 /** @file
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 /** @file
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  *
22
  *
36
 		 ( where & ~3 ) ), PCIDIRECT_CONFIG_ADDRESS );
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 		 ( where & ~3 ) ), PCIDIRECT_CONFIG_ADDRESS );
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 }
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 }
38
 
37
 
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+PROVIDE_PCIAPI_INLINE ( direct, pci_max_bus );
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+PROVIDE_PCIAPI_INLINE ( direct, pci_read_config_byte );
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+PROVIDE_PCIAPI_INLINE ( direct, pci_read_config_word );
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+PROVIDE_PCIAPI_INLINE ( direct, pci_read_config_dword );
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+PROVIDE_PCIAPI_INLINE ( direct, pci_write_config_byte );
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+PROVIDE_PCIAPI_INLINE ( direct, pci_write_config_word );
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+PROVIDE_PCIAPI_INLINE ( direct, pci_write_config_dword );

+ 13
- 0
src/arch/i386/include/bits/pci_io.h View File

1
+#ifndef _BITS_PCI_IO_H
2
+#define _BITS_PCI_IO_H
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+
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+/** @file
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+ *
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+ * i386-specific PCI I/O API implementations
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+ *
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+ */
9
+
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+#include <gpxe/pcibios.h>
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+#include <gpxe/pcidirect.h>
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+
13
+#endif /* _BITS_PCI_IO_H */

src/arch/i386/include/pcibios.h → src/arch/i386/include/gpxe/pcibios.h View File

1
-#ifndef _PCIBIOS_H
2
-#define _PCIBIOS_H
1
+#ifndef _GPXE_PCIBIOS_H
2
+#define _GPXE_PCIBIOS_H
3
 
3
 
4
 #include <stdint.h>
4
 #include <stdint.h>
5
 
5
 
9
  *
9
  *
10
  */
10
  */
11
 
11
 
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+#ifdef PCIAPI_PCBIOS
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+#define PCIAPI_PREFIX_pcbios
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+#else
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+#define PCIAPI_PREFIX_pcbios __pcbios_
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+#endif
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+
12
 struct pci_device;
18
 struct pci_device;
13
 
19
 
14
 #define PCIBIOS_INSTALLATION_CHECK	0xb1010000
20
 #define PCIBIOS_INSTALLATION_CHECK	0xb1010000
19
 #define PCIBIOS_WRITE_CONFIG_WORD	0xb10c0000
25
 #define PCIBIOS_WRITE_CONFIG_WORD	0xb10c0000
20
 #define PCIBIOS_WRITE_CONFIG_DWORD	0xb10d0000
26
 #define PCIBIOS_WRITE_CONFIG_DWORD	0xb10d0000
21
 
27
 
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-extern int pcibios_max_bus ( void );
23
 extern int pcibios_read ( struct pci_device *pci, uint32_t command,
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 extern int pcibios_read ( struct pci_device *pci, uint32_t command,
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 			  uint32_t *value );
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 			  uint32_t *value );
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 extern int pcibios_write ( struct pci_device *pci, uint32_t command,
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 extern int pcibios_write ( struct pci_device *pci, uint32_t command,
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  * @v value	Value read
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  * @v value	Value read
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  * @ret rc	Return status code
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  * @ret rc	Return status code
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  */
40
  */
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-static inline __attribute__ (( always_inline )) int
37
-pcibios_read_config_byte ( struct pci_device *pci, unsigned int where,
38
-			   uint8_t *value ) {
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+static inline __always_inline int
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+PCIAPI_INLINE ( pcbios, pci_read_config_byte ) ( struct pci_device *pci,
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+						 unsigned int where,
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+						 uint8_t *value ) {
39
 	uint32_t tmp;
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 	uint32_t tmp;
40
 	int rc;
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 	int rc;
41
 
47
 
52
  * @v value	Value read
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  * @v value	Value read
53
  * @ret rc	Return status code
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  * @ret rc	Return status code
54
  */
60
  */
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-static inline __attribute__ (( always_inline )) int
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-pcibios_read_config_word ( struct pci_device *pci, unsigned int where,
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-			   uint16_t *value ) {
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+static inline __always_inline int
62
+PCIAPI_INLINE ( pcbios, pci_read_config_word ) ( struct pci_device *pci,
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+						 unsigned int where,
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+						 uint16_t *value ) {
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 	uint32_t tmp;
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 	uint32_t tmp;
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 	int rc;
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 	int rc;
60
 
67
 
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  * @v value	Value read
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  * @v value	Value read
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  * @ret rc	Return status code
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  * @ret rc	Return status code
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  */
80
  */
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-static inline __attribute__ (( always_inline )) int
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-pcibios_read_config_dword ( struct pci_device *pci, unsigned int where,
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-			    uint32_t *value ) {
81
+static inline __always_inline int
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+PCIAPI_INLINE ( pcbios, pci_read_config_dword ) ( struct pci_device *pci,
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+						  unsigned int where,
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+						  uint32_t *value ) {
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 	return pcibios_read ( pci, PCIBIOS_READ_CONFIG_DWORD | where, value );
85
 	return pcibios_read ( pci, PCIBIOS_READ_CONFIG_DWORD | where, value );
78
 }
86
 }
79
 
87
 
85
  * @v value	Value to be written
93
  * @v value	Value to be written
86
  * @ret rc	Return status code
94
  * @ret rc	Return status code
87
  */
95
  */
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-static inline __attribute__ (( always_inline )) int
89
-pcibios_write_config_byte ( struct pci_device *pci, unsigned int where,
90
-			    uint8_t value ) {
96
+static inline __always_inline int
97
+PCIAPI_INLINE ( pcbios, pci_write_config_byte ) ( struct pci_device *pci,
98
+						  unsigned int where,
99
+						  uint8_t value ) {
91
 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_BYTE | where, value );
100
 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_BYTE | where, value );
92
 }
101
 }
93
 
102
 
99
  * @v value	Value to be written
108
  * @v value	Value to be written
100
  * @ret rc	Return status code
109
  * @ret rc	Return status code
101
  */
110
  */
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-static inline __attribute__ (( always_inline )) int
103
-pcibios_write_config_word ( struct pci_device *pci, unsigned int where,
104
-			    uint16_t value ) {
111
+static inline __always_inline int
112
+PCIAPI_INLINE ( pcbios, pci_write_config_word ) ( struct pci_device *pci,
113
+						  unsigned int where,
114
+						  uint16_t value ) {
105
 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_WORD | where, value );
115
 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_WORD | where, value );
106
 }
116
 }
107
 
117
 
113
  * @v value	Value to be written
123
  * @v value	Value to be written
114
  * @ret rc	Return status code
124
  * @ret rc	Return status code
115
  */
125
  */
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-static inline __attribute__ (( always_inline )) int
117
-pcibios_write_config_dword ( struct pci_device *pci, unsigned int where,
118
-			     uint32_t value ) {
126
+static inline __always_inline int
127
+PCIAPI_INLINE ( pcbios, pci_write_config_dword ) ( struct pci_device *pci,
128
+						   unsigned int where,
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+						   uint32_t value ) {
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 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_DWORD | where, value);
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 	return pcibios_write ( pci, PCIBIOS_WRITE_CONFIG_DWORD | where, value);
120
 }
131
 }
121
 
132
 
122
-#endif /* _PCIBIOS_H */
133
+#endif /* _GPXE_PCIBIOS_H */

src/arch/i386/include/pcidirect.h → src/arch/i386/include/gpxe/pcidirect.h View File

4
 #include <stdint.h>
4
 #include <stdint.h>
5
 #include <gpxe/io.h>
5
 #include <gpxe/io.h>
6
 
6
 
7
+#ifdef PCIAPI_DIRECT
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+#define PCIAPI_PREFIX_direct
9
+#else
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+#define PCIAPI_PREFIX_direct __direct_
11
+#endif
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+
7
 /** @file
13
 /** @file
8
  *
14
  *
9
  * PCI configuration space access via Type 1 accesses
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  * PCI configuration space access via Type 1 accesses
22
  *
28
  *
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  * @ret max_bus		Maximum bus number
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  * @ret max_bus		Maximum bus number
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  */
30
  */
25
-static inline int pcidirect_max_bus ( void ) {
31
+static inline __always_inline int
32
+PCIAPI_INLINE ( direct, pci_max_bus ) ( void ) {
26
 	/* No way to work this out via Type 1 accesses */
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 	/* No way to work this out via Type 1 accesses */
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 	return 0xff;
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 	return 0xff;
28
 }
35
 }
35
  * @v value	Value read
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  * @v value	Value read
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  * @ret rc	Return status code
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  * @ret rc	Return status code
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  */
44
  */
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-static inline __attribute__ (( always_inline )) int
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-pcidirect_read_config_byte ( struct pci_device *pci, unsigned int where,
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-			     uint8_t *value ) {
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+static inline __always_inline int
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+PCIAPI_INLINE ( direct, pci_read_config_byte ) ( struct pci_device *pci,
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+						 unsigned int where,
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+						 uint8_t *value ) {
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 	pcidirect_prepare ( pci, where );
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 	pcidirect_prepare ( pci, where );
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 	*value = inb ( PCIDIRECT_CONFIG_DATA + ( where & 3 ) );
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 	*value = inb ( PCIDIRECT_CONFIG_DATA + ( where & 3 ) );
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 	return 0;
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 	return 0;
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  * @v value	Value read
59
  * @v value	Value read
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  * @ret rc	Return status code
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  * @ret rc	Return status code
53
  */
61
  */
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-static inline __attribute__ (( always_inline )) int
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-pcidirect_read_config_word ( struct pci_device *pci, unsigned int where,
56
-			     uint16_t *value ) {
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+static inline __always_inline int
63
+PCIAPI_INLINE ( direct, pci_read_config_word ) ( struct pci_device *pci,
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+						 unsigned int where,
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+						 uint16_t *value ) {
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 	pcidirect_prepare ( pci, where );
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 	pcidirect_prepare ( pci, where );
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 	*value = inw ( PCIDIRECT_CONFIG_DATA + ( where & 2 ) );
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 	*value = inw ( PCIDIRECT_CONFIG_DATA + ( where & 2 ) );
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 	return 0;
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 	return 0;
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  * @v value	Value read
76
  * @v value	Value read
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  * @ret rc	Return status code
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  * @ret rc	Return status code
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  */
78
  */
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-static inline __attribute__ (( always_inline )) int
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-pcidirect_read_config_dword ( struct pci_device *pci, unsigned int where,
72
-			      uint32_t *value ) {
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+static inline __always_inline int
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+PCIAPI_INLINE ( direct, pci_read_config_dword ) ( struct pci_device *pci,
81
+						  unsigned int where,
82
+						  uint32_t *value ) {
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 	pcidirect_prepare ( pci, where );
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 	pcidirect_prepare ( pci, where );
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 	*value = inl ( PCIDIRECT_CONFIG_DATA );
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 	*value = inl ( PCIDIRECT_CONFIG_DATA );
75
 	return 0;
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 	return 0;
83
  * @v value	Value to be written
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  * @v value	Value to be written
84
  * @ret rc	Return status code
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  * @ret rc	Return status code
85
  */
95
  */
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-static inline __attribute__ (( always_inline )) int
87
-pcidirect_write_config_byte ( struct pci_device *pci, unsigned int where,
88
-			      uint8_t value ) {
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+static inline __always_inline int
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+PCIAPI_INLINE ( direct, pci_write_config_byte ) ( struct pci_device *pci,
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+						  unsigned int where,
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+						  uint8_t value ) {
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 	pcidirect_prepare ( pci, where );
100
 	pcidirect_prepare ( pci, where );
90
 	outb ( value, PCIDIRECT_CONFIG_DATA + ( where & 3 ) );
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 	outb ( value, PCIDIRECT_CONFIG_DATA + ( where & 3 ) );
91
 	return 0;
102
 	return 0;
99
  * @v value	Value to be written
110
  * @v value	Value to be written
100
  * @ret rc	Return status code
111
  * @ret rc	Return status code
101
  */
112
  */
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-static inline __attribute__ (( always_inline )) int
103
-pcidirect_write_config_word ( struct pci_device *pci, unsigned int where,
104
-			      uint16_t value ) {
113
+static inline __always_inline int
114
+PCIAPI_INLINE ( direct, pci_write_config_word ) ( struct pci_device *pci,
115
+						  unsigned int where,
116
+						  uint16_t value ) {
105
 	pcidirect_prepare ( pci, where );
117
 	pcidirect_prepare ( pci, where );
106
 	outw ( value, PCIDIRECT_CONFIG_DATA + ( where & 2 ) );
118
 	outw ( value, PCIDIRECT_CONFIG_DATA + ( where & 2 ) );
107
 	return 0;
119
 	return 0;
115
  * @v value	Value to be written
127
  * @v value	Value to be written
116
  * @ret rc	Return status code
128
  * @ret rc	Return status code
117
  */
129
  */
118
-static inline __attribute__ (( always_inline )) int
119
-pcidirect_write_config_dword ( struct pci_device *pci, unsigned int where,
120
-			       uint32_t value ) {
130
+static inline __always_inline int
131
+PCIAPI_INLINE ( direct, pci_write_config_dword ) ( struct pci_device *pci,
132
+						   unsigned int where,
133
+						   uint32_t value ) {
121
 	pcidirect_prepare ( pci, where );
134
 	pcidirect_prepare ( pci, where );
122
 	outl ( value, PCIDIRECT_CONFIG_DATA );
135
 	outl ( value, PCIDIRECT_CONFIG_DATA );
123
 	return 0;
136
 	return 0;

+ 0
- 35
src/arch/i386/include/pci_io.h View File

1
-#ifndef _PCI_IO_H
2
-#define _PCI_IO_H
3
-
4
-#include <pcibios.h>
5
-#include <pcidirect.h>
6
-
7
-/** @file
8
- *
9
- * i386 PCI configuration space access
10
- *
11
- * We have two methods of PCI configuration space access: the PCI BIOS
12
- * and direct Type 1 accesses.  Selecting between them is via the
13
- * compile-time switch -DCONFIG_PCI_DIRECT.
14
- *
15
- */
16
-
17
-#if CONFIG_PCI_DIRECT
18
-#define pci_max_bus		pcidirect_max_bus
19
-#define pci_read_config_byte	pcidirect_read_config_byte
20
-#define pci_read_config_word	pcidirect_read_config_word
21
-#define pci_read_config_dword	pcidirect_read_config_dword
22
-#define pci_write_config_byte	pcidirect_write_config_byte
23
-#define pci_write_config_word	pcidirect_write_config_word
24
-#define pci_write_config_dword	pcidirect_write_config_dword
25
-#else /* CONFIG_PCI_DIRECT */
26
-#define pci_max_bus		pcibios_max_bus
27
-#define pci_read_config_byte	pcibios_read_config_byte
28
-#define pci_read_config_word	pcibios_read_config_word
29
-#define pci_read_config_dword	pcibios_read_config_dword
30
-#define pci_write_config_byte	pcibios_write_config_byte
31
-#define pci_write_config_word	pcibios_write_config_word
32
-#define pci_write_config_dword	pcibios_write_config_dword
33
-#endif /* CONFIG_PCI_DIRECT */
34
-
35
-#endif /* _PCI_IO_H */

src/arch/i386/core/pcibios.c → src/arch/i386/interface/pcbios/pcibios.c View File

18
 
18
 
19
 #include <stdint.h>
19
 #include <stdint.h>
20
 #include <gpxe/pci.h>
20
 #include <gpxe/pci.h>
21
-#include <pcibios.h>
22
 #include <realmode.h>
21
 #include <realmode.h>
23
 
22
 
24
 /** @file
23
 /** @file
32
  *
31
  *
33
  * @ret max_bus		Maximum bus number
32
  * @ret max_bus		Maximum bus number
34
  */
33
  */
35
-int pcibios_max_bus ( void ) {
34
+static int pcibios_max_bus ( void ) {
36
 	int discard_a, discard_D;
35
 	int discard_a, discard_D;
37
 	uint8_t max_bus;
36
 	uint8_t max_bus;
38
 
37
 
104
 	
103
 	
105
 	return ( ( status >> 8 ) & 0xff );
104
 	return ( ( status >> 8 ) & 0xff );
106
 }
105
 }
106
+
107
+PROVIDE_PCIAPI ( pcbios, pci_max_bus, pcibios_max_bus );
108
+PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_byte );
109
+PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_word );
110
+PROVIDE_PCIAPI_INLINE ( pcbios, pci_read_config_dword );
111
+PROVIDE_PCIAPI_INLINE ( pcbios, pci_write_config_byte );
112
+PROVIDE_PCIAPI_INLINE ( pcbios, pci_write_config_word );
113
+PROVIDE_PCIAPI_INLINE ( pcbios, pci_write_config_dword );

+ 1
- 1
src/config/defaults/pcbios.h View File

8
  */
8
  */
9
 
9
 
10
 #define IOAPI_X86
10
 #define IOAPI_X86
11
-
11
+#define PCIAPI_PCBIOS
12
 #define CONSOLE_PCBIOS
12
 #define CONSOLE_PCBIOS
13
 
13
 
14
 #endif /* CONFIG_DEFAULTS_PCBIOS_H */
14
 #endif /* CONFIG_DEFAULTS_PCBIOS_H */

+ 3
- 0
src/config/ioapi.h View File

9
 
9
 
10
 #include <config/defaults.h>
10
 #include <config/defaults.h>
11
 
11
 
12
+//#undef	PCIAPI_PCBIOS		/* Access via PCI BIOS */
13
+//#define	PCIAPI_DIRECT		/* Direct access via Type 1 accesses */
14
+
12
 #endif /* CONFIG_IOAPI_H */
15
 #endif /* CONFIG_IOAPI_H */

+ 1
- 1
src/include/gpxe/pci.h View File

19
 #include <stdint.h>
19
 #include <stdint.h>
20
 #include <gpxe/device.h>
20
 #include <gpxe/device.h>
21
 #include <gpxe/tables.h>
21
 #include <gpxe/tables.h>
22
-#include <pci_io.h>
22
+#include <gpxe/pci_io.h>
23
 #include "pci_ids.h"
23
 #include "pci_ids.h"
24
 
24
 
25
 /*
25
 /*

+ 121
- 0
src/include/gpxe/pci_io.h View File

1
+#ifndef _GPXE_PCI_IO_H
2
+#define _GPXE_PCI_IO_H
3
+
4
+/** @file
5
+ *
6
+ * PCI I/O API
7
+ *
8
+ */
9
+
10
+#include <stdint.h>
11
+#include <gpxe/api.h>
12
+#include <config/ioapi.h>
13
+
14
+/**
15
+ * Calculate static inline PCI I/O API function name
16
+ *
17
+ * @v _prefix		Subsystem prefix
18
+ * @v _api_func		API function
19
+ * @ret _subsys_func	Subsystem API function
20
+ */
21
+#define PCIAPI_INLINE( _subsys, _api_func ) \
22
+	SINGLE_API_INLINE ( PCIAPI_PREFIX_ ## _subsys, _api_func )
23
+
24
+/**
25
+ * Provide a PCI I/O API implementation
26
+ *
27
+ * @v _prefix		Subsystem prefix
28
+ * @v _api_func		API function
29
+ * @v _func		Implementing function
30
+ */
31
+#define PROVIDE_PCIAPI( _subsys, _api_func, _func ) \
32
+	PROVIDE_SINGLE_API ( PCIAPI_PREFIX_ ## _subsys, _api_func, _func )
33
+
34
+/**
35
+ * Provide a static inline PCI I/O API implementation
36
+ *
37
+ * @v _prefix		Subsystem prefix
38
+ * @v _api_func		API function
39
+ */
40
+#define PROVIDE_PCIAPI_INLINE( _subsys, _api_func ) \
41
+	PROVIDE_SINGLE_API_INLINE ( PCIAPI_PREFIX_ ## _subsys, _api_func )
42
+
43
+/* Include all architecture-independent I/O API headers */
44
+
45
+/* Include all architecture-dependent I/O API headers */
46
+#include <bits/pci_io.h>
47
+
48
+/**
49
+ * Determine maximum PCI bus number within system
50
+ *
51
+ * @ret max_bus		Maximum bus number
52
+ */
53
+int pci_max_bus ( void );
54
+
55
+/**
56
+ * Read byte from PCI configuration space
57
+ *
58
+ * @v pci	PCI device
59
+ * @v where	Location within PCI configuration space
60
+ * @v value	Value read
61
+ * @ret rc	Return status code
62
+ */
63
+int pci_read_config_byte ( struct pci_device *pci, unsigned int where,
64
+			   uint8_t *value );
65
+
66
+/**
67
+ * Read 16-bit word from PCI configuration space
68
+ *
69
+ * @v pci	PCI device
70
+ * @v where	Location within PCI configuration space
71
+ * @v value	Value read
72
+ * @ret rc	Return status code
73
+ */
74
+int pci_read_config_word ( struct pci_device *pci, unsigned int where,
75
+			   uint16_t *value );
76
+
77
+/**
78
+ * Read 32-bit dword from PCI configuration space
79
+ *
80
+ * @v pci	PCI device
81
+ * @v where	Location within PCI configuration space
82
+ * @v value	Value read
83
+ * @ret rc	Return status code
84
+ */
85
+int pci_read_config_dword ( struct pci_device *pci, unsigned int where,
86
+			    uint32_t *value );
87
+
88
+/**
89
+ * Write byte to PCI configuration space
90
+ *
91
+ * @v pci	PCI device
92
+ * @v where	Location within PCI configuration space
93
+ * @v value	Value to be written
94
+ * @ret rc	Return status code
95
+ */
96
+int pci_write_config_byte ( struct pci_device *pci, unsigned int where,
97
+			    uint8_t value );
98
+
99
+/**
100
+ * Write 16-bit word to PCI configuration space
101
+ *
102
+ * @v pci	PCI device
103
+ * @v where	Location within PCI configuration space
104
+ * @v value	Value to be written
105
+ * @ret rc	Return status code
106
+ */
107
+int pci_write_config_word ( struct pci_device *pci, unsigned int where,
108
+			    uint16_t value );
109
+
110
+/**
111
+ * Write 32-bit dword to PCI configuration space
112
+ *
113
+ * @v pci	PCI device
114
+ * @v where	Location within PCI configuration space
115
+ * @v value	Value to be written
116
+ * @ret rc	Return status code
117
+ */
118
+int pci_write_config_dword ( struct pci_device *pci, unsigned int where,
119
+			     uint32_t value );
120
+
121
+#endif /* _GPXE_PCI_IO_H */

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