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Natsemi commented and almost done

tags/v0.9.3
Udayan Kumar 18 年前
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共有 1 个文件被更改,包括 106 次插入78 次删除
  1. 106
    78
      src/drivers/net/natsemi.c

+ 106
- 78
src/drivers/net/natsemi.c 查看文件

@@ -50,13 +50,13 @@
50 50
 
51 51
 /*
52 52
   02 JUL 2007 Udayan Kumar	 1.2 ported the driver from etherboot to gPXE API
53
-		      	      	 Added a circular buffer for transmit and receive.
54
-		                 transmit routine will not wait for transmission to finish
55
-			         poll routine deals with it.
53
+		      	      	     Added a circular buffer for transmit and receive.
54
+		                     transmit routine will not wait for transmission to finish.
55
+			             poll routine deals with it.
56 56
 
57
-  13 Dec 2003 timlegge 		1.1 Enabled Multicast Support
58
-  29 May 2001  mdc     		1.0
59
-     Initial Release.  		Tested with Netgear FA311 and FA312 boards
57
+  13 Dec 2003 timlegge 	         1.1 Enabled Multicast Support
58
+  29 May 2001  mdc     		 1.0
59
+     Initial Release.  		 Tested with Netgear FA311 and FA312 boards
60 60
 */
61 61
  
62 62
 
@@ -119,7 +119,6 @@ struct natsemi_nic {
119 119
 	struct nvo_block nvo;
120 120
 };
121 121
 
122
-
123 122
 /* NATSEMI: Offsets to the device registers.
124 123
  * Unlike software-only systems, device drivers interact with complex hardware.
125 124
  * It's not useful to define symbolic names for every register bit in the
@@ -154,8 +153,8 @@ enum register_offsets {
154 153
     PhyStatus    = 0xC0, 
155 154
     MIntrCtrl    = 0xC4, 
156 155
     MIntrStatus  = 0xC8,
157
-
158
-    /* These are from the spec, around page 78... on a separate table. */
156
+    /* These are from the spec, around page 78... on a separate table. 
157
+     */
159 158
     PGSEL        = 0xCC, 
160 159
     PMDCSR       = 0xE4, 
161 160
     TSTDAT       = 0xFC, 
@@ -166,10 +165,8 @@ enum register_offsets {
166 165
 	    
167 166
 };
168 167
 
169
-
170
-
171
-
172
-/* Bit in ChipCmd. */
168
+/* Bit in ChipCmd.
169
+ */
173 170
 enum ChipCmdBits {
174 171
     ChipReset = 0x100, 
175 172
     RxReset   = 0x20, 
@@ -180,8 +177,8 @@ enum ChipCmdBits {
180 177
     TxOn      = 0x01
181 178
 };
182 179
 
183
-
184
-/* Bits in the RxMode register. */
180
+/* Bits in the RxMode register.
181
+ */
185 182
 enum rx_mode_bits {
186 183
     AcceptErr          = 0x20,
187 184
     AcceptRunt         = 0x10,
@@ -193,7 +190,8 @@ enum rx_mode_bits {
193 190
     RxFilterEnable     = 0x80000000
194 191
 };
195 192
 
196
-/* Bits in network_desc.status */
193
+/* Bits in network_desc.status
194
+ */
197 195
 enum desc_status_bits {
198 196
     DescOwn   = 0x80000000, 
199 197
     DescMore  = 0x40000000, 
@@ -203,8 +201,8 @@ enum desc_status_bits {
203 201
     RxTooLong = 0x00400000
204 202
 };
205 203
 
206
-/*Bits in Interrupt Mask register */
207
-
204
+/*Bits in Interrupt Mask register
205
+ */
208 206
 enum Intr_mask_register_bits {
209 207
     RxOk       = 0x001,
210 208
     RxErr      = 0x004,
@@ -212,19 +210,19 @@ enum Intr_mask_register_bits {
212 210
     TxErr      = 0x100 
213 211
 };	
214 212
 
215
-
216
-/*  EEPROM access , values are devices specific*/
213
+/*  EEPROM access , values are devices specific
214
+ */
217 215
 #define EE_CS		0x08	/* EEPROM chip select */
218 216
 #define EE_SK		0x04	/* EEPROM shift clock */
219 217
 #define EE_DI		0x01	/* Data in */
220 218
 #define EE_DO		0x02	/* Data out */
221 219
 
222
-/* Offsets within EEPROM (these are word offsets) */
220
+/* Offsets within EEPROM (these are word offsets)
221
+ */
223 222
 #define EE_MAC 7
224 223
 #define EE_REG  EECtrl
225 224
 static uint32_t SavedClkRun;	
226 225
 
227
-
228 226
 static const uint8_t nat_ee_bits[] = {
229 227
 	[SPI_BIT_SCLK]	= EE_SK,
230 228
 	[SPI_BIT_MOSI]	= EE_DI,
@@ -277,13 +275,15 @@ static struct nvo_fragment nat_nvo_fragments[] = {
277 275
  */
278 276
  void nat_init_eeprom ( struct natsemi_nic *nat ) {
279 277
 
280
-	/* Initialise three-wire bus  */
278
+	/* Initialise three-wire bus 
279
+	 */
281 280
 	nat->spibit.basher.op = &nat_basher_ops;
282 281
 	nat->spibit.bus.mode = SPI_MODE_THREEWIRE;
283 282
 	nat->spibit.endianness = SPI_BIT_LITTLE_ENDIAN;
284 283
 	init_spi_bit_basher ( &nat->spibit );
285 284
 
286
-	/*natsemi DP 83815 only supports at93c46 */
285
+	/*natsemi DP 83815 only supports at93c46
286
+	 */
287 287
 	init_at93c46 ( &nat->eeprom, 16 );
288 288
 	nat->eeprom.bus = &nat->spibit.bus;
289 289
 
@@ -301,7 +301,8 @@ static struct nvo_fragment nat_nvo_fragments[] = {
301 301
 static void nat_reset ( struct natsemi_nic *nat ) {
302 302
 
303 303
 	int i;
304
-	/* Reset chip */
304
+	/* Reset chip
305
+	 */
305 306
 	outl ( ChipReset, nat->ioaddr + ChipCmd );
306 307
 	mdelay ( 10 );
307 308
 	nat->tx_dirty=0;
@@ -317,7 +318,8 @@ static void nat_reset ( struct natsemi_nic *nat ) {
317 318
 
318 319
 	outl(TxOff|RxOff, nat->ioaddr + ChipCmd);
319 320
 
320
-	/* Restore PME enable bit */
321
+	/* Restore PME enable bit
322
+	 */
321 323
 	outl(SavedClkRun, nat->ioaddr + ClkRun);
322 324
 }
323 325
 
@@ -342,13 +344,16 @@ static int nat_open ( struct net_device *netdev ) {
342 344
         SavedClkRun = inl(nat->ioaddr + ClkRun);
343 345
         outl(SavedClkRun & ~0x100, nat->ioaddr + ClkRun);
344 346
 
345
-	/* Setting up Mac address in the NIC */
347
+	/* Setting up Mac address in the NIC
348
+	 */
346 349
 	for ( i = 0 ; i < ETH_ALEN ; i+=2 ) {
347 350
 		outl(i,nat->ioaddr+RxFilterAddr);
348
-		outw ( netdev->ll_addr[i] + (netdev->ll_addr[i+1]<<8), nat->ioaddr +RxFilterData);
351
+		outw ( netdev->ll_addr[i] + (netdev->ll_addr[i+1]<<8),
352
+			 nat->ioaddr +RxFilterData);
349 353
 	}
350 354
 
351
-	/*Set up the Tx Ring */
355
+	/*Set up the Tx Ring
356
+	 */
352 357
 	nat->tx_cur=0;
353 358
 	nat->tx_dirty=0;
354 359
 	for (i=0;i<TX_RING_SIZE;i++) {
@@ -357,7 +362,8 @@ static int nat_open ( struct net_device *netdev ) {
357 362
 		nat->tx[i].bufptr = 0;
358 363
 	}
359 364
 
360
-	/* Set up RX ring */
365
+	/* Set up RX ring
366
+	 */
361 367
 	nat->rx_cur=0;
362 368
 	for (i=0;i<NUM_RX_DESC;i++) {
363 369
 
@@ -369,16 +375,22 @@ static int nat_open ( struct net_device *netdev ) {
369 375
 		nat->rx[i].bufptr = virt_to_bus(nat->iobuf[i]->data);
370 376
 	}
371 377
 
372
-	/* load Receive Descriptor Register */
378
+	/* load Receive Descriptor Register
379
+	 */
373 380
 	outl(virt_to_bus(&nat->rx[0]), nat->ioaddr + RxRingPtr);
374
-	DBG("Natsemi Rx descriptor loaded with: %X\n",(unsigned int)inl(nat->ioaddr+RxRingPtr));		
381
+	DBG("Natsemi Rx descriptor loaded with: %X\n",
382
+		(unsigned int)inl(nat->ioaddr+RxRingPtr));		
375 383
 
376
-	/* setup Tx ring */
384
+	/* setup Tx ring
385
+	 */
377 386
 	outl(virt_to_bus(&nat->tx[0]),nat->ioaddr+TxRingPtr);
378
-	DBG("Natsemi Tx descriptor loaded with: %X\n",(unsigned int)inl(nat->ioaddr+TxRingPtr));
387
+	DBG("Natsemi Tx descriptor loaded with: %X\n",
388
+		(unsigned int)inl(nat->ioaddr+TxRingPtr));
379 389
 
380
-	/* Enables RX */
381
-	outl(RxFilterEnable|AcceptBroadcast|AcceptAllMulticast|AcceptMyPhys, nat->ioaddr+RxFilterAddr);
390
+	/* Enables RX
391
+	 */
392
+	outl(RxFilterEnable|AcceptBroadcast|AcceptAllMulticast|AcceptMyPhys,
393
+		 nat->ioaddr+RxFilterAddr);
382 394
 
383 395
 	/* Initialize other registers. 
384 396
 	 * Configure the PCI bus bursts and FIFO thresholds. 
@@ -394,10 +406,12 @@ static int nat_open ( struct net_device *netdev ) {
394 406
 	outl(tx_config, nat->ioaddr + TxConfig);
395 407
 	outl(rx_config, nat->ioaddr + RxConfig);
396 408
 
397
-	/*start the receiver  */
409
+	/*start the receiver 
410
+	 */
398 411
         outl(RxOn, nat->ioaddr + ChipCmd);
399 412
 
400
-	/*enable interrupts*/
413
+	/*enable interrupts
414
+	 */
401 415
 	outl((RxOk|RxErr|TxOk|TxErr),nat->ioaddr + IntrMask); 
402 416
 	//outl(1,nat->ioaddr +IntrEnable);
403 417
 
@@ -414,15 +428,18 @@ static void nat_close ( struct net_device *netdev ) {
414 428
 	int i;
415 429
 
416 430
 
417
-	/* Reset the hardware to disable everything in one go */
431
+	/* Reset the hardware to disable everything in one go
432
+	 */
418 433
 	nat_reset ( nat );
419 434
 
420
-	/* Free RX ring */
435
+	/* Free RX ring
436
+	 */
421 437
 	for (i=0;i<NUM_RX_DESC;i++) {
422 438
 		
423 439
 		free_iob( nat->iobuf[i] );
424 440
 	}
425
-	/* disable interrupts */
441
+	/* disable interrupts
442
+	 */
426 443
 	//outl(0,nat->ioaddr + IntrMask) ;
427 444
 }
428 445
 
@@ -436,28 +453,34 @@ static void nat_close ( struct net_device *netdev ) {
436 453
 static int nat_transmit ( struct net_device *netdev, struct io_buffer *iobuf ) {
437 454
 	struct natsemi_nic *nat = netdev->priv;
438 455
 
439
-        /* check for space in TX ring */
456
+        /* check for space in TX ring
457
+	 */
440 458
 	if (nat->tx[nat->tx_cur].cmdsts !=0) {
441 459
 		DBG( "TX overflow\n" );
442 460
 		return -ENOBUFS;
443 461
 	}
444 462
 
445
-	/* to be used in netdev_tx_complete*/
463
+	/* to be used in netdev_tx_complete
464
+	 */
446 465
 	nat->tx_iobuf[nat->tx_cur]=iobuf;
447 466
 
448
-	/* Pad and align packet */
449
-	iob_pad ( iobuf, ETH_ZLEN );
467
+	/* Pad and align packet has been ignored because its not required here
468
+	 * iob_pad ( iobuf, ETH_ZLEN ); can be used to achieve it
469
+	 */
450 470
 
451
-	/* Add to TX ring */
471
+	/* Add to TX ring
472
+	 */
452 473
 	DBG ( "TX id %d at %lx+%x\n", nat->tx_cur,
453 474
 	      virt_to_bus ( &iobuf->data ), iob_len ( iobuf ) );
454 475
 
455 476
 	nat->tx[nat->tx_cur].bufptr = virt_to_bus(iobuf->data);
456 477
 	nat->tx[nat->tx_cur].cmdsts= iob_len(iobuf)|OWN;
457
-	/* increment the circular buffer pointer to the next buffer location */
478
+	/* increment the circular buffer pointer to the next buffer location
479
+	 */
458 480
 	nat->tx_cur=(nat->tx_cur+1) % TX_RING_SIZE;
459 481
 
460
-	/*start the transmitter  */
482
+	/*start the transmitter 
483
+	 */
461 484
         outl(TxOn, nat->ioaddr + ChipCmd);
462 485
 
463 486
 	return 0;
@@ -479,12 +502,14 @@ static void nat_poll ( struct net_device *netdev, unsigned int rx_quota ) {
479 502
 	int i;
480 503
 	
481 504
 	//outl(1,nat->ioaddr +IntrEnable);
482
-	/* read the interrupt register */
505
+	/* read the interrupt register
506
+	 */
483 507
 	intr_status=inl(nat->ioaddr+IntrStatus);
484 508
 	if(!intr_status)
485 509
 	goto end;
486 510
 
487
-	/* check the status of packets given to card for transmission */	
511
+	/* check the status of packets given to card for transmission
512
+	 */	
488 513
 	DBG("Intr status %X\n",intr_status);
489 514
 
490 515
 	i=nat->tx_dirty;
@@ -493,10 +518,12 @@ static void nat_poll ( struct net_device *netdev, unsigned int rx_quota ) {
493 518
 		DBG("value of tx_dirty = %d tx_cur=%d status=%X\n",
494 519
 			nat->tx_dirty,nat->tx_cur,status);
495 520
 		
496
-		/* check if current packet has been transmitted or not */
521
+		/* check if current packet has been transmitted or not
522
+		 */
497 523
 		if(status & OWN) 
498 524
 			break;
499
-		/* Check if any errors in transmission */
525
+		/* Check if any errors in transmission
526
+		 */
500 527
 		if (! (status & DescPktOK)) {
501 528
 			DBG("Error in sending Packet status:%X\n",
502 529
 					(unsigned int)status);
@@ -505,17 +532,20 @@ static void nat_poll ( struct net_device *netdev, unsigned int rx_quota ) {
505 532
 			DBG("Success in transmitting Packet\n");
506 533
 			netdev_tx_complete(netdev,nat->tx_iobuf[nat->tx_dirty]);
507 534
 		}
508
-		/* setting cmdsts zero, indicating that it can be reused */
535
+		/* setting cmdsts zero, indicating that it can be reused 
536
+		 */
509 537
 		nat->tx[nat->tx_dirty].cmdsts=0;
510 538
 		nat->tx_dirty=(nat->tx_dirty +1) % TX_RING_SIZE;
511 539
 		i=(i+1) % TX_RING_SIZE;
512 540
 	}
513 541
 	
514
-	/* Handle received packets */
542
+	/* Handle received packets 
543
+	 */
515 544
 	rx_status=(unsigned int)nat->rx[nat->rx_cur].cmdsts; 
516 545
 	while (rx_quota && (rx_status & OWN)) {
517 546
 		rx_len= (rx_status & DSIZE) - CRC_SIZE;
518
-		/*check for the corrupt packet */
547
+		/*check for the corrupt packet 
548
+		 */
519 549
 		if((rx_status & (DescMore|DescPktOK|RxTooLong)) != DescPktOK) {
520 550
 			 DBG("natsemi_poll: Corrupted packet received, "
521 551
 					"buffer status = %X ^ %X \n",rx_status,
@@ -524,12 +554,14 @@ static void nat_poll ( struct net_device *netdev, unsigned int rx_quota ) {
524 554
 		} else 	{
525 555
 			rx_iob = alloc_iob(rx_len);
526 556
 			if(!rx_iob) 
527
-				/* leave packet for next call to poll*/
557
+				/* leave packet for next call to poll
558
+				 */
528 559
 				goto end;
529 560
 			memcpy(iob_put(rx_iob,rx_len),
530 561
 					nat->iobuf[nat->rx_cur]->data,rx_len);
531 562
 			DBG("received packet\n");
532
-			/* add to the receive queue. */
563
+			/* add to the receive queue. 
564
+			 */
533 565
 			netdev_rx(netdev,rx_iob);
534 566
 			rx_quota--;
535 567
 		}
@@ -540,7 +572,8 @@ static void nat_poll ( struct net_device *netdev, unsigned int rx_quota ) {
540 572
 
541 573
 end:
542 574
 
543
-	/* re-enable the potentially idle receive state machine */
575
+	/* re-enable the potentially idle receive state machine 
576
+	 */
544 577
 	outl(RxOn, nat->ioaddr + ChipCmd);	
545 578
 //	outl(1,nat->ioaddr +IntrEnable);
546 579
 }				
@@ -570,7 +603,8 @@ static int nat_probe ( struct pci_device *pci,
570 603
 	uint8_t last=0;
571 604
 	uint8_t last1=0;
572 605
 
573
-	/* Allocate net device */
606
+	/* Allocate net device 
607
+	 */
574 608
 	netdev = alloc_etherdev ( sizeof ( *nat ) );
575 609
 	if ( ! netdev ) 
576 610
 		return -ENOMEM;
@@ -581,10 +615,12 @@ static int nat_probe ( struct pci_device *pci,
581 615
 	memset ( nat, 0, sizeof ( *nat ) );
582 616
 	nat->ioaddr = pci->ioaddr;
583 617
 
584
-	/* Fix up PCI device */
618
+	/* Fix up PCI device
619
+	 */
585 620
 	adjust_pci_device ( pci );
586 621
 
587
-	/* Reset the NIC, set up EEPROM access and read MAC address */
622
+	/* Reset the NIC, set up EEPROM access and read MAC address
623
+	 */
588 624
 	nat_reset ( nat );
589 625
 	nat_init_eeprom ( nat );
590 626
 	nvs_read ( &nat->eeprom.nvs, EE_MAC, ll_addr_encoded, ETH_ALEN );
@@ -598,24 +634,14 @@ static int nat_probe ( struct pci_device *pci,
598 634
 		last=(ll_addr_encoded[i+1]>>7);
599 635
 		netdev->ll_addr[i+1]=(ll_addr_encoded[i+1]<<1)+last1;
600 636
 	}
601
-	/* TODO remove the block below */
602
-	DBG("Contents of the EEPROM\n");
603
-	uint8_t eetest[108];
604
-	nvs_read(&nat->eeprom.nvs,0,eetest,108);
605
-	DBG_HD(&eetest,108);
606
-
607
-	/* Point to NIC specific routines */
608
-	/*
609
-	netdev->open	 = nat_open;
610
-	netdev->close	 = nat_close;
611
-	netdev->transmit = nat_transmit;
612
-	netdev->poll	 = nat_poll;
613
-	*/
614
-	/* Register network device */
637
+
638
+	/* Register network device
639
+	 */
615 640
 	if ( ( rc = register_netdev ( netdev ) ) != 0 )
616 641
 		goto err_register_netdev;
617 642
 
618
-	/* Register non-volatile storage */
643
+	/* Register non-volatile storage 
644
+	 */
619 645
 	if ( nat->nvo.nvs ) {
620 646
 		if ( ( rc = nvo_register ( &nat->nvo ) ) != 0 )
621 647
 			goto err_register_nvo;
@@ -627,9 +653,11 @@ static int nat_probe ( struct pci_device *pci,
627 653
 err_register_nvo:
628 654
 	unregister_netdev ( netdev );
629 655
 err_register_netdev:
630
-	/* Disable NIC */
656
+	/* Disable NIC
657
+	 */
631 658
 	nat_reset ( nat );
632
-	/* Free net device */
659
+	/* Free net device
660
+	 */
633 661
 	netdev_put ( netdev );
634 662
 	return rc;
635 663
 }

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