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[intel] Refill receive ring only after enabling receiver

On 82576 (and probably others), the datasheet states that "the tail
register of the queue (RDT[n]) should not be bumped until the queue is
enabled".  There is some confusion over exactly what constitutes
"enabled": the initialisation blurb says that we should "poll the
RXDCTL register until the ENABLE bit is set", while the description
for the RXDCTL register says that the ENABLE bit is set by default
(for queue zero).  Empirical evidence suggests that the ENABLE bit
reads as set immediately after writing to RCTL.EN, and so polling is
not necessary.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 13 년 전
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1개의 변경된 파일3개의 추가작업 그리고 3개의 파일을 삭제
  1. 3
    3
      src/drivers/net/intel.c

+ 3
- 3
src/drivers/net/intel.c 파일 보기

491
 	if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
491
 	if ( ( rc = intel_create_ring ( intel, &intel->rx ) ) != 0 )
492
 		goto err_create_rx;
492
 		goto err_create_rx;
493
 
493
 
494
-	/* Fill receive ring */
495
-	intel_refill_rx ( intel );
496
-
497
 	/* Program MAC address */
494
 	/* Program MAC address */
498
 	memset ( &mac, 0, sizeof ( mac ) );
495
 	memset ( &mac, 0, sizeof ( mac ) );
499
 	memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
496
 	memcpy ( mac.raw, netdev->ll_addr, sizeof ( mac.raw ) );
515
 		  INTEL_RCTL_BAM | INTEL_RCTL_BSIZE_2048 | INTEL_RCTL_SECRC );
512
 		  INTEL_RCTL_BAM | INTEL_RCTL_BSIZE_2048 | INTEL_RCTL_SECRC );
516
 	writel ( rctl, intel->regs + INTEL_RCTL );
513
 	writel ( rctl, intel->regs + INTEL_RCTL );
517
 
514
 
515
+	/* Fill receive ring */
516
+	intel_refill_rx ( intel );
517
+
518
 	/* Update link state */
518
 	/* Update link state */
519
 	intel_check_link ( netdev );
519
 	intel_check_link ( netdev );
520
 
520
 

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