Selaa lähdekoodia

Add copyright, clean up comments a bit, remove unnecessary code.

Cleanups for e1000.c.
tags/v0.9.3
Marty Connor 17 vuotta sitten
vanhempi
commit
82a3e80645
1 muutettua tiedostoa jossa 102 lisäystä ja 178 poistoa
  1. 102
    178
      src/drivers/net/e1000/e1000.c

+ 102
- 178
src/drivers/net/e1000/e1000.c Näytä tiedosto

@@ -1,3 +1,18 @@
1
+/*
2
+ * gPXE driver for Intel eepro1000 ethernet cards
3
+ *
4
+ * Written by Marty Connor
5
+ *
6
+ * Copyright Entity Cyber, Inc. 2007
7
+ *
8
+ * This software may be used and distributed according to the terms of
9
+ * the GNU General Public License (GPL), incorporated herein by
10
+ * reference.  Drivers based on or derived from this code fall under
11
+ * the GPL and must retain the authorship, copyright and license
12
+ * notice.
13
+ *
14
+ */
15
+
1 16
 /*******************************************************************************
2 17
 
3 18
   Intel PRO/1000 Linux driver
@@ -30,7 +45,8 @@
30 45
 
31 46
 /**
32 47
  * e1000_get_hw_control - get control of the h/w from f/w
33
- * @adapter: address of board private structure
48
+ *
49
+ * @v adapter	e1000 private structure
34 50
  *
35 51
  * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
36 52
  * For ASF and Pass Through versions of f/w this means that
@@ -39,7 +55,7 @@
39 55
  *
40 56
  **/
41 57
 static void
42
-e1000_get_hw_control(struct e1000_adapter *adapter)
58
+e1000_get_hw_control ( struct e1000_adapter *adapter )
43 59
 {
44 60
 	uint32_t ctrl_ext;
45 61
 	uint32_t swsm;
@@ -68,7 +84,8 @@ e1000_get_hw_control(struct e1000_adapter *adapter)
68 84
 
69 85
 /**
70 86
  * e1000_irq_enable - Enable default interrupt generation settings
71
- * @adapter: board private structure
87
+ *
88
+ * @v adapter	e1000 private structure
72 89
  **/
73 90
 static void
74 91
 e1000_irq_enable ( struct e1000_adapter *adapter )
@@ -80,7 +97,8 @@ e1000_irq_enable ( struct e1000_adapter *adapter )
80 97
 
81 98
 /**
82 99
  * e1000_irq_disable - Mask off interrupt generation on the NIC
83
- * @adapter: board private structure
100
+ *
101
+ * @v adapter	e1000 private structure
84 102
  **/
85 103
 static void
86 104
 e1000_irq_disable ( struct e1000_adapter *adapter )
@@ -91,7 +109,8 @@ e1000_irq_disable ( struct e1000_adapter *adapter )
91 109
 
92 110
 /**
93 111
  * e1000_irq_force - trigger interrupt
94
- * @adapter: board private structure
112
+ *
113
+ * @v adapter	e1000 private structure
95 114
  **/
96 115
 static void
97 116
 e1000_irq_force ( struct e1000_adapter *adapter )
@@ -102,7 +121,8 @@ e1000_irq_force ( struct e1000_adapter *adapter )
102 121
 
103 122
 /**
104 123
  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
105
- * @adapter: board private structure to initialize
124
+ *
125
+ * @v adapter	e1000 private structure
106 126
  *
107 127
  * e1000_sw_init initializes the Adapter private data structure.
108 128
  * Fields are initialized based on PCI device information and
@@ -178,10 +198,10 @@ e1000_sw_init ( struct e1000_adapter *adapter )
178 198
 
179 199
 /**
180 200
  * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
181
- * @adapter: board private structure
182
- * @txdr:    tx descriptor ring (for a specific queue) to setup
183 201
  *
184
- * Return 0 on success, negative on failure
202
+ * @v adapter	e1000 private structure
203
+ *
204
+ * @ret rc       Returns 0 on success, negative on failure
185 205
  **/
186 206
 static int
187 207
 e1000_setup_tx_resources ( struct e1000_adapter *adapter )
@@ -232,11 +252,6 @@ e1000_configure_tx ( struct e1000_adapter *adapter )
232 252
 	struct e1000_hw *hw = &adapter->hw;
233 253
 	uint32_t tctl;
234 254
 
235
-#if 0
236
-	uint32 tipg, tarc;
237
-	uint32_t ipgr1, ipgr2;
238
-#endif
239
-	
240 255
 	DBG ( "e1000_configure_tx\n" );
241 256
 
242 257
 	E1000_WRITE_REG ( hw, TDBAH, 0 );
@@ -253,100 +268,24 @@ e1000_configure_tx ( struct e1000_adapter *adapter )
253 268
 	adapter->tx_head = 0;
254 269
 	adapter->tx_tail = 0;
255 270
 	adapter->tx_fill_ctr = 0;
256
-	
257
-#if 0
258
-	/* Set the default values for the Tx Inter Packet Gap timer */
259
-	if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
260
-	    (hw->media_type == e1000_media_type_fiber ||
261
-	     hw->media_type == e1000_media_type_internal_serdes))
262
-		tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
263
-	else
264
-		tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
265
-
266
-	switch (hw->mac_type) {
267
-	case e1000_82542_rev2_0:
268
-	case e1000_82542_rev2_1:
269
-		tipg = DEFAULT_82542_TIPG_IPGT;
270
-		ipgr1 = DEFAULT_82542_TIPG_IPGR1;
271
-		ipgr2 = DEFAULT_82542_TIPG_IPGR2;
272
-		break;
273
-	case e1000_80003es2lan:
274
-		ipgr1 = DEFAULT_82543_TIPG_IPGR1;
275
-		ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
276
-		break;
277
-	default:
278
-		ipgr1 = DEFAULT_82543_TIPG_IPGR1;
279
-		ipgr2 = DEFAULT_82543_TIPG_IPGR2;
280
-		break;
281
-	}
282
-	tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
283
-	tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
284
-	E1000_WRITE_REG ( hw, TIPG, tipg );
285
-
286
-	/* Set the Tx Interrupt Delay register */
287
-
288
-	E1000_WRITE_REG (hw, TIDV, adapter->tx_int_delay);
289
-	if (hw->mac_type >= e1000_82540)
290
-		E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
291
-
292
-	/* Program the Transmit Control Register */
293
-
294
-	tctl = E1000_READ_REG ( hw, TCTL );
295
-	tctl &= ~E1000_TCTL_CT;
296
-	tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
297
-		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
298
-
299
-	if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
300
-		tarc = E1000_READ_REG(hw, TARC0);
301
-		/* set the speed mode bit, we'll clear it if we're not at
302
-		 * gigabit link later */
303
-		tarc |= (1 << 21);
304
-		E1000_WRITE_REG(hw, TARC0, tarc);
305
-	} else if (hw->mac_type == e1000_80003es2lan) {
306
-		tarc = E1000_READ_REG(hw, TARC0);
307
-		tarc |= 1;
308
-		E1000_WRITE_REG(hw, TARC0, tarc);
309
-		tarc = E1000_READ_REG(hw, TARC1);
310
-		tarc |= 1;
311
-		E1000_WRITE_REG(hw, TARC1, tarc);
312
-	}
313
-#endif
314
-
315
-	e1000_config_collision_dist ( hw );
316 271
 
272
+	/* Setup Transmit Descriptor Settings for eop descriptor */
317 273
 	tctl = E1000_TCTL_PSP | E1000_TCTL_EN |
318 274
 		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT) | 
319 275
 		(E1000_HDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
320 276
 
321
-#if 0
322
-	/* Setup Transmit Descriptor Settings for eop descriptor */
323
-	adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
324
-
325
-	/* only set IDE if we are delaying interrupts using the timers */
326
-	if (adapter->tx_int_delay)
327
-		adapter->txd_cmd |= E1000_TXD_CMD_IDE;
328
-
329
-	if (hw->mac_type < e1000_82543)
330
-		adapter->txd_cmd |= E1000_TXD_CMD_RPS;
331
-	else
332
-		adapter->txd_cmd |= E1000_TXD_CMD_RS;
333
-
334
-	/* Cache if we're 82544 running in PCI-X because we'll
335
-	 * need this to apply a workaround later in the send path. */
336
-	if (hw->mac_type == e1000_82544 &&
337
-	    hw->bus_type == e1000_bus_type_pcix)
338
-		adapter->pcix_82544 = 1;
339
-#endif
277
+	e1000_config_collision_dist ( hw );
340 278
 
341 279
 	E1000_WRITE_REG ( hw, TCTL, tctl );
280
+        E1000_WRITE_FLUSH ( hw );
342 281
 }
343 282
 
344 283
 /**
345 284
  * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
346
- * @adapter: board private structure
347
- * @rxdr:    rx descriptor ring (for a specific queue) to setup
348 285
  *
349
- * Returns 0 on success, negative on failure
286
+ * @v adapter	e1000 private structure
287
+ *
288
+ * @ret rc       Returns 0 on success, negative on failure
350 289
  **/
351 290
 static int
352 291
 e1000_setup_rx_resources ( struct e1000_adapter *adapter )
@@ -600,7 +539,7 @@ e1000_close ( struct net_device *netdev )
600 539
  * @v netdev	Network device
601 540
  * @v iobuf	I/O buffer
602 541
  *
603
- * @ret rc	Return status code
542
+ * @ret rc       Returns 0 on success, negative on failure
604 543
  */
605 544
 static int
606 545
 e1000_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
@@ -649,14 +588,6 @@ e1000_transmit ( struct net_device *netdev, struct io_buffer *iobuf )
649 588
 	 */
650 589
 	E1000_WRITE_REG ( hw, TDT, adapter->tx_tail );
651 590
 
652
-#if 0	
653
-	while ( ! ( tx_curr_desc->upper.data & E1000_TXD_STAT_DD ) ) {
654
-		udelay ( 10 );	/* give the nic a chance to write to the register */
655
-	}
656
-
657
-	DBG ( "Leaving XMIT\n" );
658
-#endif
659
-
660 591
 	return 0;
661 592
 }
662 593
 
@@ -682,9 +613,7 @@ e1000_poll ( struct net_device *netdev )
682 613
 	uint32_t i;
683 614
 	uint64_t tmp_buffer_addr;
684 615
 	
685
-#if 0
686
-	DBG ( "e1000_poll\n" );
687
-#endif
616
+	DBGP ( "e1000_poll\n" );
688 617
 
689 618
 	/* Acknowledge interrupts */
690 619
 	icr = E1000_READ_REG ( hw, ICR );
@@ -702,11 +631,6 @@ e1000_poll ( struct net_device *netdev )
702 631
 					    		
703 632
 		tx_status = tx_curr_desc->upper.data;
704 633
 
705
-#if 0
706
-		DBG ( "tx_curr_desc = %#08lx status = %#08lx\n",
707
-		      virt_to_bus ( tx_curr_desc ), tx_status );
708
-#endif
709
-
710 634
 		/* if the packet at tx_head is not owned by hardware it is for us */
711 635
 		if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
712 636
 			break;
@@ -743,7 +667,7 @@ e1000_poll ( struct net_device *netdev )
743 667
 			          ( i * sizeof ( *adapter->rx_base ) ); 
744 668
 		rx_status = rx_curr_desc->status;
745 669
 		
746
-		// DBG ( "Before DD Check RX_status: %#08lx\n", rx_status );
670
+		DBG2 ( "Before DD Check RX_status: %#08lx\n", rx_status );
747 671
 	
748 672
 		if ( ! ( rx_status & E1000_RXD_STAT_DD ) )
749 673
 			break;
@@ -1019,14 +943,14 @@ e1000_open ( struct net_device *netdev )
1019 943
 
1020 944
 	/* allocate transmit descriptors */
1021 945
 	err = e1000_setup_tx_resources ( adapter );
1022
-	if (err) {
946
+	if ( err ) {
1023 947
 		DBG ( "Error setting up TX resources!\n" );
1024 948
 		goto err_setup_tx;
1025 949
 	}
1026 950
 
1027 951
 	/* allocate receive descriptors */
1028 952
 	err = e1000_setup_rx_resources ( adapter );
1029
-	if (err) {
953
+	if ( err ) {
1030 954
 		DBG ( "Error setting up RX resources!\n" );
1031 955
 		goto err_setup_rx;
1032 956
 	}
@@ -1112,68 +1036,68 @@ e1000_io_write ( struct e1000_hw *hw  __unused, unsigned long port, uint32_t val
1112 1036
 }
1113 1037
 
1114 1038
 static struct pci_device_id e1000_nics[] = {
1115
-	PCI_ROM(0x8086, 0x1000, "e1000-0x1000", "E1000-0x1000"),
1116
-	PCI_ROM(0x8086, 0x1001, "e1000-0x1001", "E1000-0x1001"),
1117
-	PCI_ROM(0x8086, 0x1004, "e1000-0x1004", "E1000-0x1004"),
1118
-	PCI_ROM(0x8086, 0x1008, "e1000-0x1008", "E1000-0x1008"),
1119
-	PCI_ROM(0x8086, 0x1009, "e1000-0x1009", "E1000-0x1009"),
1120
-	PCI_ROM(0x8086, 0x100C, "e1000-0x100C", "E1000-0x100C"),
1121
-	PCI_ROM(0x8086, 0x100D, "e1000-0x100D", "E1000-0x100D"),
1122
-	PCI_ROM(0x8086, 0x100E, "e1000-0x100E", "E1000-0x100E"),
1123
-	PCI_ROM(0x8086, 0x100F, "e1000-0x100F", "E1000-0x100F"),
1124
-	PCI_ROM(0x8086, 0x1010, "e1000-0x1010", "E1000-0x1010"),
1125
-	PCI_ROM(0x8086, 0x1011, "e1000-0x1011", "E1000-0x1011"),
1126
-	PCI_ROM(0x8086, 0x1012, "e1000-0x1012", "E1000-0x1012"),
1127
-	PCI_ROM(0x8086, 0x1013, "e1000-0x1013", "E1000-0x1013"),
1128
-	PCI_ROM(0x8086, 0x1014, "e1000-0x1014", "E1000-0x1014"),
1129
-	PCI_ROM(0x8086, 0x1015, "e1000-0x1015", "E1000-0x1015"),
1130
-	PCI_ROM(0x8086, 0x1016, "e1000-0x1016", "E1000-0x1016"),
1131
-	PCI_ROM(0x8086, 0x1017, "e1000-0x1017", "E1000-0x1017"),
1132
-	PCI_ROM(0x8086, 0x1018, "e1000-0x1018", "E1000-0x1018"),
1133
-	PCI_ROM(0x8086, 0x1019, "e1000-0x1019", "E1000-0x1019"),
1134
-	PCI_ROM(0x8086, 0x101A, "e1000-0x101A", "E1000-0x101A"),
1135
-	PCI_ROM(0x8086, 0x101D, "e1000-0x101D", "E1000-0x101D"),
1136
-	PCI_ROM(0x8086, 0x101E, "e1000-0x101E", "E1000-0x101E"),
1137
-	PCI_ROM(0x8086, 0x1026, "e1000-0x1026", "E1000-0x1026"),
1138
-	PCI_ROM(0x8086, 0x1027, "e1000-0x1027", "E1000-0x1027"),
1139
-	PCI_ROM(0x8086, 0x1028, "e1000-0x1028", "E1000-0x1028"),
1140
-	PCI_ROM(0x8086, 0x1049, "e1000-0x1049", "E1000-0x1049"),
1141
-	PCI_ROM(0x8086, 0x104A, "e1000-0x104A", "E1000-0x104A"),
1142
-	PCI_ROM(0x8086, 0x104B, "e1000-0x104B", "E1000-0x104B"),
1143
-	PCI_ROM(0x8086, 0x104C, "e1000-0x104C", "E1000-0x104C"),
1144
-	PCI_ROM(0x8086, 0x104D, "e1000-0x104D", "E1000-0x104D"),
1145
-	PCI_ROM(0x8086, 0x105E, "e1000-0x105E", "E1000-0x105E"),
1146
-	PCI_ROM(0x8086, 0x105F, "e1000-0x105F", "E1000-0x105F"),
1147
-	PCI_ROM(0x8086, 0x1060, "e1000-0x1060", "E1000-0x1060"),
1148
-	PCI_ROM(0x8086, 0x1075, "e1000-0x1075", "E1000-0x1075"),
1149
-	PCI_ROM(0x8086, 0x1076, "e1000-0x1076", "E1000-0x1076"),
1150
-	PCI_ROM(0x8086, 0x1077, "e1000-0x1077", "E1000-0x1077"),
1151
-	PCI_ROM(0x8086, 0x1078, "e1000-0x1078", "E1000-0x1078"),
1152
-	PCI_ROM(0x8086, 0x1079, "e1000-0x1079", "E1000-0x1079"),
1153
-	PCI_ROM(0x8086, 0x107A, "e1000-0x107A", "E1000-0x107A"),
1154
-	PCI_ROM(0x8086, 0x107B, "e1000-0x107B", "E1000-0x107B"),
1155
-	PCI_ROM(0x8086, 0x107C, "e1000-0x107C", "E1000-0x107C"),
1156
-	PCI_ROM(0x8086, 0x107D, "e1000-0x107D", "E1000-0x107D"),
1157
-	PCI_ROM(0x8086, 0x107E, "e1000-0x107E", "E1000-0x107E"),
1158
-	PCI_ROM(0x8086, 0x107F, "e1000-0x107F", "E1000-0x107F"),
1159
-	PCI_ROM(0x8086, 0x108A, "e1000-0x108A", "E1000-0x108A"),
1160
-	PCI_ROM(0x8086, 0x108B, "e1000-0x108B", "E1000-0x108B"),
1161
-	PCI_ROM(0x8086, 0x108C, "e1000-0x108C", "E1000-0x108C"),
1162
-	PCI_ROM(0x8086, 0x1096, "e1000-0x1096", "E1000-0x1096"),
1163
-	PCI_ROM(0x8086, 0x1098, "e1000-0x1098", "E1000-0x1098"),
1164
-	PCI_ROM(0x8086, 0x1099, "e1000-0x1099", "E1000-0x1099"),
1165
-	PCI_ROM(0x8086, 0x109A, "e1000-0x109A", "E1000-0x109A"),
1166
-	PCI_ROM(0x8086, 0x10A4, "e1000-0x10A4", "E1000-0x10A4"),
1167
-	PCI_ROM(0x8086, 0x10A5, "e1000-0x10A5", "E1000-0x10A5"),
1168
-	PCI_ROM(0x8086, 0x10B5, "e1000-0x10B5", "E1000-0x10B5"),
1169
-	PCI_ROM(0x8086, 0x10B9, "e1000-0x10B9", "E1000-0x10B9"),
1170
-	PCI_ROM(0x8086, 0x10BA, "e1000-0x10BA", "E1000-0x10BA"),
1171
-	PCI_ROM(0x8086, 0x10BB, "e1000-0x10BB", "E1000-0x10BB"),
1172
-	PCI_ROM(0x8086, 0x10BC, "e1000-0x10BC", "E1000-0x10BC"),
1173
-	PCI_ROM(0x8086, 0x10C4, "e1000-0x10C4", "E1000-0x10C4"),
1174
-	PCI_ROM(0x8086, 0x10C5, "e1000-0x10C5", "E1000-0x10C5"),
1175
-	PCI_ROM(0x8086, 0x10D9, "e1000-0x10D9", "E1000-0x10D9"),
1176
-	PCI_ROM(0x8086, 0x10DA, "e1000-0x10DA", "E1000-0x10DA"),
1039
+	PCI_ROM(0x8086, 0x1000, "e1000-0x1000", "e1000-0x1000"),
1040
+	PCI_ROM(0x8086, 0x1001, "e1000-0x1001", "e1000-0x1001"),
1041
+	PCI_ROM(0x8086, 0x1004, "e1000-0x1004", "e1000-0x1004"),
1042
+	PCI_ROM(0x8086, 0x1008, "e1000-0x1008", "e1000-0x1008"),
1043
+	PCI_ROM(0x8086, 0x1009, "e1000-0x1009", "e1000-0x1009"),
1044
+	PCI_ROM(0x8086, 0x100c, "e1000-0x100c", "e1000-0x100c"),
1045
+	PCI_ROM(0x8086, 0x100d, "e1000-0x100d", "e1000-0x100d"),
1046
+	PCI_ROM(0x8086, 0x100e, "e1000-0x100e", "e1000-0x100e"),
1047
+	PCI_ROM(0x8086, 0x100f, "e1000-0x100f", "e1000-0x100f"),
1048
+	PCI_ROM(0x8086, 0x1010, "e1000-0x1010", "e1000-0x1010"),
1049
+	PCI_ROM(0x8086, 0x1011, "e1000-0x1011", "e1000-0x1011"),
1050
+	PCI_ROM(0x8086, 0x1012, "e1000-0x1012", "e1000-0x1012"),
1051
+	PCI_ROM(0x8086, 0x1013, "e1000-0x1013", "e1000-0x1013"),
1052
+	PCI_ROM(0x8086, 0x1014, "e1000-0x1014", "e1000-0x1014"),
1053
+	PCI_ROM(0x8086, 0x1015, "e1000-0x1015", "e1000-0x1015"),
1054
+	PCI_ROM(0x8086, 0x1016, "e1000-0x1016", "e1000-0x1016"),
1055
+	PCI_ROM(0x8086, 0x1017, "e1000-0x1017", "e1000-0x1017"),
1056
+	PCI_ROM(0x8086, 0x1018, "e1000-0x1018", "e1000-0x1018"),
1057
+	PCI_ROM(0x8086, 0x1019, "e1000-0x1019", "e1000-0x1019"),
1058
+	PCI_ROM(0x8086, 0x101a, "e1000-0x101a", "e1000-0x101a"),
1059
+	PCI_ROM(0x8086, 0x101d, "e1000-0x101d", "e1000-0x101d"),
1060
+	PCI_ROM(0x8086, 0x101e, "e1000-0x101e", "e1000-0x101e"),
1061
+	PCI_ROM(0x8086, 0x1026, "e1000-0x1026", "e1000-0x1026"),
1062
+	PCI_ROM(0x8086, 0x1027, "e1000-0x1027", "e1000-0x1027"),
1063
+	PCI_ROM(0x8086, 0x1028, "e1000-0x1028", "e1000-0x1028"),
1064
+	PCI_ROM(0x8086, 0x1049, "e1000-0x1049", "e1000-0x1049"),
1065
+	PCI_ROM(0x8086, 0x104a, "e1000-0x104a", "e1000-0x104a"),
1066
+	PCI_ROM(0x8086, 0x104b, "e1000-0x104b", "e1000-0x104b"),
1067
+	PCI_ROM(0x8086, 0x104c, "e1000-0x104c", "e1000-0x104c"),
1068
+	PCI_ROM(0x8086, 0x104d, "e1000-0x104d", "e1000-0x104d"),
1069
+	PCI_ROM(0x8086, 0x105e, "e1000-0x105e", "e1000-0x105e"),
1070
+	PCI_ROM(0x8086, 0x105f, "e1000-0x105f", "e1000-0x105f"),
1071
+	PCI_ROM(0x8086, 0x1060, "e1000-0x1060", "e1000-0x1060"),
1072
+	PCI_ROM(0x8086, 0x1075, "e1000-0x1075", "e1000-0x1075"),
1073
+	PCI_ROM(0x8086, 0x1076, "e1000-0x1076", "e1000-0x1076"),
1074
+	PCI_ROM(0x8086, 0x1077, "e1000-0x1077", "e1000-0x1077"),
1075
+	PCI_ROM(0x8086, 0x1078, "e1000-0x1078", "e1000-0x1078"),
1076
+	PCI_ROM(0x8086, 0x1079, "e1000-0x1079", "e1000-0x1079"),
1077
+	PCI_ROM(0x8086, 0x107a, "e1000-0x107a", "e1000-0x107a"),
1078
+	PCI_ROM(0x8086, 0x107b, "e1000-0x107b", "e1000-0x107b"),
1079
+	PCI_ROM(0x8086, 0x107c, "e1000-0x107c", "e1000-0x107c"),
1080
+	PCI_ROM(0x8086, 0x107d, "e1000-0x107d", "e1000-0x107d"),
1081
+	PCI_ROM(0x8086, 0x107e, "e1000-0x107e", "e1000-0x107e"),
1082
+	PCI_ROM(0x8086, 0x107f, "e1000-0x107f", "e1000-0x107f"),
1083
+	PCI_ROM(0x8086, 0x108a, "e1000-0x108a", "e1000-0x108a"),
1084
+	PCI_ROM(0x8086, 0x108b, "e1000-0x108b", "e1000-0x108b"),
1085
+	PCI_ROM(0x8086, 0x108c, "e1000-0x108c", "e1000-0x108c"),
1086
+	PCI_ROM(0x8086, 0x1096, "e1000-0x1096", "e1000-0x1096"),
1087
+	PCI_ROM(0x8086, 0x1098, "e1000-0x1098", "e1000-0x1098"),
1088
+	PCI_ROM(0x8086, 0x1099, "e1000-0x1099", "e1000-0x1099"),
1089
+	PCI_ROM(0x8086, 0x109a, "e1000-0x109a", "e1000-0x109a"),
1090
+	PCI_ROM(0x8086, 0x10a4, "e1000-0x10a4", "e1000-0x10a4"),
1091
+	PCI_ROM(0x8086, 0x10a5, "e1000-0x10a5", "e1000-0x10a5"),
1092
+	PCI_ROM(0x8086, 0x10b5, "e1000-0x10b5", "e1000-0x10b5"),
1093
+	PCI_ROM(0x8086, 0x10b9, "e1000-0x10b9", "e1000-0x10b9"),
1094
+	PCI_ROM(0x8086, 0x10ba, "e1000-0x10ba", "e1000-0x10ba"),
1095
+	PCI_ROM(0x8086, 0x10bb, "e1000-0x10bb", "e1000-0x10bb"),
1096
+	PCI_ROM(0x8086, 0x10bc, "e1000-0x10bc", "e1000-0x10bc"),
1097
+	PCI_ROM(0x8086, 0x10c4, "e1000-0x10c4", "e1000-0x10c4"),
1098
+	PCI_ROM(0x8086, 0x10c5, "e1000-0x10c5", "e1000-0x10c5"),
1099
+	PCI_ROM(0x8086, 0x10d9, "e1000-0x10d9", "e1000-0x10d9"),
1100
+	PCI_ROM(0x8086, 0x10da, "e1000-0x10da", "e1000-0x10da"),
1177 1101
 };
1178 1102
 
1179 1103
 struct pci_driver e1000_driver __pci_driver = {

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