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This version now transmits and receives.

There may still be an issue with memory handling, since it seems to
die ungracefully when ARP packets come in after loading a kernel.
Something to debug.
tags/v0.9.3
Marty Connor 17 years ago
parent
commit
645a752bc2
2 changed files with 138 additions and 220 deletions
  1. 135
    220
      src/drivers/net/e1000/e1000.c
  2. 3
    0
      src/drivers/net/e1000/e1000.h

+ 135
- 220
src/drivers/net/e1000/e1000.c View File

@@ -28,71 +28,6 @@
28 28
 
29 29
 #include "e1000.h"
30 30
 
31
-static struct pci_device_id e1000_nics[] = {
32
-	PCI_ROM(0x8086, 0x1000, "e1000-0x1000", "E1000-0x1000"),
33
-	PCI_ROM(0x8086, 0x1001, "e1000-0x1001", "E1000-0x1001"),
34
-	PCI_ROM(0x8086, 0x1004, "e1000-0x1004", "E1000-0x1004"),
35
-	PCI_ROM(0x8086, 0x1008, "e1000-0x1008", "E1000-0x1008"),
36
-	PCI_ROM(0x8086, 0x1009, "e1000-0x1009", "E1000-0x1009"),
37
-	PCI_ROM(0x8086, 0x100C, "e1000-0x100C", "E1000-0x100C"),
38
-	PCI_ROM(0x8086, 0x100D, "e1000-0x100D", "E1000-0x100D"),
39
-	PCI_ROM(0x8086, 0x100E, "e1000-0x100E", "E1000-0x100E"),
40
-	PCI_ROM(0x8086, 0x100F, "e1000-0x100F", "E1000-0x100F"),
41
-	PCI_ROM(0x8086, 0x1010, "e1000-0x1010", "E1000-0x1010"),
42
-	PCI_ROM(0x8086, 0x1011, "e1000-0x1011", "E1000-0x1011"),
43
-	PCI_ROM(0x8086, 0x1012, "e1000-0x1012", "E1000-0x1012"),
44
-	PCI_ROM(0x8086, 0x1013, "e1000-0x1013", "E1000-0x1013"),
45
-	PCI_ROM(0x8086, 0x1014, "e1000-0x1014", "E1000-0x1014"),
46
-	PCI_ROM(0x8086, 0x1015, "e1000-0x1015", "E1000-0x1015"),
47
-	PCI_ROM(0x8086, 0x1016, "e1000-0x1016", "E1000-0x1016"),
48
-	PCI_ROM(0x8086, 0x1017, "e1000-0x1017", "E1000-0x1017"),
49
-	PCI_ROM(0x8086, 0x1018, "e1000-0x1018", "E1000-0x1018"),
50
-	PCI_ROM(0x8086, 0x1019, "e1000-0x1019", "E1000-0x1019"),
51
-	PCI_ROM(0x8086, 0x101A, "e1000-0x101A", "E1000-0x101A"),
52
-	PCI_ROM(0x8086, 0x101D, "e1000-0x101D", "E1000-0x101D"),
53
-	PCI_ROM(0x8086, 0x101E, "e1000-0x101E", "E1000-0x101E"),
54
-	PCI_ROM(0x8086, 0x1026, "e1000-0x1026", "E1000-0x1026"),
55
-	PCI_ROM(0x8086, 0x1027, "e1000-0x1027", "E1000-0x1027"),
56
-	PCI_ROM(0x8086, 0x1028, "e1000-0x1028", "E1000-0x1028"),
57
-	PCI_ROM(0x8086, 0x1049, "e1000-0x1049", "E1000-0x1049"),
58
-	PCI_ROM(0x8086, 0x104A, "e1000-0x104A", "E1000-0x104A"),
59
-	PCI_ROM(0x8086, 0x104B, "e1000-0x104B", "E1000-0x104B"),
60
-	PCI_ROM(0x8086, 0x104C, "e1000-0x104C", "E1000-0x104C"),
61
-	PCI_ROM(0x8086, 0x104D, "e1000-0x104D", "E1000-0x104D"),
62
-	PCI_ROM(0x8086, 0x105E, "e1000-0x105E", "E1000-0x105E"),
63
-	PCI_ROM(0x8086, 0x105F, "e1000-0x105F", "E1000-0x105F"),
64
-	PCI_ROM(0x8086, 0x1060, "e1000-0x1060", "E1000-0x1060"),
65
-	PCI_ROM(0x8086, 0x1075, "e1000-0x1075", "E1000-0x1075"),
66
-	PCI_ROM(0x8086, 0x1076, "e1000-0x1076", "E1000-0x1076"),
67
-	PCI_ROM(0x8086, 0x1077, "e1000-0x1077", "E1000-0x1077"),
68
-	PCI_ROM(0x8086, 0x1078, "e1000-0x1078", "E1000-0x1078"),
69
-	PCI_ROM(0x8086, 0x1079, "e1000-0x1079", "E1000-0x1079"),
70
-	PCI_ROM(0x8086, 0x107A, "e1000-0x107A", "E1000-0x107A"),
71
-	PCI_ROM(0x8086, 0x107B, "e1000-0x107B", "E1000-0x107B"),
72
-	PCI_ROM(0x8086, 0x107C, "e1000-0x107C", "E1000-0x107C"),
73
-	PCI_ROM(0x8086, 0x107D, "e1000-0x107D", "E1000-0x107D"),
74
-	PCI_ROM(0x8086, 0x107E, "e1000-0x107E", "E1000-0x107E"),
75
-	PCI_ROM(0x8086, 0x107F, "e1000-0x107F", "E1000-0x107F"),
76
-	PCI_ROM(0x8086, 0x108A, "e1000-0x108A", "E1000-0x108A"),
77
-	PCI_ROM(0x8086, 0x108B, "e1000-0x108B", "E1000-0x108B"),
78
-	PCI_ROM(0x8086, 0x108C, "e1000-0x108C", "E1000-0x108C"),
79
-	PCI_ROM(0x8086, 0x1096, "e1000-0x1096", "E1000-0x1096"),
80
-	PCI_ROM(0x8086, 0x1098, "e1000-0x1098", "E1000-0x1098"),
81
-	PCI_ROM(0x8086, 0x1099, "e1000-0x1099", "E1000-0x1099"),
82
-	PCI_ROM(0x8086, 0x109A, "e1000-0x109A", "E1000-0x109A"),
83
-	PCI_ROM(0x8086, 0x10A4, "e1000-0x10A4", "E1000-0x10A4"),
84
-	PCI_ROM(0x8086, 0x10A5, "e1000-0x10A5", "E1000-0x10A5"),
85
-	PCI_ROM(0x8086, 0x10B5, "e1000-0x10B5", "E1000-0x10B5"),
86
-	PCI_ROM(0x8086, 0x10B9, "e1000-0x10B9", "E1000-0x10B9"),
87
-	PCI_ROM(0x8086, 0x10BA, "e1000-0x10BA", "E1000-0x10BA"),
88
-	PCI_ROM(0x8086, 0x10BB, "e1000-0x10BB", "E1000-0x10BB"),
89
-	PCI_ROM(0x8086, 0x10BC, "e1000-0x10BC", "E1000-0x10BC"),
90
-	PCI_ROM(0x8086, 0x10C4, "e1000-0x10C4", "E1000-0x10C4"),
91
-	PCI_ROM(0x8086, 0x10C5, "e1000-0x10C5", "E1000-0x10C5"),
92
-	PCI_ROM(0x8086, 0x10D9, "e1000-0x10D9", "E1000-0x10D9"),
93
-	PCI_ROM(0x8086, 0x10DA, "e1000-0x10DA", "E1000-0x10DA"),
94
-};
95
-
96 31
 /**
97 32
  * e1000_get_hw_control - get control of the h/w from f/w
98 33
  * @adapter: address of board private structure
@@ -131,84 +66,6 @@ e1000_get_hw_control(struct e1000_adapter *adapter)
131 66
 	}
132 67
 }
133 68
 
134
-#if 0
135
-/**
136
- * e1000_power_up_phy - restore link in case the phy was powered down
137
- * @adapter: address of board private structure
138
- *
139
- * The phy may be powered down to save power and turn off link when the
140
- * driver is unloaded and wake on lan is not enabled (among others)
141
- * *** this routine MUST be followed by a call to e1000_reset ***
142
- *
143
- **/
144
-static void
145
-e1000_power_up_phy ( struct e1000_adapter *adapter )
146
-{
147
-	DBG ( "e1000_power_up_phy\n" );
148
-
149
-	uint16_t mii_reg = 0;
150
-
151
-	/* Just clear the power down bit to wake the phy back up */
152
-	if (adapter->hw.media_type == e1000_media_type_copper) {
153
-		/* according to the manual, the phy will retain its
154
-		 * settings across a power-down/up cycle */
155
-		e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
156
-		mii_reg &= ~MII_CR_POWER_DOWN;
157
-		e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
158
-	}
159
-}
160
-
161
-static void
162
-e1000_power_down_phy ( struct e1000_adapter *adapter )
163
-{
164
-	DBG ( "e1000_power_down_phy\n" );
165
-	
166
-	/* Power down the PHY so no link is implied when interface is down *
167
-	 * The PHY cannot be powered down if any of the following is TRUE *
168
-	 * (a) WoL is enabled
169
-	 * (b) AMT is active
170
-	 * (c) SoL/IDER session is active */
171
-	if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
172
-	   adapter->hw.media_type == e1000_media_type_copper) {
173
-		uint16_t mii_reg = 0;
174
-
175
-		switch (adapter->hw.mac_type) {
176
-		case e1000_82540:
177
-		case e1000_82545:
178
-		case e1000_82545_rev_3:
179
-		case e1000_82546:
180
-		case e1000_82546_rev_3:
181
-		case e1000_82541:
182
-		case e1000_82541_rev_2:
183
-		case e1000_82547:
184
-		case e1000_82547_rev_2:
185
-			if (E1000_READ_REG(&adapter->hw, MANC) &
186
-			    E1000_MANC_SMBUS_EN)
187
-				goto out;
188
-			break;
189
-		case e1000_82571:
190
-		case e1000_82572:
191
-		case e1000_82573:
192
-		case e1000_80003es2lan:
193
-		case e1000_ich8lan:
194
-			if (e1000_check_mng_mode(&adapter->hw) ||
195
-			    e1000_check_phy_reset_block(&adapter->hw))
196
-				goto out;
197
-			break;
198
-		default:
199
-			goto out;
200
-		}
201
-		e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
202
-		mii_reg |= MII_CR_POWER_DOWN;
203
-		e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
204
-		mdelay(1);
205
-	}
206
-out:
207
-	return;
208
-}
209
-
210
-#endif
211
-
212 69
 /**
213 70
  * e1000_irq_enable - Enable default interrupt generation settings
214 71
  * @adapter: board private structure
@@ -216,8 +73,8 @@ out:
216 73
 static void
217 74
 e1000_irq_enable ( struct e1000_adapter *adapter )
218 75
 {
219
-	E1000_WRITE_REG ( &adapter->hw, IMS, E1000_IMS_RXT0 |
220
-			  E1000_IMS_RXSEQ );
76
+	E1000_WRITE_REG ( &adapter->hw, IMS, E1000_IMS_RXDMT0 |
77
+			                     E1000_IMS_RXSEQ );
221 78
 	E1000_WRITE_FLUSH ( &adapter->hw );
222 79
 }
223 80
 
@@ -239,7 +96,7 @@ e1000_irq_disable ( struct e1000_adapter *adapter )
239 96
 static void
240 97
 e1000_irq_force ( struct e1000_adapter *adapter )
241 98
 {
242
-	E1000_WRITE_REG ( &adapter->hw, ICS, E1000_ICS_RXT0 );
99
+	E1000_WRITE_REG ( &adapter->hw, ICS, E1000_ICS_RXDMT0 );
243 100
 	E1000_WRITE_FLUSH ( &adapter->hw );
244 101
 }
245 102
 
@@ -292,9 +149,7 @@ e1000_sw_init ( struct e1000_adapter *adapter )
292 149
 	case e1000_82547:
293 150
 	case e1000_82541_rev_2:
294 151
 	case e1000_82547_rev_2:
295
-#if 0
296 152
 		hw->phy_init_script = 1;
297
-#endif
298 153
 		break;
299 154
 	}
300 155
 
@@ -344,20 +199,16 @@ e1000_setup_tx_resources ( struct e1000_adapter *adapter )
344 199
 	 */
345 200
 
346 201
         adapter->tx_base = 
347
-        	malloc_dma ( sizeof ( *adapter->tx_base ) * NUM_TX_DESC,
348
-        		     sizeof ( *adapter->tx_base ) * NUM_TX_DESC );
202
+        	malloc_dma ( adapter->tx_ring_size, adapter->tx_ring_size );
349 203
         		             		     
350 204
        	if ( ! adapter->tx_base ) {
351 205
        		return -ENOMEM;
352 206
 	}
353 207
 	
354
-	memset ( adapter->tx_base, 0, sizeof ( *adapter->tx_base ) * NUM_TX_DESC );
208
+	memset ( adapter->tx_base, 0, adapter->tx_ring_size );
355 209
 	
356 210
 	DBG ( "adapter->tx_base = %#08lx\n", virt_to_bus ( adapter->tx_base ) );
357 211
 
358
-  	DBG ( "sizeof ( *adapter->tx_base ) == %d bytes\n", 
359
-  	       sizeof ( *adapter->tx_base ) );
360
-
361 212
 	return 0;
362 213
 }
363 214
 
@@ -366,8 +217,7 @@ e1000_free_tx_resources ( struct e1000_adapter *adapter )
366 217
 {
367 218
 	DBG ( "e1000_free_tx_resources\n" );
368 219
 
369
-        free_dma ( adapter->tx_base, 
370
-                   sizeof ( *adapter->tx_base ) * NUM_TX_DESC );
220
+        free_dma ( adapter->tx_base, adapter->tx_ring_size );
371 221
 }
372 222
 
373 223
 /**
@@ -391,10 +241,10 @@ e1000_configure_tx ( struct e1000_adapter *adapter )
391 241
 
392 242
 	E1000_WRITE_REG ( hw, TDBAH, 0 );
393 243
 	E1000_WRITE_REG ( hw, TDBAL, virt_to_bus ( adapter->tx_base ) );
394
-	E1000_WRITE_REG ( hw, TDLEN, sizeof ( *adapter->tx_base ) * NUM_TX_DESC );
244
+	E1000_WRITE_REG ( hw, TDLEN, adapter->tx_ring_size );
395 245
 			  
396
-        DBG ( "TDBAL: %#08lx\n", virt_to_bus ( adapter->tx_base ) );
397
-        DBG ( "TDLEN: %d\n", sizeof ( *adapter->tx_base ) * NUM_TX_DESC );
246
+        DBG ( "TDBAL: %#08lx\n",  E1000_READ_REG ( hw, TDBAL ) );
247
+        DBG ( "TDLEN: %ld\n",     E1000_READ_REG ( hw, TDLEN ) );
398 248
 
399 249
 	/* Setup the HW Tx Head and Tail descriptor pointers */
400 250
 	E1000_WRITE_REG ( hw, TDH, 0 );
@@ -441,7 +291,7 @@ e1000_configure_tx ( struct e1000_adapter *adapter )
441 291
 
442 292
 	/* Program the Transmit Control Register */
443 293
 
444
-	tctl = E1000_READ_REG(hw, TCTL);
294
+	tctl = E1000_READ_REG ( hw, TCTL );
445 295
 	tctl &= ~E1000_TCTL_CT;
446 296
 	tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
447 297
 		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
@@ -511,13 +361,12 @@ e1000_setup_rx_resources ( struct e1000_adapter *adapter )
511 361
 	 */
512 362
 
513 363
         adapter->rx_base = 
514
-        	malloc_dma ( sizeof ( *adapter->rx_base ) * NUM_RX_DESC,
515
-        		     sizeof ( *adapter->rx_base ) * NUM_RX_DESC );
364
+        	malloc_dma ( adapter->rx_ring_size, adapter->rx_ring_size );
516 365
         		     
517 366
        	if ( ! adapter->rx_base ) {
518 367
        		return -ENOMEM;
519 368
 	}
520
-	memset ( adapter->rx_base, 0, sizeof ( *adapter->rx_base ) * NUM_RX_DESC );
369
+	memset ( adapter->rx_base, 0, adapter->rx_ring_size );
521 370
 
522 371
 	for ( i = 0; i < NUM_RX_DESC; i++ ) {
523 372
 	
@@ -551,8 +400,7 @@ e1000_free_rx_resources ( struct e1000_adapter *adapter )
551 400
 	
552 401
 	DBG ( "e1000_free_rx_resources\n" );
553 402
 
554
-        free_dma ( adapter->rx_base, 
555
-                   sizeof ( *adapter->rx_base ) * NUM_RX_DESC );
403
+        free_dma ( adapter->rx_base, adapter->rx_ring_size );
556 404
 
557 405
 	for ( i = 0; i < NUM_RX_DESC; i++ ) {
558 406
 		free_iob ( adapter->rx_iobuf[i] );
@@ -571,56 +419,35 @@ e1000_configure_rx ( struct e1000_adapter *adapter )
571 419
 	struct e1000_hw *hw = &adapter->hw;
572 420
 	uint32_t rctl;
573 421
 
574
-#if 0
575
-	uint32_t ctrl_ext;
576
-#endif
577
-
578 422
 	DBG ( "e1000_configure_rx\n" );
579 423
 
580 424
 	/* disable receives while setting up the descriptors */
581 425
 	rctl = E1000_READ_REG ( hw, RCTL );
582 426
 	E1000_WRITE_REG ( hw, RCTL, rctl & ~E1000_RCTL_EN );
583 427
 
584
-	/* set the Receive Delay Timer Register */
585
-	E1000_WRITE_REG ( hw, RDTR, adapter->rx_int_delay );
586
-	E1000_WRITE_REG ( hw, RADV, adapter->rx_abs_int_delay );
587
-
588
-#if 0
589
-	if (hw->mac_type >= e1000_82540) {
590
-		E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
591
-		if (adapter->itr_setting != 0)
592
-			E1000_WRITE_REG(hw, ITR,
593
-				1000000000 / (adapter->itr * 256));
594
-	}
595
-
596
-	if (hw->mac_type >= e1000_82571) {
597
-		ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
598
-		/* Reset delay timers after every interrupt */
599
-		ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
600
-		E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
601
-		E1000_WRITE_FLUSH(hw);
602
-	}
603
-#endif
428
+	adapter->rx_tail = 0;
604 429
 
605 430
 	/* Setup the HW Rx Head and Tail Descriptor Pointers and
606 431
 	 * the Base and Length of the Rx Descriptor Ring */	 
607 432
 
608
-	adapter->rx_tail = 0;
609
-
610
-	E1000_WRITE_REG ( hw, RDBAH, 0 );
611 433
 	E1000_WRITE_REG ( hw, RDBAL, virt_to_bus ( adapter->rx_base ) );
612
-	E1000_WRITE_REG ( hw, RDLEN, sizeof ( *adapter->rx_base ) *
613
-			  NUM_RX_DESC );
434
+	E1000_WRITE_REG ( hw, RDBAH, 0 );
435
+	E1000_WRITE_REG ( hw, RDLEN, adapter->rx_ring_size );
614 436
 
615
-	E1000_WRITE_REG ( hw, RDH, 0);
616
-	E1000_WRITE_REG ( hw, RDT, 0);
437
+	E1000_WRITE_REG ( hw, RDH, 0 );
438
+	E1000_WRITE_REG ( hw, RDT, NUM_TX_DESC );
617 439
 	
618
-	E1000_WRITE_REG ( hw, RCTL,  E1000_RCTL_EN | E1000_RCTL_BAM | 
619
-		  	  E1000_RCTL_SZ_2048 | E1000_RCTL_MPE);
620
-	E1000_WRITE_FLUSH ( hw );
621
-
622 440
 	/* Enable Receives */
441
+	rctl = ( E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
442
+		 E1000_RCTL_MPE 
443
+		);
444
+
623 445
 	E1000_WRITE_REG ( hw, RCTL, rctl );
446
+	E1000_WRITE_FLUSH ( hw );
447
+
448
+        DBG ( "RDBAL: %#08lx\n",  E1000_READ_REG ( hw, RDBAL ) );
449
+        DBG ( "RDLEN: %ld\n",     E1000_READ_REG ( hw, RDLEN ) );
450
+        DBG ( "RCTL:  %#08lx\n",  E1000_READ_REG ( hw, RCTL ) );
624 451
 }
625 452
 
626 453
 /**
@@ -744,9 +571,19 @@ static void
744 571
 e1000_close ( struct net_device *netdev )
745 572
 {
746 573
 	struct e1000_adapter *adapter = netdev_priv ( netdev );
574
+	uint32_t rctl;
575
+	uint32_t icr;
747 576
 
748 577
 	DBG ( "e1000_close\n" );
749 578
 	
579
+	/* disable receives */
580
+	rctl = E1000_READ_REG ( &adapter->hw, RCTL );
581
+	E1000_WRITE_REG ( &adapter->hw, RCTL, rctl & ~E1000_RCTL_EN );
582
+	E1000_WRITE_FLUSH ( &adapter->hw );
583
+
584
+	/* Acknowledge interrupts */
585
+	icr = E1000_READ_REG ( &adapter->hw, ICR );
586
+
750 587
 	e1000_irq_disable ( adapter );
751 588
 
752 589
 	e1000_reset_hw ( &adapter->hw );
@@ -846,7 +683,7 @@ e1000_poll ( struct net_device *netdev )
846 683
 	DBG ( "e1000_poll\n" );
847 684
 #endif
848 685
 
849
-	/* Acknowledge interrupt. */
686
+	/* Acknowledge interrupts */
850 687
 	icr = E1000_READ_REG ( hw, ICR );
851 688
 	if ( ! icr )
852 689
 		return;
@@ -867,7 +704,7 @@ e1000_poll ( struct net_device *netdev )
867 704
 		      virt_to_bus ( tx_curr_desc ), tx_status );
868 705
 #endif
869 706
 
870
-		/* if the packet at tx_head is not owned by hardware */
707
+		/* if the packet at tx_head is not owned by hardware it is for us */
871 708
 		if ( ! ( tx_status & E1000_TXD_STAT_DD ) )
872 709
 			break;
873 710
 		
@@ -895,9 +732,9 @@ e1000_poll ( struct net_device *netdev )
895 732
 	
896 733
 	/* Process received packets 
897 734
 	 */
898
-	while ( TRUE ) {
735
+	while ( 1 ) {
899 736
 	
900
-		i = adapter->rx_tail;
737
+		i = adapter->rx_tail;;
901 738
 		
902 739
 		rx_curr_desc = ( void * )  ( adapter->rx_base ) + 
903 740
 			          ( i * sizeof ( *adapter->rx_base ) ); 
@@ -943,9 +780,9 @@ e1000_poll ( struct net_device *netdev )
943 780
 
944 781
 		rx_curr_desc->buffer_addr = virt_to_bus ( adapter->rx_iobuf[adapter->rx_tail]->data );
945 782
 
946
-		adapter->rx_tail = ( adapter->rx_tail + 1 ) % NUM_RX_DESC;
947
-
948 783
 		E1000_WRITE_REG ( hw, RDT, adapter->rx_tail );
784
+
785
+		adapter->rx_tail = ( adapter->rx_tail + 1 ) % NUM_RX_DESC;
949 786
 	}
950 787
 }				
951 788
 
@@ -1024,6 +861,9 @@ e1000_probe ( struct pci_device *pdev,
1024 861
 	adapter->pdev       = pdev;
1025 862
 	adapter->hw.back    = adapter;
1026 863
 
864
+	adapter->tx_ring_size = sizeof ( *adapter->tx_base ) * NUM_TX_DESC;
865
+	adapter->rx_ring_size = sizeof ( *adapter->rx_base ) * NUM_RX_DESC;
866
+
1027 867
 	mmio_start = pci_bar_start ( pdev, PCI_BASE_ADDRESS_0 );
1028 868
 	mmio_len   = pci_bar_size  ( pdev, PCI_BASE_ADDRESS_0 );
1029 869
 
@@ -1149,8 +989,9 @@ e1000_remove ( struct pci_device *pdev )
1149 989
 	
1150 990
 	DBG ( "e1000_remove\n" );
1151 991
 
1152
-	e1000_reset_hw ( &adapter->hw );
1153 992
 	unregister_netdev ( netdev );
993
+	e1000_reset_hw ( &adapter->hw );
994
+	netdev_nullify ( netdev );
1154 995
 	netdev_put ( netdev );
1155 996
 }
1156 997
 
@@ -1187,6 +1028,8 @@ e1000_open ( struct net_device *netdev )
1187 1028
 
1188 1029
 	e1000_configure_rx ( adapter );
1189 1030
 	
1031
+        DBG ( "RXDCTL: %#08lx\n",  E1000_READ_REG ( &adapter->hw, RXDCTL ) );
1032
+
1190 1033
 	e1000_irq_enable ( adapter );
1191 1034
 
1192 1035
 	return 0;
@@ -1199,13 +1042,6 @@ err_setup_tx:
1199 1042
 	return err;
1200 1043
 }
1201 1044
 
1202
-struct pci_driver e1000_driver __pci_driver = {
1203
-	.ids = e1000_nics,
1204
-	.id_count = (sizeof (e1000_nics) / sizeof (e1000_nics[0])),
1205
-	.probe = e1000_probe,
1206
-	.remove = e1000_remove,
1207
-};
1208
-
1209 1045
 /** e1000 net device operations */
1210 1046
 static struct net_device_operations e1000_operations = {
1211 1047
         .open           = e1000_open,
@@ -1232,29 +1068,36 @@ e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
1232 1068
 }
1233 1069
 
1234 1070
 void
1235
-e1000_pci_clear_mwi ( struct e1000_hw *hw __unused )
1071
+e1000_pci_clear_mwi ( struct e1000_hw *hw )
1236 1072
 {
1073
+	struct e1000_adapter *adapter = hw->back;
1074
+
1075
+	pci_write_config_word ( adapter->pdev, PCI_COMMAND,
1076
+			        hw->pci_cmd_word & ~PCI_COMMAND_INVALIDATE );
1237 1077
 }
1238 1078
 
1239 1079
 void
1240
-e1000_pci_set_mwi ( struct e1000_hw *hw __unused )
1080
+e1000_pci_set_mwi ( struct e1000_hw *hw )
1241 1081
 {
1082
+	struct e1000_adapter *adapter = hw->back;
1083
+
1084
+	pci_write_config_word ( adapter->pdev, PCI_COMMAND, hw->pci_cmd_word );
1242 1085
 }
1243 1086
 
1244 1087
 void
1245
-e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
1088
+e1000_read_pci_cfg ( struct e1000_hw *hw, uint32_t reg, uint16_t *value )
1246 1089
 {
1247 1090
 	struct e1000_adapter *adapter = hw->back;
1248 1091
 
1249
-	pci_read_config_word(adapter->pdev, reg, value);
1092
+	pci_read_config_word ( adapter->pdev, reg, value );
1250 1093
 }
1251 1094
 
1252 1095
 void
1253
-e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
1096
+e1000_write_pci_cfg ( struct e1000_hw *hw, uint32_t reg, uint16_t *value )
1254 1097
 {
1255 1098
 	struct e1000_adapter *adapter = hw->back;
1256 1099
 
1257
-	pci_write_config_word(adapter->pdev, reg, *value);
1100
+	pci_write_config_word ( adapter->pdev, reg, *value );
1258 1101
 }
1259 1102
 
1260 1103
 void
@@ -1263,6 +1106,78 @@ e1000_io_write ( struct e1000_hw *hw  __unused, unsigned long port, uint32_t val
1263 1106
 	outl ( value, port );
1264 1107
 }
1265 1108
 
1109
+static struct pci_device_id e1000_nics[] = {
1110
+	PCI_ROM(0x8086, 0x1000, "e1000-0x1000", "E1000-0x1000"),
1111
+	PCI_ROM(0x8086, 0x1001, "e1000-0x1001", "E1000-0x1001"),
1112
+	PCI_ROM(0x8086, 0x1004, "e1000-0x1004", "E1000-0x1004"),
1113
+	PCI_ROM(0x8086, 0x1008, "e1000-0x1008", "E1000-0x1008"),
1114
+	PCI_ROM(0x8086, 0x1009, "e1000-0x1009", "E1000-0x1009"),
1115
+	PCI_ROM(0x8086, 0x100C, "e1000-0x100C", "E1000-0x100C"),
1116
+	PCI_ROM(0x8086, 0x100D, "e1000-0x100D", "E1000-0x100D"),
1117
+	PCI_ROM(0x8086, 0x100E, "e1000-0x100E", "E1000-0x100E"),
1118
+	PCI_ROM(0x8086, 0x100F, "e1000-0x100F", "E1000-0x100F"),
1119
+	PCI_ROM(0x8086, 0x1010, "e1000-0x1010", "E1000-0x1010"),
1120
+	PCI_ROM(0x8086, 0x1011, "e1000-0x1011", "E1000-0x1011"),
1121
+	PCI_ROM(0x8086, 0x1012, "e1000-0x1012", "E1000-0x1012"),
1122
+	PCI_ROM(0x8086, 0x1013, "e1000-0x1013", "E1000-0x1013"),
1123
+	PCI_ROM(0x8086, 0x1014, "e1000-0x1014", "E1000-0x1014"),
1124
+	PCI_ROM(0x8086, 0x1015, "e1000-0x1015", "E1000-0x1015"),
1125
+	PCI_ROM(0x8086, 0x1016, "e1000-0x1016", "E1000-0x1016"),
1126
+	PCI_ROM(0x8086, 0x1017, "e1000-0x1017", "E1000-0x1017"),
1127
+	PCI_ROM(0x8086, 0x1018, "e1000-0x1018", "E1000-0x1018"),
1128
+	PCI_ROM(0x8086, 0x1019, "e1000-0x1019", "E1000-0x1019"),
1129
+	PCI_ROM(0x8086, 0x101A, "e1000-0x101A", "E1000-0x101A"),
1130
+	PCI_ROM(0x8086, 0x101D, "e1000-0x101D", "E1000-0x101D"),
1131
+	PCI_ROM(0x8086, 0x101E, "e1000-0x101E", "E1000-0x101E"),
1132
+	PCI_ROM(0x8086, 0x1026, "e1000-0x1026", "E1000-0x1026"),
1133
+	PCI_ROM(0x8086, 0x1027, "e1000-0x1027", "E1000-0x1027"),
1134
+	PCI_ROM(0x8086, 0x1028, "e1000-0x1028", "E1000-0x1028"),
1135
+	PCI_ROM(0x8086, 0x1049, "e1000-0x1049", "E1000-0x1049"),
1136
+	PCI_ROM(0x8086, 0x104A, "e1000-0x104A", "E1000-0x104A"),
1137
+	PCI_ROM(0x8086, 0x104B, "e1000-0x104B", "E1000-0x104B"),
1138
+	PCI_ROM(0x8086, 0x104C, "e1000-0x104C", "E1000-0x104C"),
1139
+	PCI_ROM(0x8086, 0x104D, "e1000-0x104D", "E1000-0x104D"),
1140
+	PCI_ROM(0x8086, 0x105E, "e1000-0x105E", "E1000-0x105E"),
1141
+	PCI_ROM(0x8086, 0x105F, "e1000-0x105F", "E1000-0x105F"),
1142
+	PCI_ROM(0x8086, 0x1060, "e1000-0x1060", "E1000-0x1060"),
1143
+	PCI_ROM(0x8086, 0x1075, "e1000-0x1075", "E1000-0x1075"),
1144
+	PCI_ROM(0x8086, 0x1076, "e1000-0x1076", "E1000-0x1076"),
1145
+	PCI_ROM(0x8086, 0x1077, "e1000-0x1077", "E1000-0x1077"),
1146
+	PCI_ROM(0x8086, 0x1078, "e1000-0x1078", "E1000-0x1078"),
1147
+	PCI_ROM(0x8086, 0x1079, "e1000-0x1079", "E1000-0x1079"),
1148
+	PCI_ROM(0x8086, 0x107A, "e1000-0x107A", "E1000-0x107A"),
1149
+	PCI_ROM(0x8086, 0x107B, "e1000-0x107B", "E1000-0x107B"),
1150
+	PCI_ROM(0x8086, 0x107C, "e1000-0x107C", "E1000-0x107C"),
1151
+	PCI_ROM(0x8086, 0x107D, "e1000-0x107D", "E1000-0x107D"),
1152
+	PCI_ROM(0x8086, 0x107E, "e1000-0x107E", "E1000-0x107E"),
1153
+	PCI_ROM(0x8086, 0x107F, "e1000-0x107F", "E1000-0x107F"),
1154
+	PCI_ROM(0x8086, 0x108A, "e1000-0x108A", "E1000-0x108A"),
1155
+	PCI_ROM(0x8086, 0x108B, "e1000-0x108B", "E1000-0x108B"),
1156
+	PCI_ROM(0x8086, 0x108C, "e1000-0x108C", "E1000-0x108C"),
1157
+	PCI_ROM(0x8086, 0x1096, "e1000-0x1096", "E1000-0x1096"),
1158
+	PCI_ROM(0x8086, 0x1098, "e1000-0x1098", "E1000-0x1098"),
1159
+	PCI_ROM(0x8086, 0x1099, "e1000-0x1099", "E1000-0x1099"),
1160
+	PCI_ROM(0x8086, 0x109A, "e1000-0x109A", "E1000-0x109A"),
1161
+	PCI_ROM(0x8086, 0x10A4, "e1000-0x10A4", "E1000-0x10A4"),
1162
+	PCI_ROM(0x8086, 0x10A5, "e1000-0x10A5", "E1000-0x10A5"),
1163
+	PCI_ROM(0x8086, 0x10B5, "e1000-0x10B5", "E1000-0x10B5"),
1164
+	PCI_ROM(0x8086, 0x10B9, "e1000-0x10B9", "E1000-0x10B9"),
1165
+	PCI_ROM(0x8086, 0x10BA, "e1000-0x10BA", "E1000-0x10BA"),
1166
+	PCI_ROM(0x8086, 0x10BB, "e1000-0x10BB", "E1000-0x10BB"),
1167
+	PCI_ROM(0x8086, 0x10BC, "e1000-0x10BC", "E1000-0x10BC"),
1168
+	PCI_ROM(0x8086, 0x10C4, "e1000-0x10C4", "E1000-0x10C4"),
1169
+	PCI_ROM(0x8086, 0x10C5, "e1000-0x10C5", "E1000-0x10C5"),
1170
+	PCI_ROM(0x8086, 0x10D9, "e1000-0x10D9", "E1000-0x10D9"),
1171
+	PCI_ROM(0x8086, 0x10DA, "e1000-0x10DA", "E1000-0x10DA"),
1172
+};
1173
+
1174
+struct pci_driver e1000_driver __pci_driver = {
1175
+	.ids = e1000_nics,
1176
+	.id_count = (sizeof (e1000_nics) / sizeof (e1000_nics[0])),
1177
+	.probe = e1000_probe,
1178
+	.remove = e1000_remove,
1179
+};
1180
+
1266 1181
 /*
1267 1182
  * Local variables:
1268 1183
  *  c-basic-offset: 8

+ 3
- 0
src/drivers/net/e1000/e1000.h View File

@@ -261,6 +261,9 @@ struct e1000_adapter {
261 261
 	struct e1000_tx_desc *tx_base;
262 262
 	struct e1000_rx_desc *rx_base;
263 263
 	
264
+	uint32_t tx_ring_size;
265
+	uint32_t rx_ring_size;
266
+
264 267
 	uint32_t tx_head;
265 268
 	uint32_t tx_tail;
266 269
 	uint32_t tx_fill_ctr;

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