Browse Source

[intel] Report any unexpected interrupt causes

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 9 years ago
parent
commit
63dcab002e
2 changed files with 10 additions and 0 deletions
  1. 8
    0
      src/drivers/net/intel.c
  2. 2
    0
      src/drivers/net/intel.h

+ 8
- 0
src/drivers/net/intel.c View File

759
 	if ( icr & INTEL_IRQ_LSC )
759
 	if ( icr & INTEL_IRQ_LSC )
760
 		intel_check_link ( netdev );
760
 		intel_check_link ( netdev );
761
 
761
 
762
+	/* Check for unexpected interrupts */
763
+	if ( icr & ~( INTEL_IRQ_TXDW | INTEL_IRQ_TXQE | INTEL_IRQ_LSC |
764
+		      INTEL_IRQ_RXDMT0 | INTEL_IRQ_RXT0 | INTEL_IRQ_RXO ) ) {
765
+		DBGC ( intel, "INTEL %p unexpected ICR %08x\n", intel, icr );
766
+		/* Report as a TX error */
767
+		netdev_tx_err ( netdev, NULL, -ENOTSUP );
768
+	}
769
+
762
 	/* Refill RX ring */
770
 	/* Refill RX ring */
763
 	intel_refill_rx ( intel );
771
 	intel_refill_rx ( intel );
764
 }
772
 }

+ 2
- 0
src/drivers/net/intel.h View File

91
 /** Interrupt Cause Read Register */
91
 /** Interrupt Cause Read Register */
92
 #define INTEL_ICR 0x000c0UL
92
 #define INTEL_ICR 0x000c0UL
93
 #define INTEL_IRQ_TXDW		0x00000001UL	/**< Transmit descriptor done */
93
 #define INTEL_IRQ_TXDW		0x00000001UL	/**< Transmit descriptor done */
94
+#define INTEL_IRQ_TXQE		0x00000002UL	/**< Transmit queue empty */
94
 #define INTEL_IRQ_LSC		0x00000004UL	/**< Link status change */
95
 #define INTEL_IRQ_LSC		0x00000004UL	/**< Link status change */
96
+#define INTEL_IRQ_RXDMT0	0x00000010UL	/**< Receive queue low */
95
 #define INTEL_IRQ_RXT0		0x00000080UL	/**< Receive timer */
97
 #define INTEL_IRQ_RXT0		0x00000080UL	/**< Receive timer */
96
 #define INTEL_IRQ_RXO		0x00000400UL	/**< Receive overrun */
98
 #define INTEL_IRQ_RXO		0x00000400UL	/**< Receive overrun */
97
 
99
 

Loading…
Cancel
Save