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@@ -134,9 +134,15 @@ enum realtek_legacy_status {
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134
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134
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135
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135
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/** Receive (Rx) Configuration Register (dword) */
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136
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136
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#define RTL_RCR 0x44
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137
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+#define RTL_RCR_RXFTH(x) ( (x) << 13 ) /**< Receive FIFO threshold */
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138
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+#define RTL_RCR_RXFTH_MASK RTL_RCR_RXFTH ( 0x7 )
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139
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+#define RTL_RCR_RXFTH_DEFAULT RTL_RCR_RXFTH ( 0x7 /* Whole packet */ )
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137
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140
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#define RTL_RCR_RBLEN(x) ( (x) << 11 ) /**< Receive buffer length */
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138
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141
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#define RTL_RCR_RBLEN_MASK RTL_RCR_RBLEN ( 0x3 )
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139
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142
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#define RTL_RCR_RBLEN_DEFAULT RTL_RCR_RBLEN ( 0 /* 8kB */ )
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143
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+#define RTL_RCR_MXDMA(x) ( (x) << 8 ) /**< Max DMA burst size */
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144
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+#define RTL_RCR_MXDMA_MASK RTL_RCR_MXDMA ( 0x7 )
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145
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+#define RTL_RCR_MXDMA_DEFAULT RTL_RCR_MXDMA ( 0x7 /* Unlimited */ )
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140
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146
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#define RTL_RCR_WRAP 0x00000080UL /**< Overrun receive buffer */
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141
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147
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#define RTL_RCR_9356SEL 0x00000040UL /**< EEPROM is a 93C56 */
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142
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148
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#define RTL_RCR_AB 0x00000008UL /**< Accept broadcast packets */
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