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[smsc95xx] Use common SMSC USB device functionality

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 7 years ago
parent
commit
550e0d8353
2 changed files with 141 additions and 778 deletions
  1. 134
    670
      src/drivers/net/smsc95xx.c
  2. 7
    108
      src/drivers/net/smsc95xx.h

+ 134
- 670
src/drivers/net/smsc95xx.c
File diff suppressed because it is too large
View File


+ 7
- 108
src/drivers/net/smsc95xx.h View File

@@ -9,25 +9,7 @@
9 9
 
10 10
 FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
11 11
 
12
-#include <ipxe/usb.h>
13
-#include <ipxe/usbnet.h>
14
-#include <ipxe/if_ether.h>
15
-#include <ipxe/mii.h>
16
-
17
-/** Register write command */
18
-#define SMSC95XX_REGISTER_WRITE					\
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-	( USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE |	\
20
-	  USB_REQUEST_TYPE ( 0xa0 ) )
21
-
22
-/** Register read command */
23
-#define SMSC95XX_REGISTER_READ					\
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-	( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE |	\
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-	  USB_REQUEST_TYPE ( 0xa1 ) )
26
-
27
-/** Get statistics command */
28
-#define SMSC95XX_GET_STATISTICS					\
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-	( USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE |	\
30
-	  USB_REQUEST_TYPE ( 0xa2 ) )
12
+#include "smscusb.h"
31 13
 
32 14
 /** Interrupt status register */
33 15
 #define SMSC95XX_INT_STS 0x008
@@ -55,19 +37,8 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
55 37
 #define SMSC95XX_LED_GPIO_CFG_GPCTL0_NFDX_LED \
56 38
 	SMSC95XX_LED_GPIO_CFG_GPCTL0 ( 1 )		/**< Full-duplex LED */
57 39
 
58
-/** EEPROM command register */
59
-#define SMSC95XX_E2P_CMD 0x030
60
-#define SMSC95XX_E2P_CMD_EPC_BSY	0x80000000UL	/**< EPC busy */
61
-#define SMSC95XX_E2P_CMD_EPC_CMD_READ	0x00000000UL	/**< READ command */
62
-#define SMSC95XX_E2P_CMD_EPC_ADDR(addr) ( (addr) << 0 )	/**< EPC address */
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-
64
-/** EEPROM data register */
65
-#define SMSC95XX_E2P_DATA 0x034
66
-#define SMSC95XX_E2P_DATA_GET(e2p_data) \
67
-	( ( (e2p_data) >> 0 ) & 0xff )			/**< EEPROM data */
68
-
69
-/** MAC address EEPROM address */
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-#define SMSC95XX_EEPROM_MAC 0x01
40
+/** EEPROM register base */
41
+#define SMSC95XX_E2P_BASE 0x030
71 42
 
72 43
 /** Interrupt endpoint control register */
73 44
 #define SMSC95XX_INT_EP_CTL 0x068
@@ -88,49 +59,11 @@ FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
88 59
 #define SMSC95XX_MAC_CR_TXEN		0x00000008UL	/**< TX enabled */
89 60
 #define SMSC95XX_MAC_CR_RXEN		0x00000004UL	/**< RX enabled */
90 61
 
91
-/** MAC address high register */
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-#define SMSC95XX_ADDRH 0x104
93
-
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-/** MAC address low register */
95
-#define SMSC95XX_ADDRL 0x108
96
-
97
-/** MII access register */
98
-#define SMSC95XX_MII_ACCESS 0x114
99
-#define SMSC95XX_MII_ACCESS_PHY_ADDRESS	0x00000800UL	/**< PHY address */
100
-#define SMSC95XX_MII_ACCESS_MIIRINDA(addr) ( (addr) << 6 ) /**< MII register */
101
-#define SMSC95XX_MII_ACCESS_MIIWNR	0x00000002UL	/**< MII write */
102
-#define SMSC95XX_MII_ACCESS_MIIBZY	0x00000001UL	/**< MII busy */
103
-
104
-/** MII data register */
105
-#define SMSC95XX_MII_DATA 0x118
106
-#define SMSC95XX_MII_DATA_SET(data)	( (data) << 0 )	/**< Set data */
107
-#define SMSC95XX_MII_DATA_GET(mii_data) \
108
-	( ( (mii_data) >> 0 ) & 0xffff )		/**< Get data */
109
-
110
-/** PHY interrupt source MII register */
111
-#define SMSC95XX_MII_PHY_INTR_SOURCE 29
112
-
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-/** PHY interrupt mask MII register */
114
-#define SMSC95XX_MII_PHY_INTR_MASK 30
115
-
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-/** PHY interrupt: auto-negotiation complete */
117
-#define SMSC95XX_PHY_INTR_ANEG_DONE	0x0040
62
+/** MAC address register base */
63
+#define SMSC95XX_ADDR_BASE 0x104
118 64
 
119
-/** PHY interrupt: link down */
120
-#define SMSC95XX_PHY_INTR_LINK_DOWN	0x0010
121
-
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-/** MAC address */
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-union smsc95xx_mac {
124
-	/** MAC receive address registers */
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-	struct {
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-		/** MAC receive address low register */
127
-		uint32_t l;
128
-		/** MAC receive address high register */
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-		uint32_t h;
130
-	} __attribute__ (( packed )) addr;
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-	/** Raw MAC address */
132
-	uint8_t raw[ETH_ALEN];
133
-};
65
+/** MII register base */
66
+#define SMSC95XX_MII_BASE 0x0114
134 67
 
135 68
 /** Receive packet header */
136 69
 struct smsc95xx_rx_header {
@@ -164,12 +97,6 @@ struct smsc95xx_tx_header {
164 97
 /** Buffer size */
165 98
 #define SMSC95XX_TX_LEN(len) ( (len) << 0 )
166 99
 
167
-/** Interrupt packet format */
168
-struct smsc95xx_interrupt {
169
-	/** Current value of INT_STS register */
170
-	uint32_t int_sts;
171
-} __attribute__ (( packed ));
172
-
173 100
 /** Receive statistics */
174 101
 struct smsc95xx_rx_statistics {
175 102
 	/** Good frames */
@@ -220,37 +147,9 @@ struct smsc95xx_tx_statistics {
220 147
 /** Transmit statistics */
221 148
 #define SMSC95XX_TX_STATISTICS 1
222 149
 
223
-/** A SMSC95xx network device */
224
-struct smsc95xx_device {
225
-	/** USB device */
226
-	struct usb_device *usb;
227
-	/** USB bus */
228
-	struct usb_bus *bus;
229
-	/** Network device */
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-	struct net_device *netdev;
231
-	/** USB network device */
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-	struct usbnet_device usbnet;
233
-	/** MII interface */
234
-	struct mii_interface mii;
235
-	/** Interrupt status */
236
-	uint32_t int_sts;
237
-};
238
-
239 150
 /** Reset delay (in microseconds) */
240 151
 #define SMSC95XX_RESET_DELAY_US 2
241 152
 
242
-/** Maximum time to wait for EEPROM (in milliseconds) */
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-#define SMSC95XX_EEPROM_MAX_WAIT_MS 100
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-
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-/** Maximum time to wait for MII (in milliseconds) */
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-#define SMSC95XX_MII_MAX_WAIT_MS 100
247
-
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-/** Interrupt maximum fill level
249
- *
250
- * This is a policy decision.
251
- */
252
-#define SMSC95XX_INTR_MAX_FILL 2
253
-
254 153
 /** Bulk IN maximum fill level
255 154
  *
256 155
  * This is a policy decision.

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