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@@ -33,7 +33,6 @@ FILE_LICENCE(GPL2_ONLY);
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enum vxge_hw_status
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vxge_hw_vpath_intr_enable(struct __vxge_hw_virtualpath *vpath)
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{
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- u64 val64;
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struct vxge_hw_vpath_reg *vp_reg;
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enum vxge_hw_status status = VXGE_HW_OK;
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@@ -79,7 +78,7 @@ vxge_hw_vpath_intr_enable(struct __vxge_hw_virtualpath *vpath)
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__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,
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&vp_reg->xgmac_vp_int_status);
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- val64 = readq(&vp_reg->vpath_general_int_status);
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+ readq(&vp_reg->vpath_general_int_status);
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/* Mask unwanted interrupts */
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__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,
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@@ -149,7 +148,6 @@ exit:
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enum vxge_hw_status
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vxge_hw_vpath_intr_disable(struct __vxge_hw_virtualpath *vpath)
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{
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- u64 val64;
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enum vxge_hw_status status = VXGE_HW_OK;
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struct vxge_hw_vpath_reg __iomem *vp_reg;
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@@ -162,8 +160,6 @@ vxge_hw_vpath_intr_disable(struct __vxge_hw_virtualpath *vpath)
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__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,
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&vp_reg->vpath_general_int_mask);
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- val64 = VXGE_HW_TIM_CLR_INT_EN_VP(1 << (16 - vpath->vp_id));
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-
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writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask);
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__vxge_hw_pio_mem_write32_upper((u32)VXGE_HW_INTR_MASK_ALL,
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