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[ath5k] Update for changes in kernel 2.6.31

This adds basic rfkill support for enabling the wireless card on certain
laptops, and changes miscellaneous other details that may help in obscure
cases.

Also change the error handling to not report CRC errors, which due to the
basic facts of wireless may happen even more frequently than valid packets.

Signed-off-by: Marty Connor <mdc@etherboot.org>
tags/v0.9.9
Joshua Oreman 15 years ago
parent
commit
489bd2f396

+ 7
- 2
src/drivers/net/ath5k/ath5k.c View File

1195
 
1195
 
1196
 		if (rs.rs_status) {
1196
 		if (rs.rs_status) {
1197
 			if (rs.rs_status & AR5K_RXERR_PHY) {
1197
 			if (rs.rs_status & AR5K_RXERR_PHY) {
1198
-				DBG("ath5k: rx PHY error\n");
1198
+				/* These are uncommon, and may indicate a real problem. */
1199
+				net80211_rx_err(sc->dev, NULL, EIO);
1199
 				goto next;
1200
 				goto next;
1200
 			}
1201
 			}
1201
 			if (rs.rs_status & AR5K_RXERR_CRC) {
1202
 			if (rs.rs_status & AR5K_RXERR_CRC) {
1202
-				net80211_rx_err(sc->dev, NULL, EIO);
1203
+				/* These occur *all the time*. */
1203
 				goto next;
1204
 				goto next;
1204
 			}
1205
 			}
1205
 			if (rs.rs_status & AR5K_RXERR_DECRYPT) {
1206
 			if (rs.rs_status & AR5K_RXERR_DECRYPT) {
1358
 	if (ret)
1359
 	if (ret)
1359
 		goto done;
1360
 		goto done;
1360
 
1361
 
1362
+	ath5k_rfkill_hw_start(ah);
1363
+
1361
 	/*
1364
 	/*
1362
 	 * Reset the key cache since some parts do not reset the
1365
 	 * Reset the key cache since some parts do not reset the
1363
 	 * contents on initial power up or resume from suspend.
1366
 	 * contents on initial power up or resume from suspend.
1405
 	} else
1408
 	} else
1406
 		sc->rxlink = NULL;
1409
 		sc->rxlink = NULL;
1407
 
1410
 
1411
+	ath5k_rfkill_hw_stop(sc->ah);
1412
+
1408
 	return 0;
1413
 	return 0;
1409
 }
1414
 }
1410
 
1415
 

+ 4
- 0
src/drivers/net/ath5k/ath5k.h View File

1153
 extern int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val);
1153
 extern int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val);
1154
 extern void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, u32 interrupt_level);
1154
 extern void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, u32 interrupt_level);
1155
 
1155
 
1156
+/* rfkill Functions */
1157
+extern void ath5k_rfkill_hw_start(struct ath5k_hw *ah);
1158
+extern void ath5k_rfkill_hw_stop(struct ath5k_hw *ah);
1159
+
1156
 /* Misc functions */
1160
 /* Misc functions */
1157
 int ath5k_hw_set_capabilities(struct ath5k_hw *ah);
1161
 int ath5k_hw_set_capabilities(struct ath5k_hw *ah);
1158
 extern int ath5k_hw_get_capability(struct ath5k_hw *ah, enum ath5k_capability_type cap_type, u32 capability, u32 *result);
1162
 extern int ath5k_hw_get_capability(struct ath5k_hw *ah, enum ath5k_capability_type cap_type, u32 capability, u32 *result);

+ 11
- 0
src/drivers/net/ath5k/ath5k_eeprom.c View File

146
 		ee->ee_db[AR5K_EEPROM_MODE_11G][0] = (val >> 3) & 0x7;
146
 		ee->ee_db[AR5K_EEPROM_MODE_11G][0] = (val >> 3) & 0x7;
147
 	}
147
 	}
148
 
148
 
149
+	AR5K_EEPROM_READ(AR5K_EEPROM_IS_HB63, val);
150
+
151
+	if ((ah->ah_mac_version == (AR5K_SREV_AR2425 >> 4)) && val)
152
+		ee->ee_is_hb63 = 1;
153
+	else
154
+		ee->ee_is_hb63 = 0;
155
+
156
+	AR5K_EEPROM_READ(AR5K_EEPROM_RFKILL, val);
157
+	ee->ee_rfkill_pin = (u8) AR5K_REG_MS(val, AR5K_EEPROM_RFKILL_GPIO_SEL);
158
+	ee->ee_rfkill_pol = val & AR5K_EEPROM_RFKILL_POLARITY ? 1 : 0;
159
+
149
 	return 0;
160
 	return 0;
150
 }
161
 }
151
 
162
 

+ 2
- 2
src/drivers/net/ath5k/ath5k_initvals.c View File

723
 	{ AR5K_PHY_SETTLING,
723
 	{ AR5K_PHY_SETTLING,
724
 	   { 0x1372161c, 0x13721c25, 0x13721722, 0x137216a2, 0x13721c25 } },
724
 	   { 0x1372161c, 0x13721c25, 0x13721722, 0x137216a2, 0x13721c25 } },
725
 	{ AR5K_PHY_AGCCTL,
725
 	{ AR5K_PHY_AGCCTL,
726
-	   { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d18, 0x00009d18 } },
726
+	   { 0x00009d10, 0x00009d10, 0x00009d18, 0x00009d18, 0x00009d10 } },
727
 	{ AR5K_PHY_NF,
727
 	{ AR5K_PHY_NF,
728
 	   { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } },
728
 	   { 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 } },
729
 	{ AR5K_PHY_WEAK_OFDM_HIGH_THR,
729
 	{ AR5K_PHY_WEAK_OFDM_HIGH_THR,
804
 	{ AR5K_PHY_DESIRED_SIZE,
804
 	{ AR5K_PHY_DESIRED_SIZE,
805
 	   { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } },
805
 	   { 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0, 0x0de8b4e0 } },
806
 	{ AR5K_PHY_SIG,
806
 	{ AR5K_PHY_SIG,
807
-	   { 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ee80d2e, 0x7ee80d2e } },
807
+	   { 0x7e800d2e, 0x7e800d2e, 0x7ee80d2e, 0x7ee80d2e, 0x7e800d2e } },
808
 	{ AR5K_PHY_AGCCOARSE,
808
 	{ AR5K_PHY_AGCCOARSE,
809
 	   { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } },
809
 	   { 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e, 0x3137665e } },
810
 	{ AR5K_PHY_WEAK_OFDM_LOW_THR,
810
 	{ AR5K_PHY_WEAK_OFDM_LOW_THR,

+ 1
- 1
src/drivers/net/ath5k/ath5k_pcu.c View File

520
 	 * Note2: Windows driver (ndiswrapper) sets this to
520
 	 * Note2: Windows driver (ndiswrapper) sets this to
521
 	 *        0x00000714 instead of 0x00000007
521
 	 *        0x00000714 instead of 0x00000007
522
 	 */
522
 	 */
523
-	if (ah->ah_version > AR5K_AR5211) {
523
+	if (ah->ah_version >= AR5K_AR5211) {
524
 		ath5k_hw_reg_write(ah, AR5K_KEYTABLE_TYPE_NULL,
524
 		ath5k_hw_reg_write(ah, AR5K_KEYTABLE_TYPE_NULL,
525
 				AR5K_KEYTABLE_TYPE(entry));
525
 				AR5K_KEYTABLE_TYPE(entry));
526
 
526
 

+ 107
- 0
src/drivers/net/ath5k/ath5k_rfkill.c View File

1
+/*
2
+ * RFKILL support for ath5k
3
+ *
4
+ * Copyright (c) 2009 Tobias Doerffel <tobias.doerffel@gmail.com>
5
+ * Lightly modified for gPXE, Sep 2008 by Joshua Oreman <oremanj@rwcr.net>
6
+ *
7
+ * All rights reserved.
8
+ *
9
+ * Redistribution and use in source and binary forms, with or without
10
+ * modification, are permitted provided that the following conditions
11
+ * are met:
12
+ * 1. Redistributions of source code must retain the above copyright
13
+ *    notice, this list of conditions and the following disclaimer,
14
+ *    without modification.
15
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
16
+ *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
17
+ *    redistribution must be conditioned upon including a substantially
18
+ *    similar Disclaimer requirement for further binary redistribution.
19
+ * 3. Neither the names of the above-listed copyright holders nor the names
20
+ *    of any contributors may be used to endorse or promote products derived
21
+ *    from this software without specific prior written permission.
22
+ *
23
+ * NO WARRANTY
24
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26
+ * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
27
+ * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
28
+ * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
29
+ * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
32
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
34
+ * THE POSSIBILITY OF SUCH DAMAGES.
35
+ */
36
+
37
+FILE_LICENCE ( MIT );
38
+
39
+#include "base.h"
40
+
41
+
42
+static inline void ath5k_rfkill_disable(struct ath5k_softc *sc)
43
+{
44
+	DBG("ath5k: rfkill disable (gpio:%d polarity:%d)\n",
45
+	    sc->rf_kill.gpio, sc->rf_kill.polarity);
46
+	ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio);
47
+	ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, !sc->rf_kill.polarity);
48
+}
49
+
50
+
51
+static inline void ath5k_rfkill_enable(struct ath5k_softc *sc)
52
+{
53
+	DBG("ath5k: rfkill enable (gpio:%d polarity:%d)\n",
54
+	    sc->rf_kill.gpio, sc->rf_kill.polarity);
55
+	ath5k_hw_set_gpio_output(sc->ah, sc->rf_kill.gpio);
56
+	ath5k_hw_set_gpio(sc->ah, sc->rf_kill.gpio, sc->rf_kill.polarity);
57
+}
58
+
59
+static inline void ath5k_rfkill_set_intr(struct ath5k_softc *sc, int enable)
60
+{
61
+	struct ath5k_hw *ah = sc->ah;
62
+	u32 curval;
63
+
64
+	ath5k_hw_set_gpio_input(ah, sc->rf_kill.gpio);
65
+	curval = ath5k_hw_get_gpio(ah, sc->rf_kill.gpio);
66
+	ath5k_hw_set_gpio_intr(ah, sc->rf_kill.gpio, enable ?
67
+			       !!curval : !curval);
68
+}
69
+
70
+static int __unused
71
+ath5k_is_rfkill_set(struct ath5k_softc *sc)
72
+{
73
+	/* configuring GPIO for input for some reason disables rfkill */
74
+	/*ath5k_hw_set_gpio_input(sc->ah, sc->rf_kill.gpio);*/
75
+	return (ath5k_hw_get_gpio(sc->ah, sc->rf_kill.gpio) ==
76
+		sc->rf_kill.polarity);
77
+}
78
+
79
+void
80
+ath5k_rfkill_hw_start(struct ath5k_hw *ah)
81
+{
82
+	struct ath5k_softc *sc = ah->ah_sc;
83
+
84
+	/* read rfkill GPIO configuration from EEPROM header */
85
+	sc->rf_kill.gpio = ah->ah_capabilities.cap_eeprom.ee_rfkill_pin;
86
+	sc->rf_kill.polarity = ah->ah_capabilities.cap_eeprom.ee_rfkill_pol;
87
+
88
+	ath5k_rfkill_disable(sc);
89
+
90
+	/* enable interrupt for rfkill switch */
91
+	if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
92
+		ath5k_rfkill_set_intr(sc, 1);
93
+}
94
+
95
+
96
+void
97
+ath5k_rfkill_hw_stop(struct ath5k_hw *ah)
98
+{
99
+	struct ath5k_softc *sc = ah->ah_sc;
100
+
101
+	/* disable interrupt for rfkill switch */
102
+	if (AR5K_EEPROM_HDR_RFKILL(ah->ah_capabilities.cap_eeprom.ee_header))
103
+		ath5k_rfkill_set_intr(sc, 0);
104
+
105
+	/* enable RFKILL when stopping HW so Wifi LED is turned off */
106
+	ath5k_rfkill_enable(sc);
107
+}

+ 5
- 0
src/drivers/net/ath5k/base.h View File

123
 	unsigned int		txbuf_len;	/* buf count in txbuf list */
123
 	unsigned int		txbuf_len;	/* buf count in txbuf list */
124
 	struct ath5k_txq	txq;		/* tx queue */
124
 	struct ath5k_txq	txq;		/* tx queue */
125
 
125
 
126
+	struct {
127
+		u16 gpio;
128
+		unsigned polarity;
129
+	} rf_kill;
130
+
126
 	int			last_calib_ticks;
131
 	int			last_calib_ticks;
127
 
132
 
128
 	int 			power_level;	/* Requested tx power in dbm */
133
 	int 			power_level;	/* Requested tx power in dbm */

+ 10
- 0
src/drivers/net/ath5k/eeprom.h View File

26
 #define AR5K_EEPROM_MAGIC_5210		0x0000145a /* 5210 */
26
 #define AR5K_EEPROM_MAGIC_5210		0x0000145a /* 5210 */
27
 
27
 
28
 #define	AR5K_EEPROM_IS_HB63		0x000b	/* Talon detect */
28
 #define	AR5K_EEPROM_IS_HB63		0x000b	/* Talon detect */
29
+
30
+#define AR5K_EEPROM_RFKILL		0x0f
31
+#define AR5K_EEPROM_RFKILL_GPIO_SEL	0x0000001c
32
+#define AR5K_EEPROM_RFKILL_GPIO_SEL_S	2
33
+#define AR5K_EEPROM_RFKILL_POLARITY	0x00000002
34
+#define AR5K_EEPROM_RFKILL_POLARITY_S	1
35
+
29
 #define AR5K_EEPROM_REG_DOMAIN		0x00bf	/* EEPROM regdom */
36
 #define AR5K_EEPROM_REG_DOMAIN		0x00bf	/* EEPROM regdom */
30
 #define AR5K_EEPROM_CHECKSUM		0x00c0	/* EEPROM checksum */
37
 #define AR5K_EEPROM_CHECKSUM		0x00c0	/* EEPROM checksum */
31
 #define AR5K_EEPROM_INFO_BASE		0x00c0	/* EEPROM header */
38
 #define AR5K_EEPROM_INFO_BASE		0x00c0	/* EEPROM header */
369
 	u16	ee_version;
376
 	u16	ee_version;
370
 	u16	ee_header;
377
 	u16	ee_header;
371
 	u16	ee_ant_gain;
378
 	u16	ee_ant_gain;
379
+	u8	ee_rfkill_pin;
380
+	int	ee_rfkill_pol;
381
+	int	ee_is_hb63;
372
 	u16	ee_misc0;
382
 	u16	ee_misc0;
373
 	u16	ee_misc1;
383
 	u16	ee_misc1;
374
 	u16	ee_misc2;
384
 	u16	ee_misc2;

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