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[src] Fix spelling in comments, debug messages and local variable names

Fixes in comments and debug messages:

  existance -> existence
  unecessary -> unnecessary
  occured -> occurred
  decriptor -> descriptor
  neccessary -> necessary
  addres, adress -> address
  initilize -> initialize
  sucessfully -> successfully
  paramter -> parameter
  acess -> access
  upto -> up to
  likelyhood ->likelihood
  thru -> through
  substracting -> subtracting
  lenght -> length
  isnt -> isn't
  interupt -> interrupt
  publically -> publicly (this one was not wrong, but unusual)
  recieve -> receive
  accessable -> accessible
  seperately -> separately
  pacet -> packet
  controled -> controlled
  dectect -> detect
  indicies -> indices
  extremly -> extremely
  boundry -> boundary
  usefull -> useful
  unuseable -> unusable
  auxilliary -> auxiliary
  embeded -> embedded
  enviroment -> environment
  sturcture -> structure
  complier -> compiler
  constructes -> constructs
  supress -> suppress
  intruduced -> introduced
  compatability -> compatibility
  verfication -> verification
  ths -> the
  reponse -> response

Fixes in local variable names:

  retreive -> retrieve

Most of these fixes were made using codespell.

Signed-off-by: Stefan Weil <sw@weilnetz.de>
Modified-by: Michael Brown <mcb30@ipxe.org>
Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Stefan Weil 12 år sedan
förälder
incheckning
3fcb8cf8dc

+ 1
- 1
src/drivers/net/3c509.h Visa fil

@@ -77,7 +77,7 @@ FILE_LICENCE ( BSD3 );
77 77
 /**************************************************************************
78 78
  *
79 79
  * These define the EEPROM data structure.  They are used in the probe
80
- * function to verify the existance of the adapter after having sent
80
+ * function to verify the existence of the adapter after having sent
81 81
  * the ID_Sequence.
82 82
  *
83 83
  * There are others but only the ones we use are defined here.

+ 1
- 1
src/drivers/net/3c515.c Visa fil

@@ -656,7 +656,7 @@ static int
656 656
 corkscrew_found_device(int ioaddr, int irq,
657 657
 		       int product_index, int options, struct nic *nic)
658 658
 {
659
-	/* Direct copy from Becker 3c515.c with unecessary parts removed */
659
+	/* Direct copy from Becker 3c515.c with unnecessary parts removed */
660 660
 	vp->product_name = "3c515";
661 661
 	vp->options = options;
662 662
 	if (options >= 0) {

+ 1
- 1
src/drivers/net/3c595.c Visa fil

@@ -127,7 +127,7 @@ static void t595_reset(struct nic *nic)
127 127
 		S_TX_COMPLETE | S_TX_AVAIL, BASE + VX_COMMAND);
128 128
 
129 129
 /*
130
- * Attempt to get rid of any stray interrupts that occured during
130
+ * Attempt to get rid of any stray interrupts that occurred during
131 131
  * configuration.  On the i386 this isn't possible because one may
132 132
  * already be queued.  However, a single stray interrupt is
133 133
  * unimportant.

+ 1
- 1
src/drivers/net/amd8111e.h Visa fil

@@ -574,7 +574,7 @@ typedef enum {
574 574
 #define CSTATE  1 
575 575
 #define SSTATE  2 
576 576
 
577
-/* amd8111e decriptor flag definitions */
577
+/* amd8111e descriptor flag definitions */
578 578
 typedef enum {
579 579
 
580 580
 	OWN_BIT		=	(1 << 15),

+ 1
- 1
src/drivers/net/cs89x0.c Visa fil

@@ -58,7 +58,7 @@ FILE_LICENCE ( GPL2_ONLY );
58 58
   Fri Nov 22 23:00:00 1996  Markus Gutschke  <gutschk@math.uni-muenster.de>
59 59
 
60 60
   * read the manuals for the CS89x0 chipsets and took note of all the
61
-    changes that will be neccessary in order to adapt Russel Nelson's code
61
+    changes that will be necessary in order to adapt Russel Nelson's code
62 62
     to the requirements of a BOOT-Prom
63 63
 
64 64
   * 6

+ 4
- 4
src/drivers/net/davicom.c Visa fil

@@ -213,11 +213,11 @@ static int phy_read(int location)
213 213
  phy_write_1bit(io_dcr9, PHY_DATA_1);
214 214
  phy_write_1bit(io_dcr9, PHY_DATA_0);
215 215
 
216
- /* Send Phy addres */
216
+ /* Send Phy address */
217 217
  for (i=0x10; i>0; i=i>>1)
218 218
      phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0);
219 219
    
220
- /* Send register addres */
220
+ /* Send register address */
221 221
  for (i=0x10; i>0; i=i>>1)
222 222
      phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0);
223 223
 
@@ -257,11 +257,11 @@ static void phy_write(int location, u16 phy_data)
257 257
  phy_write_1bit(io_dcr9, PHY_DATA_0);
258 258
  phy_write_1bit(io_dcr9, PHY_DATA_1);
259 259
 
260
- /* Send Phy addres */
260
+ /* Send Phy address */
261 261
  for (i=0x10; i>0; i=i>>1)
262 262
    phy_write_1bit(io_dcr9, phy_addr&i ? PHY_DATA_1: PHY_DATA_0);
263 263
 
264
- /* Send register addres */
264
+ /* Send register address */
265 265
  for (i=0x10; i>0; i=i>>1)
266 266
    phy_write_1bit(io_dcr9, location&i ? PHY_DATA_1: PHY_DATA_0);
267 267
 

+ 10
- 10
src/drivers/net/dmfe.c Visa fil

@@ -261,15 +261,15 @@ static void dmfe_reset(struct nic *nic)
261 261
 		db->cr0_data = 0;
262 262
 		db->dm910x_chk_mode = 1;	/* Enter the check mode */
263 263
 	}
264
-	/* Initilize DM910X board */
264
+	/* Initialize DM910X board */
265 265
 	dmfe_init_dm910x(nic);
266 266
 
267 267
 	return;
268 268
 }
269 269
 
270
-/*	Initilize DM910X board
270
+/*	Initialize DM910X board
271 271
  *	Reset DM910X board
272
- *	Initilize TX/Rx descriptor chain structure
272
+ *	Initialize TX/Rx descriptor chain structure
273 273
  *	Send the set-up frame
274 274
  *	Enable Tx/Rx machine
275 275
  */
@@ -307,7 +307,7 @@ static void dmfe_init_dm910x(struct nic *nic)
307 307
 	if (!(db->media_mode & DMFE_AUTO))
308 308
 		db->op_mode = db->media_mode;	/* Force Mode */
309 309
 
310
-	/* Initiliaze Transmit/Receive decriptor and CR3/4 */
310
+	/* Initiliaze Transmit/Receive descriptor and CR3/4 */
311 311
 	dmfe_descriptor_init(nic, ioaddr);
312 312
 
313 313
 	/* tx descriptor start pointer */
@@ -572,7 +572,7 @@ static void update_cr6(u32 cr6_data, unsigned long ioaddr)
572 572
 
573 573
 /*
574 574
  *	Send a setup frame for DM9132
575
- *	This setup frame initilize DM910X addres filter mode
575
+ *	This setup frame initialize DM910X address filter mode
576 576
 */
577 577
 
578 578
 static void dm9132_id_table(struct nic *nic __unused)
@@ -623,7 +623,7 @@ static void dm9132_id_table(struct nic *nic __unused)
623 623
 
624 624
 /*
625 625
  *	Send a setup frame for DM9102/DM9102A
626
- *	This setup frame initilize DM910X addres filter mode
626
+ *	This setup frame initialize DM910X address filter mode
627 627
  */
628 628
 
629 629
 static void send_filter_frame(struct nic *nic)
@@ -903,13 +903,13 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
903 903
 		phy_write_1bit(ioaddr, PHY_DATA_0);
904 904
 		phy_write_1bit(ioaddr, PHY_DATA_1);
905 905
 
906
-		/* Send Phy addres */
906
+		/* Send Phy address */
907 907
 		for (i = 0x10; i > 0; i = i >> 1)
908 908
 			phy_write_1bit(ioaddr,
909 909
 				       phy_addr & i ? PHY_DATA_1 :
910 910
 				       PHY_DATA_0);
911 911
 
912
-		/* Send register addres */
912
+		/* Send register address */
913 913
 		for (i = 0x10; i > 0; i = i >> 1)
914 914
 			phy_write_1bit(ioaddr,
915 915
 				       offset & i ? PHY_DATA_1 :
@@ -959,13 +959,13 @@ static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset,
959 959
 		phy_write_1bit(ioaddr, PHY_DATA_1);
960 960
 		phy_write_1bit(ioaddr, PHY_DATA_0);
961 961
 
962
-		/* Send Phy addres */
962
+		/* Send Phy address */
963 963
 		for (i = 0x10; i > 0; i = i >> 1)
964 964
 			phy_write_1bit(ioaddr,
965 965
 				       phy_addr & i ? PHY_DATA_1 :
966 966
 				       PHY_DATA_0);
967 967
 
968
-		/* Send register addres */
968
+		/* Send register address */
969 969
 		for (i = 0x10; i > 0; i = i >> 1)
970 970
 			phy_write_1bit(ioaddr,
971 971
 				       offset & i ? PHY_DATA_1 :

+ 1
- 1
src/drivers/net/eepro100.c Visa fil

@@ -910,7 +910,7 @@ static void ifec_refill_rx_ring ( struct net_device *netdev )
910 910
  * Initial allocation & initialization of the rx ring.
911 911
  *
912 912
  * @v netdev  		Device of rx ring.
913
- * @ret rc    		Non-zero if error occured
913
+ * @ret rc    		Non-zero if error occurred
914 914
  */
915 915
 static int ifec_rx_setup ( struct net_device *netdev )
916 916
 {

+ 2
- 2
src/drivers/net/epic100.c Visa fil

@@ -250,7 +250,7 @@ epic100_open(void)
250 250
 
251 251
     outl(tmp, txcon);
252 252
 
253
-    /* Give adress of RX and TX ring to the chip */
253
+    /* Give address of RX and TX ring to the chip */
254 254
     outl(virt_to_le32desc(&rx_ring), prcdar);
255 255
     outl(virt_to_le32desc(&tx_ring), ptcdar);
256 256
 
@@ -365,7 +365,7 @@ epic100_transmit(struct nic *nic, const char *destaddr, unsigned int type,
365 365
  * Arguments: none
366 366
  *
367 367
  * returns:   1 if a packet was received.
368
- *            0 if no pacet was received.
368
+ *            0 if no packet was received.
369 369
  * side effects:
370 370
  *            returns the packet in the array nic->packet.
371 371
  *            returns the length of the packet in nic->packetlen.

+ 1
- 1
src/drivers/net/epic100.h Visa fil

@@ -64,7 +64,7 @@ enum epic100_registers {
64 64
 #define INTR_RX_STATUS_OK	(0x00008000)	/* rx status valid. NI */
65 65
 #define INTR_PCI_TGT_ABT	(0x00004000)	/* PCI Target abort */
66 66
 #define INTR_PCI_MASTER_ABT	(0x00002000)	/* PCI Master abort */
67
-#define INTR_PCI_PARITY_ERR	(0x00001000)	/* PCI adress parity error */
67
+#define INTR_PCI_PARITY_ERR	(0x00001000)	/* PCI address parity error */
68 68
 #define INTR_PCI_DATA_ERR	(0x00000800)	/* PCI data parity error */
69 69
 #define INTR_RX_THR_CROSSED	(0x00000400)	/* rx copy threshold crossed */
70 70
 #define INTR_CNTFULL		(0x00000200)	/* Counter overflow */

+ 4
- 4
src/drivers/net/etherfabric.c Visa fil

@@ -1566,7 +1566,7 @@ falcon_gmii_wait ( struct efab_nic *efab )
1566 1566
 	efab_dword_t md_stat;
1567 1567
 	int count;
1568 1568
 
1569
-	/* wait upto 10ms */
1569
+	/* wait up to 10ms */
1570 1570
 	for (count = 0; count < 1000; count++) {
1571 1571
 		falcon_readl ( efab, &md_stat, FCN_MD_STAT_REG_KER );
1572 1572
 		if ( EFAB_DWORD_FIELD ( md_stat, FCN_MD_BSY ) == 0 ) {
@@ -2195,7 +2195,7 @@ falcon_reset_xaui ( struct efab_nic *efab )
2195 2195
 	falcon_xmac_writel ( efab, &reg, FCN_XX_PWR_RST_REG_MAC );
2196 2196
 
2197 2197
 	/* Give some time for the link to establish */
2198
-	for (count = 0; count < 1000; count++) { /* wait upto 10ms */
2198
+	for (count = 0; count < 1000; count++) { /* wait up to 10ms */
2199 2199
 		falcon_xmac_readl ( efab, &reg, FCN_XX_PWR_RST_REG_MAC );
2200 2200
 		if ( EFAB_DWORD_FIELD ( reg, FCN_XX_RST_XX_EN ) == 0 ) {
2201 2201
 			falcon_setup_xaui ( efab );
@@ -3395,7 +3395,7 @@ falcon_init_sram ( struct efab_nic *efab )
3395 3395
 		falcon_read ( efab, &reg, FCN_SRM_CFG_REG_KER );
3396 3396
 		if ( !EFAB_OWORD_FIELD ( reg, FCN_SRAM_OOB_BT_INIT_EN ) )
3397 3397
 			return 0;
3398
-	} while (++count < 20);	/* wait upto 0.4 sec */
3398
+	} while (++count < 20);	/* wait up to 0.4 sec */
3399 3399
 
3400 3400
 	EFAB_ERR ( "timed out waiting for SRAM reset\n");
3401 3401
 	return -ETIMEDOUT;
@@ -3426,7 +3426,7 @@ falcon_setup_nic ( struct efab_nic *efab )
3426 3426
 	falcon_write ( efab, &reg, FCN_RX_DC_CFG_REG_KER );
3427 3427
 	
3428 3428
 	/* Set number of RSS CPUs
3429
-	 * bug7244: Increase filter depth to reduce RX_RESET likelyhood
3429
+	 * bug7244: Increase filter depth to reduce RX_RESET likelihood
3430 3430
 	 */
3431 3431
 	EFAB_POPULATE_OWORD_5 ( reg,
3432 3432
 				FCN_NUM_KER, 0,

+ 1
- 1
src/drivers/net/forcedeth.c Visa fil

@@ -998,7 +998,7 @@ forcedeth_poll ( struct net_device *netdev )
998 998
 
999 999
 	DBG ( "forcedeth_poll: status = %#04x\n", status );
1000 1000
 
1001
-	/* Link change interrupt occured. Call always if link is down,
1001
+	/* Link change interrupt occurred. Call always if link is down,
1002 1002
 	 * to give auto-neg a chance to finish */
1003 1003
 	if ( ( status & NVREG_IRQ_LINK ) || ! ( netdev_link_ok ( netdev ) ) )
1004 1004
 		forcedeth_link_status ( netdev );

+ 1
- 1
src/drivers/net/myri10ge.c Visa fil

@@ -719,7 +719,7 @@ static int myri10ge_nv_init ( struct myri10ge_private *priv )
719 719
 		return 0;
720 720
 	}
721 721
 
722
-	/* Initilize NonVolatile Storage state. */
722
+	/* Initialize NonVolatile Storage state. */
723 723
 
724 724
 	priv->nvs.word_len_log2 = 0;
725 725
 	priv->nvs.size		= hdr.eeprom_len;

+ 1
- 1
src/drivers/net/p80211hdr.h Visa fil

@@ -258,7 +258,7 @@ typedef union p80211_hdr
258 258
 /*================================================================*/
259 259
 /* Function Declarations */
260 260
 
261
-/* Frame and header lenght macros */
261
+/* Frame and header length macros */
262 262
 
263 263
 #define WLAN_CTL_FRAMELEN(fstype) (\
264 264
 	(fstype) == WLAN_FSTYPE_BLOCKACKREQ	? 24 : \

+ 1
- 1
src/drivers/net/pcnet32.c Visa fil

@@ -407,7 +407,7 @@ pcnet32_chip_detect ( struct pcnet32_private *priv )
407 407
 	/*
408 408
 	 * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit
409 409
 	 * starting until the packet is loaded. Strike one for reliability, lose
410
-	 * one for latency - although on PCI this isnt a big loss. Older chips
410
+	 * one for latency - although on PCI this isn't a big loss. Older chips
411 411
 	 * have FIFO's smaller than a packet, so you can't do this.
412 412
 	 * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
413 413
 	 */

+ 2
- 2
src/drivers/net/sis190.h Visa fil

@@ -77,7 +77,7 @@ enum sis190_registers {
77 77
 	IntrStatus		= 0x20,
78 78
 	IntrMask		= 0x24,
79 79
 	IntrControl		= 0x28,
80
-	IntrTimer		= 0x2c,	// unused (Interupt Timer)
80
+	IntrTimer		= 0x2c,	// unused (Interrupt Timer)
81 81
 	PMControl		= 0x30,	// unused (Power Mgmt Control/Status)
82 82
 	rsv2			= 0x34,	// reserved
83 83
 	ROMControl		= 0x38,
@@ -218,7 +218,7 @@ enum _DescStatusBit {
218 218
 	RxSizeMask	= 0x0000ffff
219 219
 	/*
220 220
 	* The asic could apparently do vlan, TSO, jumbo (sis191 only) and
221
-	* provide two (unused with Linux) Tx queues. No publically
221
+	* provide two (unused with Linux) Tx queues. No publicly
222 222
 	* available documentation alas.
223 223
 	*/
224 224
 };

+ 5
- 5
src/drivers/net/sis900.c Visa fil

@@ -328,7 +328,7 @@ static int sis635_get_mac_addr(struct pci_device * pci_dev __unused, struct nic
328 328
  *
329 329
  * Side effects:
330 330
  *            leaves the ioaddress of the sis900 chip in the variable ioaddr.
331
- *            leaves the sis900 initialized, and ready to recieve packets.
331
+ *            leaves the sis900 initialized, and ready to receive packets.
332 332
  *
333 333
  * Returns:   struct nic *:          pointer to NIC data structure
334 334
  */
@@ -394,7 +394,7 @@ static int sis900_probe ( struct nic *nic, struct pci_device *pci ) {
394 394
 
395 395
         mii_status = sis900_mdio_read(phy_addr, MII_STATUS);
396 396
         if (mii_status == 0xffff || mii_status == 0x0000)
397
-            /* the mii is not accessable, try next one */
397
+            /* the mii is not accessible, try next one */
398 398
             continue;
399 399
                 
400 400
         phy_id0 = sis900_mdio_read(phy_addr, MII_PHY_ID0);
@@ -508,7 +508,7 @@ static u16 sis900_read_eeprom(int location)
508 508
 /* 
509 509
    Read and write the MII management registers using software-generated
510 510
    serial MDIO protocol. Note that the command bits and data bits are
511
-   send out seperately 
511
+   sent out separately
512 512
 */
513 513
 
514 514
 static void sis900_mdio_idle(long mdio_addr)
@@ -1171,8 +1171,8 @@ sis900_transmit(struct nic  *nic,
1171 1171
  *
1172 1172
  * Arguments: struct nic *nic:          NIC data structure
1173 1173
  *
1174
- * Returns:   1 if a packet was recieved.
1175
- *            0 if no pacet was recieved.
1174
+ * Returns:   1 if a packet was received.
1175
+ *            0 if no packet was received.
1176 1176
  *
1177 1177
  * Side effects:
1178 1178
  *            Returns (copies) the packet to the array nic->packet.

+ 4
- 4
src/drivers/net/skge.h Visa fil

@@ -1095,7 +1095,7 @@ enum {
1095 1095
 
1096 1096
 	PHY_ST_PRE_SUP	= 1<<6, /* Bit  6:	Preamble Suppression */
1097 1097
 	PHY_ST_AN_OVER	= 1<<5, /* Bit  5:	Auto-Negotiation Over */
1098
-	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occured */
1098
+	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occurred */
1099 1099
 	PHY_ST_AN_CAP	= 1<<3, /* Bit  3:	Auto-Negotiation Capability */
1100 1100
 	PHY_ST_LSYNC	= 1<<2, /* Bit  2:	Link Synchronized */
1101 1101
 	PHY_ST_JAB_DET	= 1<<1, /* Bit  1:	Jabber Detected */
@@ -1778,8 +1778,8 @@ enum {
1778 1778
 	GM_GPSR_LINK_UP		= 1<<12, /* Bit 12:	Link Up Status */
1779 1779
 	GM_GPSR_PAUSE		= 1<<11, /* Bit 11:	Pause State */
1780 1780
 	GM_GPSR_TX_ACTIVE	= 1<<10, /* Bit 10:	Tx in Progress */
1781
-	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occured */
1782
-	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occured */
1781
+	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occurred */
1782
+	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occurred */
1783 1783
 
1784 1784
 	GM_GPSR_PHY_ST_CH	= 1<<5,	/* Bit  5:	PHY Status Change */
1785 1785
 	GM_GPSR_GIG_SPEED	= 1<<4,	/* Bit  4:	Gigabit Speed (1 = 1000 Mbps) */
@@ -2284,7 +2284,7 @@ enum {
2284 2284
 	XM_ST_BC	= 1<<7,		/* Bit  7:	Broadcast packet */
2285 2285
 	XM_ST_MC	= 1<<6,		/* Bit  6:	Multicast packet */
2286 2286
 	XM_ST_UC	= 1<<5,		/* Bit  5:	Unicast packet */
2287
-	XM_ST_TX_UR	= 1<<4,		/* Bit  4:	FIFO Underrun occured */
2287
+	XM_ST_TX_UR	= 1<<4,		/* Bit  4:	FIFO Underrun occurred */
2288 2288
 	XM_ST_CS_ERR	= 1<<3,		/* Bit  3:	Carrier Sense Error */
2289 2289
 	XM_ST_LAT_COL	= 1<<2,		/* Bit  2:	Late Collision Error */
2290 2290
 	XM_ST_MUL_COL	= 1<<1,		/* Bit  1:	Multiple Collisions */

+ 1
- 1
src/drivers/net/sky2.c Visa fil

@@ -783,7 +783,7 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
783 783
 	sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
784 784
 	sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
785 785
 
786
-	/* On chips without ram buffer, pause is controled by MAC level */
786
+	/* On chips without ram buffer, pause is controlled by MAC level */
787 787
 	if (!(hw->flags & SKY2_HW_RAM_BUFFER)) {
788 788
 		sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
789 789
 		sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);

+ 3
- 3
src/drivers/net/sky2.h Visa fil

@@ -1056,7 +1056,7 @@ enum {
1056 1056
 
1057 1057
 	PHY_ST_PRE_SUP	= 1<<6, /* Bit  6:	Preamble Suppression */
1058 1058
 	PHY_ST_AN_OVER	= 1<<5, /* Bit  5:	Auto-Negotiation Over */
1059
-	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occured */
1059
+	PHY_ST_REM_FLT	= 1<<4, /* Bit  4:	Remote Fault Condition Occurred */
1060 1060
 	PHY_ST_AN_CAP	= 1<<3, /* Bit  3:	Auto-Negotiation Capability */
1061 1061
 	PHY_ST_LSYNC	= 1<<2, /* Bit  2:	Link Synchronized */
1062 1062
 	PHY_ST_JAB_DET	= 1<<1, /* Bit  1:	Jabber Detected */
@@ -1587,8 +1587,8 @@ enum {
1587 1587
 	GM_GPSR_LINK_UP		= 1<<12, /* Bit 12:	Link Up Status */
1588 1588
 	GM_GPSR_PAUSE		= 1<<11, /* Bit 11:	Pause State */
1589 1589
 	GM_GPSR_TX_ACTIVE	= 1<<10, /* Bit 10:	Tx in Progress */
1590
-	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occured */
1591
-	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occured */
1590
+	GM_GPSR_EXC_COL		= 1<<9,	/* Bit  9:	Excessive Collisions Occurred */
1591
+	GM_GPSR_LAT_COL		= 1<<8,	/* Bit  8:	Late Collisions Occurred */
1592 1592
 
1593 1593
 	GM_GPSR_PHY_ST_CH	= 1<<5,	/* Bit  5:	PHY Status Change */
1594 1594
 	GM_GPSR_GIG_SPEED	= 1<<4,	/* Bit  4:	Gigabit Speed (1 = 1000 Mbps) */

+ 2
- 2
src/drivers/net/smc9000.h Visa fil

@@ -107,7 +107,7 @@ typedef unsigned long int		dword;
107 107
 #define RPC_LED_10      (0x02)  // LED = 10Mbps link detect
108 108
 #define RPC_LED_FD      (0x03)  // LED = Full Duplex Mode
109 109
 #define RPC_LED_TX_RX   (0x04)  // LED = TX or RX packet occurred
110
-#define RPC_LED_100     (0x05)  // LED = 100Mbps link dectect
110
+#define RPC_LED_100     (0x05)  // LED = 100Mbps link detect
111 111
 #define RPC_LED_TX      (0x06)  // LED = TX packet occurred
112 112
 #define RPC_LED_RX      (0x07)  // LED = RX packet occurred
113 113
 #define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)
@@ -125,7 +125,7 @@ typedef unsigned long int		dword;
125 125
 #define RPC_LED_10      (0x02)  // LED = 10Mbps link detect
126 126
 #define RPC_LED_FD      (0x03)  // LED = Full Duplex Mode
127 127
 #define RPC_LED_TX_RX   (0x04)  // LED = TX or RX packet occurred
128
-#define RPC_LED_100     (0x05)  // LED = 100Mbps link dectect
128
+#define RPC_LED_100     (0x05)  // LED = 100Mbps link detect
129 129
 #define RPC_LED_TX      (0x06)  // LED = TX packet occurred
130 130
 #define RPC_LED_RX      (0x07)  // LED = RX packet occurred
131 131
 #define RPC_DEFAULT (RPC_ANEG | (RPC_LED_100 << RPC_LSXA_SHFT) | (RPC_LED_FD << RPC_LSXB_SHFT) | RPC_SPEED | RPC_DPLX)

+ 3
- 3
src/drivers/net/sundance.c Visa fil

@@ -258,7 +258,7 @@ static struct sundance_private {
258 258
 	const char *nic_name;
259 259
 	/* Frequently used values */
260 260
 
261
-	unsigned int cur_rx;	/* Producer/consumer ring indicies */
261
+	unsigned int cur_rx;	/* Producer/consumer ring indices */
262 262
 	unsigned int mtu;
263 263
 
264 264
 	/* These values keep track of the tranceiver/media in use */
@@ -441,7 +441,7 @@ static void sundance_irq ( struct nic *nic, irq_action_t action ) {
441 441
 /**************************************************************************
442 442
 POLL - Wait for a frame
443 443
 ***************************************************************************/
444
-static int sundance_poll(struct nic *nic, int retreive)
444
+static int sundance_poll(struct nic *nic, int retrieve)
445 445
 {
446 446
 	/* return true if there's an ethernet packet ready to read */
447 447
 	/* nic->packet should contain data on return */
@@ -455,7 +455,7 @@ static int sundance_poll(struct nic *nic, int retreive)
455 455
 		return 0;
456 456
 
457 457
 	/* There is a packet ready */
458
-	if(!retreive)
458
+	if(!retrieve)
459 459
 		return 1;
460 460
 
461 461
 	intr_status = inw(nic->ioaddr + IntrStatus);

+ 3
- 3
src/drivers/net/tlan.c Visa fil

@@ -202,7 +202,7 @@ static struct tlan_private {
202 202
 	unsigned short vendor_id;	/* PCI Vendor code */
203 203
 	unsigned short dev_id;	/* PCI Device code */
204 204
 	const char *nic_name;
205
-	unsigned int cur_rx, dirty_rx;	/* Producer/consumer ring indicies */
205
+	unsigned int cur_rx, dirty_rx;	/* Producer/consumer ring indices */
206 206
 	unsigned rx_buf_sz;	/* Based on mtu + Slack */
207 207
 	struct TLanList *txList;
208 208
 	u32 txHead;
@@ -1085,11 +1085,11 @@ These routines are based on the information in Chap. 2 of the
1085 1085
 *				for this device.
1086 1086
 *		phy		The address of the PHY to be queried.
1087 1087
 *		reg		The register whose contents are to be
1088
-*				retreived.
1088
+*				retrieved.
1089 1089
 *		val		A pointer to a variable to store the
1090 1090
 *				retrieved value.
1091 1091
 *
1092
-*	This function uses the TLAN's MII bus to retreive the contents
1092
+*	This function uses the TLAN's MII bus to retrieve the contents
1093 1093
 *	of a given register on a PHY.  It sends the appropriate info
1094 1094
 *	and then reads the 16-bit register value from the MII bus via
1095 1095
 *	the TLAN SIO register.

+ 5
- 5
src/drivers/net/via-rhine.c Visa fil

@@ -288,7 +288,7 @@ static const char *version = "rhine.c v1.0.2 2004-10-29\n";
288 288
  */
289 289
 
290 290
 #define EECSR_EEPR		0x80	/* eeprom programed status, 73h means programed */
291
-#define EECSR_EMBP		0x40	/* eeprom embeded programming */
291
+#define EECSR_EMBP		0x40	/* eeprom embedded programming */
292 292
 #define EECSR_AUTOLD		0x20	/* eeprom content reload */
293 293
 #define EECSR_DPM		0x10	/* eeprom direct programming */
294 294
 #define EECSR_CS		0x08	/* eeprom CS pin */
@@ -322,7 +322,7 @@ static const char *version = "rhine.c v1.0.2 2004-10-29\n";
322 322
  * Bits in the CFGA register
323 323
  */
324 324
 
325
-#define CFGA_EELOAD		0x80	/* enable eeprom embeded and direct programming */
325
+#define CFGA_EELOAD		0x80	/* enable eeprom embedded and direct programming */
326 326
 #define CFGA_JUMPER		0x40
327 327
 #define CFGA_MTGPIO		0x08
328 328
 #define CFGA_T10EN		0x02
@@ -693,7 +693,7 @@ static void MIIDelay (void);
693 693
 static void rhine_init_ring (struct nic *dev);
694 694
 static void rhine_disable (struct nic *nic);
695 695
 static void rhine_reset (struct nic *nic);
696
-static int rhine_poll (struct nic *nic, int retreive);
696
+static int rhine_poll (struct nic *nic, int retrieve);
697 697
 static void rhine_transmit (struct nic *nic, const char *d, unsigned int t,
698 698
 			    unsigned int s, const char *p);
699 699
 static void reload_eeprom(int ioaddr);
@@ -1286,7 +1286,7 @@ rhine_reset (struct nic *nic)
1286 1286
 #define IOSYNC  do { inb(nic->ioaddr + StationAddr); } while (0)
1287 1287
 
1288 1288
 static int
1289
-rhine_poll (struct nic *nic, int retreive)
1289
+rhine_poll (struct nic *nic, int retrieve)
1290 1290
 {
1291 1291
     struct rhine_private *tp = (struct rhine_private *) nic->priv_data;
1292 1292
     int rxstatus, good = 0;;
@@ -1295,7 +1295,7 @@ rhine_poll (struct nic *nic, int retreive)
1295 1295
     {
1296 1296
         unsigned int intr_status;
1297 1297
         /* There is a packet ready */
1298
-        if(!retreive)
1298
+        if(!retrieve)
1299 1299
             return 1;
1300 1300
 
1301 1301
         intr_status = inw(nic->ioaddr + IntrStatus);

+ 1
- 1
src/drivers/net/via-velocity.c Visa fil

@@ -125,7 +125,7 @@ VELOCITY_PARAM(enable_tagging, "Enable 802.1Q tagging");
125 125
 /* IP_byte_align[] is used for IP header DWORD byte aligned
126 126
    0: indicate the IP header won't be DWORD byte aligned.(Default) .
127 127
    1: indicate the IP header will be DWORD byte aligned.
128
-      In some enviroment, the IP header should be DWORD byte aligned,
128
+      In some environment, the IP header should be DWORD byte aligned,
129 129
       or the packet will be droped when we receive it. (eg: IPVS)
130 130
 */
131 131
 VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");

+ 1
- 1
src/drivers/net/via-velocity.h Visa fil

@@ -878,7 +878,7 @@ enum {
878 878
  *	Bits in the EECSR register
879 879
  */
880 880
 
881
-#define EECSR_EMBP          0x40	/* eeprom embeded programming */
881
+#define EECSR_EMBP          0x40	/* eeprom embedded programming */
882 882
 #define EECSR_RELOAD        0x20	/* eeprom content reload */
883 883
 #define EECSR_DPM           0x10	/* eeprom direct programming */
884 884
 #define EECSR_ECS           0x08	/* eeprom CS pin */

+ 1
- 1
src/drivers/net/virtio-net.c Visa fil

@@ -69,7 +69,7 @@ FILE_LICENCE ( GPL2_OR_LATER );
69 69
  * Linux source.
70 70
  */
71 71
 
72
-/* Virtqueue indicies */
72
+/* Virtqueue indices */
73 73
 enum {
74 74
 	RX_INDEX = 0,
75 75
 	TX_INDEX,

+ 1
- 1
src/drivers/net/vxge/vxge_main.c Visa fil

@@ -252,7 +252,7 @@ static void vxge_poll(struct net_device *ndev)
252 252
 /*
253 253
  * vxge_irq - enable or Disable interrupts
254 254
  *
255
- * @netdev   netdevice sturcture reference
255
+ * @netdev   netdevice structure reference
256 256
  * @action   requested interrupt action
257 257
  */
258 258
 static void vxge_irq(struct net_device *netdev __unused, int action)

+ 1
- 1
src/include/ipxe/iscsi.h Visa fil

@@ -36,7 +36,7 @@ union iscsi_segment_lengths {
36 36
 		 */
37 37
 		uint8_t data_len[3];
38 38
 	} bytes;
39
-	/** Ths data length (measured in bytes), in network byte
39
+	/** The data length (measured in bytes), in network byte
40 40
 	 * order, with ahs_len as the first byte.
41 41
 	 */
42 42
 	uint32_t ahs_and_data_len;

+ 1
- 1
src/include/ipxe/pci.h Visa fil

@@ -172,7 +172,7 @@ FILE_LICENCE ( GPL2_ONLY );
172 172
 #define  PCI_PM_CAP_PME_CLOCK	0x0008	/* PME clock required */
173 173
 #define  PCI_PM_CAP_RESERVED    0x0010  /* Reserved field */
174 174
 #define  PCI_PM_CAP_DSI		0x0020	/* Device specific initialization */
175
-#define  PCI_PM_CAP_AUX_POWER	0x01C0	/* Auxilliary power support mask */
175
+#define  PCI_PM_CAP_AUX_POWER	0x01C0	/* Auxiliary power support mask */
176 176
 #define  PCI_PM_CAP_D1		0x0200	/* D1 power state support */
177 177
 #define  PCI_PM_CAP_D2		0x0400	/* D2 power state support */
178 178
 #define  PCI_PM_CAP_PME		0x0800	/* PME pin supported */

+ 1
- 1
src/net/udp/dns.c Visa fil

@@ -428,7 +428,7 @@ static int dns_xfer_deliver ( struct dns_request *dns,
428 428
 	}
429 429
 	
430 430
 	/* Determine what to do next based on the type of query we
431
-	 * issued and the reponse we received
431
+	 * issued and the response we received
432 432
 	 */
433 433
 	switch ( qtype ) {
434 434
 

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