Some BIOSes (observed with an HP Gen9) seem to spuriously enable interrupts at the PIC. This causes problems with NBPs such as GRUB which use the UNDI API (thereby enabling interrupts on the NIC) without first hooking an interrupt service routine. In this situation, the interrupt will end up being handled by the default BIOS ISR, which will typically just send an EOI and return. Since nothing in this handler causes the NIC to deassert the interrupt, this will result in an interrupt storm. Entertainingly, some BIOSes are immune to this problem because the default ISR sends the EOI only to the slave PIC; this effectively disables the interrupt. Work around this problem by disabling the interrupt on the PIC before invoking the PXE NBP. An NBP that expects to make use of interrupts will need to be configuring the PIC anyway, so it is probably safe to assume that it will explicitly reenable the interrupt. Signed-off-by: Michael Brown <mcb30@ipxe.org>tags/v1.20.1
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