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			|  | 1 | +#ifndef _HERMON_H
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			|  | 2 | +#define _HERMON_H
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			|  | 3 | +
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			|  | 4 | +/** @file
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			|  | 5 | + *
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			|  | 6 | + * Mellanox Hermon Infiniband HCA driver
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			|  | 7 | + *
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			|  | 8 | + */
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			|  | 9 | +
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			|  | 10 | +#include <stdint.h>
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			|  | 11 | +#include <gpxe/uaccess.h>
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			|  | 12 | +#include "mlx_bitops.h"
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			|  | 13 | +#include "MT25408_PRM.h"
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			|  | 14 | +
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			|  | 15 | +/*
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			|  | 16 | + * Hardware constants
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			|  | 17 | + *
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			|  | 18 | + */
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			|  | 19 | +
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			|  | 20 | +/* PCI BARs */
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			|  | 21 | +#define HERMON_PCI_CONFIG_BAR		PCI_BASE_ADDRESS_0
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			|  | 22 | +#define HERMON_PCI_CONFIG_BAR_SIZE	0x100000
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			|  | 23 | +#define HERMON_PCI_UAR_BAR		PCI_BASE_ADDRESS_2
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			|  | 24 | +
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			|  | 25 | +/* Work queue entry and completion queue entry opcodes */
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			|  | 26 | +#define HERMON_OPCODE_SEND		0x0a
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			|  | 27 | +#define HERMON_OPCODE_RECV_ERROR	0xfe
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			|  | 28 | +#define HERMON_OPCODE_SEND_ERROR	0xff
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			|  | 29 | +
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			|  | 30 | +/* HCA command register opcodes */
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			|  | 31 | +#define HERMON_HCR_QUERY_DEV_CAP	0x0003
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			|  | 32 | +#define HERMON_HCR_QUERY_FW		0x0004
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			|  | 33 | +#define HERMON_HCR_INIT_HCA		0x0007
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			|  | 34 | +#define HERMON_HCR_CLOSE_HCA		0x0008
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			|  | 35 | +#define HERMON_HCR_INIT_PORT		0x0009
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			|  | 36 | +#define HERMON_HCR_CLOSE_PORT		0x000a
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			|  | 37 | +#define HERMON_HCR_SW2HW_MPT		0x000d
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			|  | 38 | +#define HERMON_HCR_WRITE_MTT		0x0011
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			|  | 39 | +#define HERMON_HCR_MAP_EQ		0x0012
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			|  | 40 | +#define HERMON_HCR_SW2HW_EQ		0x0013
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			|  | 41 | +#define HERMON_HCR_HW2SW_EQ		0x0014
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			|  | 42 | +#define HERMON_HCR_SW2HW_CQ		0x0016
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			|  | 43 | +#define HERMON_HCR_HW2SW_CQ		0x0017
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			|  | 44 | +#define HERMON_HCR_RST2INIT_QP		0x0019
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			|  | 45 | +#define HERMON_HCR_INIT2RTR_QP		0x001a
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			|  | 46 | +#define HERMON_HCR_RTR2RTS_QP		0x001b
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			|  | 47 | +#define HERMON_HCR_2RST_QP		0x0021
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			|  | 48 | +#define HERMON_HCR_MAD_IFC		0x0024
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			|  | 49 | +#define HERMON_HCR_READ_MCG		0x0025
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			|  | 50 | +#define HERMON_HCR_WRITE_MCG		0x0026
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			|  | 51 | +#define HERMON_HCR_MGID_HASH		0x0027
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			|  | 52 | +#define HERMON_HCR_RUN_FW		0x0ff6
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			|  | 53 | +#define HERMON_HCR_DISABLE_LAM		0x0ff7
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			|  | 54 | +#define HERMON_HCR_ENABLE_LAM		0x0ff8
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			|  | 55 | +#define HERMON_HCR_UNMAP_ICM		0x0ff9
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			|  | 56 | +#define HERMON_HCR_MAP_ICM		0x0ffa
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			|  | 57 | +#define HERMON_HCR_UNMAP_ICM_AUX	0x0ffb
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			|  | 58 | +#define HERMON_HCR_MAP_ICM_AUX		0x0ffc
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			|  | 59 | +#define HERMON_HCR_SET_ICM_SIZE		0x0ffd
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			|  | 60 | +#define HERMON_HCR_UNMAP_FA		0x0ffe
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			|  | 61 | +#define HERMON_HCR_MAP_FA		0x0fff
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			|  | 62 | +
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			|  | 63 | +/* Service types */
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			|  | 64 | +#define HERMON_ST_UD			0x03
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			|  | 65 | +
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			|  | 66 | +/* MTUs */
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			|  | 67 | +#define HERMON_MTU_2048			0x04
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			|  | 68 | +
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			|  | 69 | +#define HERMON_INVALID_LKEY		0x00000100UL
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			|  | 70 | +
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			|  | 71 | +#define HERMON_PAGE_SIZE		4096
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			|  | 72 | +
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			|  | 73 | +#define HERMON_DB_POST_SND_OFFSET	0x14
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			|  | 74 | +
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			|  | 75 | +/*
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			|  | 76 | + * Datatypes that seem to be missing from the autogenerated documentation
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			|  | 77 | + *
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			|  | 78 | + */
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			|  | 79 | +struct hermonprm_mgm_hash_st {
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			|  | 80 | +	pseudo_bit_t reserved0[0x00020];
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			|  | 81 | +/* -------------- */
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			|  | 82 | +	pseudo_bit_t hash[0x00010];
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			|  | 83 | +	pseudo_bit_t reserved1[0x00010];
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			|  | 84 | +} __attribute__ (( packed ));
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			|  | 85 | +
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			|  | 86 | +struct hermonprm_mcg_entry_st {
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			|  | 87 | +	struct hermonprm_mcg_hdr_st hdr;
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			|  | 88 | +	struct hermonprm_mcg_qp_dw_st qp[8];
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			|  | 89 | +} __attribute__ (( packed ));
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			|  | 90 | +
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			|  | 91 | +struct hermonprm_cq_db_record_st {
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			|  | 92 | +	pseudo_bit_t update_ci[0x00018];
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			|  | 93 | +	pseudo_bit_t reserved0[0x00008];
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			|  | 94 | +/* -------------- */
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			|  | 95 | +	pseudo_bit_t arm_ci[0x00018];
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			|  | 96 | +	pseudo_bit_t cmd[0x00003];
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			|  | 97 | +	pseudo_bit_t reserved1[0x00001];
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			|  | 98 | +	pseudo_bit_t cmd_sn[0x00002];
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			|  | 99 | +	pseudo_bit_t reserved2[0x00002];
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			|  | 100 | +} __attribute__ (( packed ));
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			|  | 101 | +
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			|  | 102 | +struct hermonprm_send_db_register_st {
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			|  | 103 | +	pseudo_bit_t reserved[0x00008];
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			|  | 104 | +	pseudo_bit_t qn[0x00018];
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			|  | 105 | +} __attribute__ (( packed ));
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			|  | 106 | +
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			|  | 107 | +struct hermonprm_scalar_parameter_st {
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			|  | 108 | +	pseudo_bit_t value_hi[0x00020];
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			|  | 109 | +/* -------------- */
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			|  | 110 | +	pseudo_bit_t value[0x00020];
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			|  | 111 | +} __attribute__ (( packed ));
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			|  | 112 | +
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			|  | 113 | +/*
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			|  | 114 | + * Wrapper structures for hardware datatypes
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			|  | 115 | + *
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			|  | 116 | + */
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			|  | 117 | +
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			|  | 118 | +struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_context );
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			|  | 119 | +struct MLX_DECLARE_STRUCT ( hermonprm_completion_queue_entry );
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			|  | 120 | +struct MLX_DECLARE_STRUCT ( hermonprm_completion_with_error );
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			|  | 121 | +struct MLX_DECLARE_STRUCT ( hermonprm_cq_db_record );
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			|  | 122 | +struct MLX_DECLARE_STRUCT ( hermonprm_eqc );
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			|  | 123 | +struct MLX_DECLARE_STRUCT ( hermonprm_hca_command_register );
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			|  | 124 | +struct MLX_DECLARE_STRUCT ( hermonprm_init_hca );
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			|  | 125 | +struct MLX_DECLARE_STRUCT ( hermonprm_init_port );
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			|  | 126 | +struct MLX_DECLARE_STRUCT ( hermonprm_mad_ifc );
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			|  | 127 | +struct MLX_DECLARE_STRUCT ( hermonprm_mcg_entry );
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			|  | 128 | +struct MLX_DECLARE_STRUCT ( hermonprm_mgm_hash );
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			|  | 129 | +struct MLX_DECLARE_STRUCT ( hermonprm_mpt );
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			|  | 130 | +struct MLX_DECLARE_STRUCT ( hermonprm_mtt );
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			|  | 131 | +struct MLX_DECLARE_STRUCT ( hermonprm_qp_db_record );
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			|  | 132 | +struct MLX_DECLARE_STRUCT ( hermonprm_qp_ee_state_transitions );
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			|  | 133 | +struct MLX_DECLARE_STRUCT ( hermonprm_query_dev_cap );
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			|  | 134 | +struct MLX_DECLARE_STRUCT ( hermonprm_query_fw );
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			|  | 135 | +struct MLX_DECLARE_STRUCT ( hermonprm_queue_pair_ee_context_entry );
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			|  | 136 | +struct MLX_DECLARE_STRUCT ( hermonprm_scalar_parameter );
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			|  | 137 | +struct MLX_DECLARE_STRUCT ( hermonprm_send_db_register );
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			|  | 138 | +struct MLX_DECLARE_STRUCT ( hermonprm_ud_address_vector );
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			|  | 139 | +struct MLX_DECLARE_STRUCT ( hermonprm_virtual_physical_mapping );
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			|  | 140 | +struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ctrl_send );
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			|  | 141 | +struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_data_ptr );
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			|  | 142 | +struct MLX_DECLARE_STRUCT ( hermonprm_wqe_segment_ud );
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			|  | 143 | +
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			|  | 144 | +/*
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			|  | 145 | + * Composite hardware datatypes
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			|  | 146 | + *
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			|  | 147 | + */
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			|  | 148 | +
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			|  | 149 | +struct hermonprm_write_mtt {
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			|  | 150 | +	struct hermonprm_scalar_parameter mtt_base_addr;
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			|  | 151 | +	struct hermonprm_scalar_parameter reserved;
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			|  | 152 | +	struct hermonprm_mtt mtt;
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			|  | 153 | +} __attribute__ (( packed ));
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			|  | 154 | +
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			|  | 155 | +#define HERMON_MAX_GATHER 1
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			|  | 156 | +
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			|  | 157 | +struct hermonprm_ud_send_wqe {
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			|  | 158 | +	struct hermonprm_wqe_segment_ctrl_send ctrl;
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			|  | 159 | +	struct hermonprm_wqe_segment_ud ud;
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			|  | 160 | +	struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_GATHER];
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			|  | 161 | +} __attribute__ (( packed ));
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			|  | 162 | +
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			|  | 163 | +#define HERMON_MAX_SCATTER 1
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			|  | 164 | +
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			|  | 165 | +struct hermonprm_recv_wqe {
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			|  | 166 | +	struct hermonprm_wqe_segment_data_ptr data[HERMON_MAX_SCATTER];
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			|  | 167 | +} __attribute__ (( packed ));
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			|  | 168 | +
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			|  | 169 | +union hermonprm_completion_entry {
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			|  | 170 | +	struct hermonprm_completion_queue_entry normal;
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			|  | 171 | +	struct hermonprm_completion_with_error error;
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			|  | 172 | +} __attribute__ (( packed ));
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			|  | 173 | +
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			|  | 174 | +union hermonprm_doorbell_register {
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			|  | 175 | +	struct hermonprm_send_db_register send;
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			|  | 176 | +	uint32_t dword[1];
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			|  | 177 | +} __attribute__ (( packed ));
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			|  | 178 | +
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			|  | 179 | +union hermonprm_mad {
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			|  | 180 | +	struct hermonprm_mad_ifc ifc;
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			|  | 181 | +	union ib_mad mad;
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			|  | 182 | +} __attribute__ (( packed ));
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			|  | 183 | +
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			|  | 184 | +/*
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			|  | 185 | + * gPXE-specific definitions
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			|  | 186 | + *
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			|  | 187 | + */
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			|  | 188 | +
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			|  | 189 | +/** Hermon device capabilitiess */
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			|  | 190 | +struct hermon_dev_cap {
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			|  | 191 | +	/** CMPT entry size */
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			|  | 192 | +	size_t cmpt_entry_size;
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			|  | 193 | +	/** Number of reserved QPs */
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			|  | 194 | +	unsigned int reserved_qps;
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			|  | 195 | +	/** QP context entry size */
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			|  | 196 | +	size_t qpc_entry_size;
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			|  | 197 | +	/** Alternate path context entry size */
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			|  | 198 | +	size_t altc_entry_size;
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			|  | 199 | +	/** Auxiliary context entry size */
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			|  | 200 | +	size_t auxc_entry_size;
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			|  | 201 | +	/** Number of reserved SRQs */
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			|  | 202 | +	unsigned int reserved_srqs;
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			|  | 203 | +	/** SRQ context entry size */
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			|  | 204 | +	size_t srqc_entry_size;
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			|  | 205 | +	/** Number of reserved CQs */
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			|  | 206 | +	unsigned int reserved_cqs;
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			|  | 207 | +	/** CQ context entry size */
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			|  | 208 | +	size_t cqc_entry_size;
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			|  | 209 | +	/** Number of reserved EQs */
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			|  | 210 | +	unsigned int reserved_eqs;
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			|  | 211 | +	/** EQ context entry size */
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			|  | 212 | +	size_t eqc_entry_size;
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			|  | 213 | +	/** Number of reserved MTTs */
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			|  | 214 | +	unsigned int reserved_mtts;
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			|  | 215 | +	/** MTT entry size */
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			|  | 216 | +	size_t mtt_entry_size;
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			|  | 217 | +	/** Number of reserved MRWs */
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			|  | 218 | +	unsigned int reserved_mrws;
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			|  | 219 | +	/** DMPT entry size */
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			|  | 220 | +	size_t dmpt_entry_size;
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			|  | 221 | +	/** Number of reserved UARs */
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			|  | 222 | +	unsigned int reserved_uars;
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			|  | 223 | +};
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			|  | 224 | +
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			|  | 225 | +/** Number of cMPT entries of each type */
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			|  | 226 | +#define HERMON_CMPT_MAX_ENTRIES ( 1 << 24 )
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			|  | 227 | +
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			|  | 228 | +/** Hermon ICM memory map entry */
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			|  | 229 | +struct hermon_icm_map {
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			|  | 230 | +	/** Offset (virtual address within ICM) */
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			|  | 231 | +	uint64_t offset;
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			|  | 232 | +	/** Length */
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			|  | 233 | +	size_t len;
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			|  | 234 | +};
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			|  | 235 | +
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			|  | 236 | +/** Discontiguous regions within Hermon ICM */
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			|  | 237 | +enum hermon_icm_map_regions {
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			|  | 238 | +	HERMON_ICM_QP_CMPT = 0,
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			|  | 239 | +	HERMON_ICM_SRQ_CMPT,
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			|  | 240 | +	HERMON_ICM_CQ_CMPT,
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			|  | 241 | +	HERMON_ICM_EQ_CMPT,
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			|  | 242 | +	HERMON_ICM_OTHER,
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			|  | 243 | +	HERMON_ICM_NUM_REGIONS
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			|  | 244 | +};
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			|  | 245 | +
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			|  | 246 | +/** UAR page for doorbell accesses
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			|  | 247 | + *
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			|  | 248 | + * Pages 0-127 are reserved for event queue doorbells only, so we use
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			|  | 249 | + * page 128.
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			|  | 250 | + */
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			|  | 251 | +#define HERMON_UAR_PAGE		128
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			|  | 252 | +
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			|  | 253 | +/** Maximum number of allocatable MTT entries
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			|  | 254 | + *
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			|  | 255 | + * This is a policy decision, not a device limit.
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			|  | 256 | + */
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			|  | 257 | +#define HERMON_MAX_MTTS		64
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			|  | 258 | +
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			|  | 259 | +/** A Hermon MTT descriptor */
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			|  | 260 | +struct hermon_mtt {
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			|  | 261 | +	/** MTT offset */
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			|  | 262 | +	unsigned int mtt_offset;
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			|  | 263 | +	/** Number of pages */
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			|  | 264 | +	unsigned int num_pages;
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			|  | 265 | +	/** MTT base address */
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			|  | 266 | +	unsigned int mtt_base_addr;
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			|  | 267 | +	/** Offset within page */
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			|  | 268 | +	unsigned int page_offset;
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			|  | 269 | +};
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			|  | 270 | +
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			|  | 271 | +/** Alignment of Hermon send work queue entries */
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			|  | 272 | +#define HERMON_SEND_WQE_ALIGN 128
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			|  | 273 | +
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			|  | 274 | +/** A Hermon send work queue entry */
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			|  | 275 | +union hermon_send_wqe {
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			|  | 276 | +	struct hermonprm_ud_send_wqe ud;
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			|  | 277 | +	uint8_t force_align[HERMON_SEND_WQE_ALIGN];
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			|  | 278 | +} __attribute__ (( packed ));
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			|  | 279 | +
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			|  | 280 | +/** A Hermon send work queue */
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			|  | 281 | +struct hermon_send_work_queue {
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			|  | 282 | +	/** Number of work queue entries, including headroom
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			|  | 283 | +	 *
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			|  | 284 | +	 * Hermon requires us to leave unused space within the send
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			|  | 285 | +	 * WQ, so we create a send WQ with more entries than are
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			|  | 286 | +	 * requested in the create_qp() call.
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			|  | 287 | +	 */
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			|  | 288 | +	unsigned int num_wqes;
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			|  | 289 | +	/** Work queue entries */
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			|  | 290 | +	union hermon_send_wqe *wqe;
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			|  | 291 | +	/** Size of work queue */
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			|  | 292 | +	size_t wqe_size;
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			|  | 293 | +};
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			|  | 294 | +
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			|  | 295 | +/** Alignment of Hermon receive work queue entries */
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			|  | 296 | +#define HERMON_RECV_WQE_ALIGN 16
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			|  | 297 | +
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			|  | 298 | +/** A Hermon receive work queue entry */
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			|  | 299 | +union hermon_recv_wqe {
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			|  | 300 | +	struct hermonprm_recv_wqe recv;
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			|  | 301 | +	uint8_t force_align[HERMON_RECV_WQE_ALIGN];
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			|  | 302 | +} __attribute__ (( packed ));
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			|  | 303 | +
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			|  | 304 | +/** A Hermon receive work queue */
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			|  | 305 | +struct hermon_recv_work_queue {
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			|  | 306 | +	/** Work queue entries */
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			|  | 307 | +	union hermon_recv_wqe *wqe;
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			|  | 308 | +	/** Size of work queue */
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			|  | 309 | +	size_t wqe_size;
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			|  | 310 | +	/** Doorbell */
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			|  | 311 | +	struct hermonprm_qp_db_record doorbell __attribute__ (( aligned (4) ));
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			|  | 312 | +};
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			|  | 313 | +
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			|  | 314 | +/** Maximum number of allocatable queue pairs
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			|  | 315 | + *
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			|  | 316 | + * This is a policy decision, not a device limit.
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			|  | 317 | + */
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			|  | 318 | +#define HERMON_MAX_QPS		8
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			|  | 319 | +
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			|  | 320 | +/** Base queue pair number */
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			|  | 321 | +#define HERMON_QPN_BASE 0x550000
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			|  | 322 | +
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			|  | 323 | +/** A Hermon queue pair */
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			|  | 324 | +struct hermon_queue_pair {
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			|  | 325 | +	/** Work queue buffer */
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			|  | 326 | +	void *wqe;
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			|  | 327 | +	/** Size of work queue buffer */
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			|  | 328 | +	size_t wqe_size;
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			|  | 329 | +	/** MTT descriptor */
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			|  | 330 | +	struct hermon_mtt mtt;
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			|  | 331 | +	/** Send work queue */
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			|  | 332 | +	struct hermon_send_work_queue send;
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			|  | 333 | +	/** Receive work queue */
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			|  | 334 | +	struct hermon_recv_work_queue recv;
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			|  | 335 | +};
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			|  | 336 | +
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			|  | 337 | +/** Maximum number of allocatable completion queues
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			|  | 338 | + *
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			|  | 339 | + * This is a policy decision, not a device limit.
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			|  | 340 | + */
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			|  | 341 | +#define HERMON_MAX_CQS		8
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			|  | 342 | +
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			|  | 343 | +/** A Hermon completion queue */
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			|  | 344 | +struct hermon_completion_queue {
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			|  | 345 | +	/** Completion queue entries */
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			|  | 346 | +	union hermonprm_completion_entry *cqe;
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			|  | 347 | +	/** Size of completion queue */
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			|  | 348 | +	size_t cqe_size;
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			|  | 349 | +	/** MTT descriptor */
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			|  | 350 | +	struct hermon_mtt mtt;
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			|  | 351 | +	/** Doorbell */
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			|  | 352 | +	struct hermonprm_cq_db_record doorbell __attribute__ (( aligned (8) ));
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			|  | 353 | +};
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			|  | 354 | +
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			|  | 355 | +/** Maximum number of allocatable event queues
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			|  | 356 | + *
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			|  | 357 | + * This is a policy decision, not a device limit.
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			|  | 358 | + */
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			|  | 359 | +#define HERMON_MAX_EQS		4
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			|  | 360 | +
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			|  | 361 | +/** A Hermon resource bitmask */
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			|  | 362 | +typedef uint32_t hermon_bitmask_t;
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			|  | 363 | +
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			|  | 364 | +/** Size of a hermon resource bitmask */
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			|  | 365 | +#define HERMON_BITMASK_SIZE(max_entries)				     \
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			|  | 366 | +	( ( (max_entries) + ( 8 * sizeof ( hermon_bitmask_t ) ) - 1 ) /	     \
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			|  | 367 | +	  ( 8 * sizeof ( hermon_bitmask_t ) ) )
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			|  | 368 | +
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			|  | 369 | +/** A Hermon device */
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			|  | 370 | +struct hermon {
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			|  | 371 | +	/** PCI configuration registers */
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			|  | 372 | +	void *config;
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			|  | 373 | +	/** PCI user Access Region */
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			|  | 374 | +	void *uar;
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			|  | 375 | +
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			|  | 376 | +	/** Command toggle */
 | 
		
	
		
			
			|  | 377 | +	unsigned int toggle;
 | 
		
	
		
			
			|  | 378 | +	/** Command input mailbox */
 | 
		
	
		
			
			|  | 379 | +	void *mailbox_in;
 | 
		
	
		
			
			|  | 380 | +	/** Command output mailbox */
 | 
		
	
		
			
			|  | 381 | +	void *mailbox_out;
 | 
		
	
		
			
			|  | 382 | +
 | 
		
	
		
			
			|  | 383 | +	/** Firmware area in external memory */
 | 
		
	
		
			
			|  | 384 | +	userptr_t firmware_area;
 | 
		
	
		
			
			|  | 385 | +	/** ICM map */
 | 
		
	
		
			
			|  | 386 | +	struct hermon_icm_map icm_map[HERMON_ICM_NUM_REGIONS];
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			|  | 387 | +	/** ICM area */
 | 
		
	
		
			
			|  | 388 | +	userptr_t icm;
 | 
		
	
		
			
			|  | 389 | +
 | 
		
	
		
			
			|  | 390 | +	/** Reserved LKey
 | 
		
	
		
			
			|  | 391 | +	 *
 | 
		
	
		
			
			|  | 392 | +	 * Used to get unrestricted memory access.
 | 
		
	
		
			
			|  | 393 | +	 */
 | 
		
	
		
			
			|  | 394 | +	unsigned long reserved_lkey;
 | 
		
	
		
			
			|  | 395 | +
 | 
		
	
		
			
			|  | 396 | +	/** Completion queue in-use bitmask */
 | 
		
	
		
			
			|  | 397 | +	hermon_bitmask_t cq_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_CQS ) ];
 | 
		
	
		
			
			|  | 398 | +	/** Queue pair in-use bitmask */
 | 
		
	
		
			
			|  | 399 | +	hermon_bitmask_t qp_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_QPS ) ];
 | 
		
	
		
			
			|  | 400 | +	/** MTT entry in-use bitmask */
 | 
		
	
		
			
			|  | 401 | +	hermon_bitmask_t mtt_inuse[ HERMON_BITMASK_SIZE ( HERMON_MAX_MTTS ) ];
 | 
		
	
		
			
			|  | 402 | +
 | 
		
	
		
			
			|  | 403 | +	/** Device capabilities */
 | 
		
	
		
			
			|  | 404 | +	struct hermon_dev_cap cap;
 | 
		
	
		
			
			|  | 405 | +};
 | 
		
	
		
			
			|  | 406 | +
 | 
		
	
		
			
			|  | 407 | +/** Global protection domain */
 | 
		
	
		
			
			|  | 408 | +#define HERMON_GLOBAL_PD		0x123456
 | 
		
	
		
			
			|  | 409 | +
 | 
		
	
		
			
			|  | 410 | +/** Memory key prefix */
 | 
		
	
		
			
			|  | 411 | +#define HERMON_MKEY_PREFIX		0x77000000UL
 | 
		
	
		
			
			|  | 412 | +
 | 
		
	
		
			
			|  | 413 | +/*
 | 
		
	
		
			
			|  | 414 | + * HCA commands
 | 
		
	
		
			
			|  | 415 | + *
 | 
		
	
		
			
			|  | 416 | + */
 | 
		
	
		
			
			|  | 417 | +
 | 
		
	
		
			
			|  | 418 | +#define HERMON_HCR_BASE			0x80680
 | 
		
	
		
			
			|  | 419 | +#define HERMON_HCR_REG(x)		( HERMON_HCR_BASE + 4 * (x) )
 | 
		
	
		
			
			|  | 420 | +#define HERMON_HCR_MAX_WAIT_MS		2000
 | 
		
	
		
			
			|  | 421 | +#define HERMON_MBOX_ALIGN		4096
 | 
		
	
		
			
			|  | 422 | +#define HERMON_MBOX_SIZE		512
 | 
		
	
		
			
			|  | 423 | +
 | 
		
	
		
			
			|  | 424 | +/* HCA command is split into
 | 
		
	
		
			
			|  | 425 | + *
 | 
		
	
		
			
			|  | 426 | + * bits  11:0	Opcode
 | 
		
	
		
			
			|  | 427 | + * bit     12	Input uses mailbox
 | 
		
	
		
			
			|  | 428 | + * bit     13	Output uses mailbox
 | 
		
	
		
			
			|  | 429 | + * bits 22:14	Input parameter length (in dwords)
 | 
		
	
		
			
			|  | 430 | + * bits 31:23	Output parameter length (in dwords)
 | 
		
	
		
			
			|  | 431 | + *
 | 
		
	
		
			
			|  | 432 | + * Encoding the information in this way allows us to cut out several
 | 
		
	
		
			
			|  | 433 | + * parameters to the hermon_command() call.
 | 
		
	
		
			
			|  | 434 | + */
 | 
		
	
		
			
			|  | 435 | +#define HERMON_HCR_IN_MBOX		0x00001000UL
 | 
		
	
		
			
			|  | 436 | +#define HERMON_HCR_OUT_MBOX		0x00002000UL
 | 
		
	
		
			
			|  | 437 | +#define HERMON_HCR_OPCODE( _command )	( (_command) & 0xfff )
 | 
		
	
		
			
			|  | 438 | +#define HERMON_HCR_IN_LEN( _command )	( ( (_command) >> 12 ) & 0x7fc )
 | 
		
	
		
			
			|  | 439 | +#define HERMON_HCR_OUT_LEN( _command )	( ( (_command) >> 21 ) & 0x7fc )
 | 
		
	
		
			
			|  | 440 | +
 | 
		
	
		
			
			|  | 441 | +/** Build HCR command from component parts */
 | 
		
	
		
			
			|  | 442 | +#define HERMON_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len,		     \
 | 
		
	
		
			
			|  | 443 | +			     _out_mbox, _out_len )			     \
 | 
		
	
		
			
			|  | 444 | +	( (_opcode) |							     \
 | 
		
	
		
			
			|  | 445 | +	  ( (_in_mbox) ? HERMON_HCR_IN_MBOX : 0 ) |			     \
 | 
		
	
		
			
			|  | 446 | +	  ( ( (_in_len) / 4 ) << 14 ) |					     \
 | 
		
	
		
			
			|  | 447 | +	  ( (_out_mbox) ? HERMON_HCR_OUT_MBOX : 0 ) |			     \
 | 
		
	
		
			
			|  | 448 | +	  ( ( (_out_len) / 4 ) << 23 ) )
 | 
		
	
		
			
			|  | 449 | +
 | 
		
	
		
			
			|  | 450 | +#define HERMON_HCR_IN_CMD( _opcode, _in_mbox, _in_len )			     \
 | 
		
	
		
			
			|  | 451 | +	HERMON_HCR_INOUT_CMD ( _opcode, _in_mbox, _in_len, 0, 0 )
 | 
		
	
		
			
			|  | 452 | +
 | 
		
	
		
			
			|  | 453 | +#define HERMON_HCR_OUT_CMD( _opcode, _out_mbox, _out_len )		     \
 | 
		
	
		
			
			|  | 454 | +	HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, _out_mbox, _out_len )
 | 
		
	
		
			
			|  | 455 | +
 | 
		
	
		
			
			|  | 456 | +#define HERMON_HCR_VOID_CMD( _opcode )					     \
 | 
		
	
		
			
			|  | 457 | +	HERMON_HCR_INOUT_CMD ( _opcode, 0, 0, 0, 0 )
 | 
		
	
		
			
			|  | 458 | +
 | 
		
	
		
			
			|  | 459 | +#endif /* _HERMON_H */
 |