[GDB] Zero-extend 16-bit segment registers

When the 16-bit segment registers are accessed using 32-bit instructions
the high order bytes are undefined on older CPUs.  We now explicitly
zero the high order bytes when snapshotting the CPU state.  This ensures
that the GDB stub reports consistent values for the segment registers.

src/arch/i386/core/gdbidt.S

@@ -163,12 +163,18 @@ int_page_fault:
 #define IH_OFFSET_FLUX_END ( IH_OFFSET_END - 20 )
 do_interrupt:
 	/* Store CPU state in GDB register snapshot */
-	pushl	%gs
-	pushl	%fs
-	pushl	%es
-	pushl	%ds
-	pushl	%ss
-	pushl	IH_OFFSET_FLUX_OLD_CS(%esp)
+	pushw	$0
+	pushw	%gs
+	pushw	$0
+	pushw	%fs
+	pushw	$0
+	pushw	%es
+	pushw	$0
+	pushw	%ds
+	pushw	$0
+	pushw	%ss
+	pushw	$0
+	pushw	IH_OFFSET_FLUX_OLD_CS + 2(%esp)
 	pushl	IH_OFFSET_FLUX_OLD_EFLAGS(%esp)
 	pushl	IH_OFFSET_FLUX_OLD_EIP(%esp)
 	pushl	%edi

src/tests/gdbstub_test.gdb

@@ -81,13 +81,13 @@ define gpxe_test_awatch
 	awatch watch_me
 
 	c
-	gpxe_assert $ecx 0x600d0000 "gpxe_test_awatch"
+	gpxe_assert $ecx 0x600d0000 "gpxe_test_awatch read"
 	if $ecx == 0x600d0000
 		c
 	end
 
 	c
-	gpxe_assert $ecx 0x600d0001 "gpxe_test_awatch"
+	gpxe_assert $ecx 0x600d0001 "gpxe_test_awatch write"
 	if $ecx == 0x600d0001
 		c
 	end