Merge from Etherboot 5.4

src/drivers/net/mlx_ipoib/MT23108_PRM_append.h

@@ -0,0 +1,199 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+/***
+ *** This file was generated at "Tue Nov 16 17:03:53 2004"
+ *** by:
+ ***    % csp_bf -copyright=/mswg/misc/license-header.txt -bits MT23108_PRM_append.csp
+ ***/
+
+#ifndef H_bits_MT23108_PRM_append_csp_H
+#define H_bits_MT23108_PRM_append_csp_H
+
+
+/* Gather entry with inline data */
+
+struct wqe_segment_data_inline_st {	/* Little Endian */
+    pseudo_bit_t	byte_count[0x0000a];   /* Not including padding for 16Byte chunks */
+    pseudo_bit_t	reserved0[0x00015];
+    pseudo_bit_t	always1[0x00001];
+/* -------------- */
+    pseudo_bit_t	data[0x00020];         /* Data may be more this segment size - in 16Byte chunks */
+/* -------------- */
+}; 
+
+/* Scatter/Gather entry with a pointer */
+
+struct wqe_segment_data_ptr_st {	/* Little Endian */
+    pseudo_bit_t	byte_count[0x0001f];
+    pseudo_bit_t	always0[0x00001];
+/* -------------- */
+    pseudo_bit_t	l_key[0x00020];
+/* -------------- */
+    pseudo_bit_t	local_address_h[0x00020];
+/* -------------- */
+    pseudo_bit_t	local_address_l[0x00020];
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_atomic_st {	/* Little Endian */
+    pseudo_bit_t	swap_add_h[0x00020];
+/* -------------- */
+    pseudo_bit_t	swap_add_l[0x00020];
+/* -------------- */
+    pseudo_bit_t	compare_h[0x00020];
+/* -------------- */
+    pseudo_bit_t	compare_l[0x00020];
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_remote_address_st {	/* Little Endian */
+    pseudo_bit_t	remote_virt_addr_h[0x00020];
+/* -------------- */
+    pseudo_bit_t	remote_virt_addr_l[0x00020];
+/* -------------- */
+    pseudo_bit_t	rkey[0x00020];
+/* -------------- */
+    pseudo_bit_t	reserved0[0x00020];
+/* -------------- */
+}; 
+
+/* Bind memory window segment */
+
+struct wqe_segment_bind_st {	/* Little Endian */
+    pseudo_bit_t	reserved0[0x0001d];
+    pseudo_bit_t	rr[0x00001];           /* Remote read */
+    pseudo_bit_t	rw[0x00001];           /* Remote write */
+    pseudo_bit_t	a[0x00001];            /* atomic */
+/* -------------- */
+    pseudo_bit_t	reserved1[0x00020];
+/* -------------- */
+    pseudo_bit_t	new_rkey[0x00020];
+/* -------------- */
+    pseudo_bit_t	region_lkey[0x00020];
+/* -------------- */
+    pseudo_bit_t	start_address_h[0x00020];
+/* -------------- */
+    pseudo_bit_t	start_address_l[0x00020];
+/* -------------- */
+    pseudo_bit_t	length_h[0x00020];
+/* -------------- */
+    pseudo_bit_t	length_l[0x00020];
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_ud_st {	/* Little Endian */
+    pseudo_bit_t	reserved0[0x00020];
+/* -------------- */
+    pseudo_bit_t	l_key[0x00020];        /* memory key for UD AV */
+/* -------------- */
+    pseudo_bit_t	av_address_63_32[0x00020];
+/* -------------- */
+    pseudo_bit_t	reserved1[0x00005];
+    pseudo_bit_t	av_address_31_5[0x0001b];
+/* -------------- */
+    pseudo_bit_t	reserved2[0x00080];
+/* -------------- */
+    pseudo_bit_t	destination_qp[0x00018];
+    pseudo_bit_t	reserved3[0x00008];
+/* -------------- */
+    pseudo_bit_t	q_key[0x00020];
+/* -------------- */
+    pseudo_bit_t	reserved4[0x00040];
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_rd_st {	/* Little Endian */
+    pseudo_bit_t	destination_qp[0x00018];
+    pseudo_bit_t	reserved0[0x00008];
+/* -------------- */
+    pseudo_bit_t	q_key[0x00020];
+/* -------------- */
+    pseudo_bit_t	reserved1[0x00040];
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_ctrl_recv_st {	/* Little Endian */
+    pseudo_bit_t	reserved0[0x00002];
+    pseudo_bit_t	e[0x00001];            /* WQE event */
+    pseudo_bit_t	c[0x00001];            /* Create CQE (for "requested signalling" QP) */
+    pseudo_bit_t	reserved1[0x0001c];
+/* -------------- */
+    pseudo_bit_t	reserved2[0x00020];
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_ctrl_mlx_st {	/* Little Endian */
+    pseudo_bit_t	reserved0[0x00002];
+    pseudo_bit_t	e[0x00001];            /* WQE event */
+    pseudo_bit_t	c[0x00001];            /* Create CQE (for "requested signalling" QP) */
+    pseudo_bit_t	reserved1[0x00004];
+    pseudo_bit_t	sl[0x00004];
+    pseudo_bit_t	max_statrate[0x00003];
+    pseudo_bit_t	reserved2[0x00001];
+    pseudo_bit_t	slr[0x00001];          /* 0= take slid from port. 1= take slid from given headers */
+    pseudo_bit_t	v15[0x00001];          /* Send packet over VL15 */
+    pseudo_bit_t	reserved3[0x0000e];
+/* -------------- */
+    pseudo_bit_t	vcrc[0x00010];         /* Packet's VCRC (if not 0 - otherwise computed by HW) */
+    pseudo_bit_t	rlid[0x00010];         /* Destination LID (must match given headers) */
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_ctrl_send_st {	/* Little Endian */
+    pseudo_bit_t	always1[0x00001];
+    pseudo_bit_t	s[0x00001];            /* Solicited event */
+    pseudo_bit_t	e[0x00001];            /* WQE event */
+    pseudo_bit_t	c[0x00001];            /* Create CQE (for "requested signalling" QP) */
+    pseudo_bit_t	reserved0[0x0001c];
+/* -------------- */
+    pseudo_bit_t	immediate[0x00020];
+/* -------------- */
+}; 
+
+/*  */
+
+struct wqe_segment_next_st {	/* Little Endian */
+    pseudo_bit_t	nopcode[0x00005];      /* next opcode */
+    pseudo_bit_t	reserved0[0x00001];
+    pseudo_bit_t	nda_31_6[0x0001a];     /* NDA[31:6] */
+/* -------------- */
+    pseudo_bit_t	nds[0x00006];
+    pseudo_bit_t	f[0x00001];            /* fence bit */
+    pseudo_bit_t	dbd[0x00001];          /* doorbell rung */
+    pseudo_bit_t	nee[0x00018];          /* next EE */
+/* -------------- */
+}; 
+#endif /* H_bits_MT23108_PRM_append_csp_H */

src/drivers/net/mlx_ipoib/bit_ops.h

@@ -0,0 +1,126 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __bit_ops_h__
+#define __bit_ops_h__
+
+typedef unsigned long MT_offset_t;
+typedef unsigned long MT_size_t;
+typedef unsigned char pseudo_bit_t;
+struct addr_64_st {
+	__u32 addr_l;
+	__u32 addr_h;
+};
+
+#define MT_BIT_OFFSET(object_struct,reg_path) \
+    ((MT_offset_t) &( ((struct object_struct *)(0))-> reg_path ))
+
+#define MT_BIT_SIZE(object_struct,reg_path) \
+    ((MT_size_t) sizeof( ((struct object_struct *)(0))-> reg_path ))
+
+#define MT_BIT_OFFSET_SIZE(object_struct,reg_path) \
+    MT_BIT_OFFSET(object_struct,reg_path),MT_BIT_SIZE(object_struct,reg_path)
+
+#define MT_BYTE_OFFSET(object_struct,reg_path) \
+    ((MT_offset_t) (MT_BIT_OFFSET(object_struct,reg_path)/8))
+
+#define MT_BYTE_SIZE(object_struct,reg_path) \
+    ((MT_size_t) MT_BIT_SIZE(object_struct,reg_path)/8)
+
+#define MT_BYTE_OFFSET_SIZE(object_struct,reg_path) \
+    MT_BYTE_OFFSET(object_struct,reg_path),MT_BYTE_SIZE(object_struct,reg_path)
+
+#define MT_STRUCT_SIZE(object_struct) (sizeof(struct object_struct) >> 3)
+
+/*****************************************************************************************
+ * Bit manipulation macros
+ *****************************************************************************************/
+
+/* MASK generate a bit mask S bits width */
+#define MASK32(S)         ( ((__u32) ~0L) >> (32-(S)) )
+
+/*
+ * BITS generate a bit mask with bits O+S..O set (assumes 32 bit integer).
+ *      numbering bits as following:    31........................76543210
+ */
+#define BITS32(O,S)       ( MASK32(S) << (O) )
+
+/* 
+ * MT_EXTRACT32 macro extracts S bits from (__u32)W with offset O 
+ *  and shifts them O places to the right (right justifies the field extracted).
+ */
+#define MT_EXTRACT32(W,O,S)  ( ((W)>>(O)) & MASK32(S) )
+
+/*
+ * MT_INSERT32 macro inserts S bits with offset O from field F into word W (__u32)
+ */
+#define MT_INSERT32(W,F,O,S) ((W)= ( ( (W) & (~BITS32(O,S)) ) | (((F) & MASK32(S))<<(O)) ))
+
+/*
+ * MT_EXTRACT_ARRAY32 macro is similar to EXTRACT but works on an array of (__u32),
+ * thus offset may be larger than 32 (but not size).
+ */
+#define MT_EXTRACT_ARRAY32(A,O,S) MT_EXTRACT32(((__u32*)A)[O >> 5],(O & MASK32(5)),S)
+
+/*
+ * MT_INSERT_ARRAY32 macro is similar to INSERT but works on an array of (__u32),
+ * thus offset may be larger than 32 (but not size).
+ */
+#define MT_INSERT_ARRAY32(A,F,O,S) MT_INSERT32(((__u32*)A)[O >> 5],F,(O & MASK32(5)),S)
+
+#define INS_FLD(src, a, st, fld) MT_INSERT_ARRAY32(a, src, MT_BIT_OFFSET(st, fld), MT_BIT_SIZE(st, fld))
+
+#define EX_FLD(a, st, fld) MT_EXTRACT_ARRAY32(a, MT_BIT_OFFSET(st, fld), MT_BIT_SIZE(st, fld))
+
+/* return the address of the dword holding the field 
+
+	buf = pointer to buffer where to place the value
+	st = struct describing the buffer
+	fld = field in the struct where to insert the value */
+
+#define FLD_DW_ADDR(buf, st, fld) ((__u32 *)((__u32 *)(buf)+(((__u32)(&(((struct st *)(0))->fld))) >> 5)))
+
+/*
+	val = value to insert
+	buf = pointer to buffer where to place the value
+	st = struct describing the buffer
+	fld = field in the struct where to insert the value */
+
+#define INS_FLD_TO_BE(val, buf, st, fld) \
+	do { \
+		*FLD_DW_ADDR(buf, st, fld) = be32_to_cpu(*FLD_DW_ADDR(buf, st, fld)); \
+		INS_FLD(val, buf, st, fld); \
+		*FLD_DW_ADDR(buf, st, fld) = cpu_to_be32(*FLD_DW_ADDR(buf, st, fld)); \
+	} \
+	while(0)
+
+#define EX_FLD_FROM_BE(buf, st, fld, type) \
+({ \
+	type field; \
+				 \
+	*FLD_DW_ADDR(buf, st, fld) = be32_to_cpu(*FLD_DW_ADDR(buf, st, fld)); \
+	field= EX_FLD(buf, st, fld); \
+	*FLD_DW_ADDR(buf, st, fld) = cpu_to_be32(*FLD_DW_ADDR(buf, st, fld)); \
+																		  \
+	field; \
+})
+
+#endif				/* __bit_ops_h__ */

src/drivers/net/mlx_ipoib/cmdif.h

@@ -0,0 +1,50 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __cmdif_h_
+#define __cmdif_h_
+
+#include "ib_mad.h"
+
+static int cmd_init_hca(__u32 * inprm, __u32 in_prm_size);
+static int cmd_close_hca(int panic);
+static int cmd_sw2hw_eq(__u32 inprm_sz);
+static int cmd_hw2sw_eq(__u8 eqn);
+static int cmd_map_eq(__u8 eqn, __u32 mask, int map);
+static int cmd_sw2hw_mpt(__u32 * lkey, __u32 in_key, __u32 * inprm,
+			 __u32 inprm_sz);
+static int cmd_hw2sw_mpt(__u32 key);
+static int cmd_init_ib(__u32 port, __u32 * inprm, __u32 inprm_sz);
+static int cmd_close_ib(__u32 port);
+static int cmd_sw2hw_cq(__u32 cqn, __u32 * inprm, __u32 inprm_sz);
+static int cmd_hw2sw_cq(__u32 cqn);
+static int cmd_rst2init_qpee(__u32 qpn, __u32 * inprm, __u32 inprm_sz);
+static int cmd_init2rtr_qpee(__u32 qpn, __u32 * inprm, __u32 inprm_sz);
+static int cmd_rtr2rts_qpee(__u32 qpn, __u32 * inprm, __u32 inprm_sz);
+static int cmd_2rst_qpee(__u32 qpn);
+static int cmd_2err_qpee(__u32 qpn);
+static int cmd_post_doorbell(void *inprm, __u32 offset);
+static int cmd_mad_ifc(void *inprm, struct ib_mad_st *mad, __u8 port);
+static int cmd_write_mgm( /*struct mg_member_layout_st */ void *mg,
+			 __u16 index);
+static int cmd_mgid_hash(__u8 * gid, __u16 * mgid_hash_p);
+
+#endif				/* __cmdif_h_ */

src/drivers/net/mlx_ipoib/cmdif_comm.c

@@ -0,0 +1,564 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#include "cmdif.h"
+#include "cmdif_comm.h"
+#include "cmdif_priv.h"
+
+static int cmdif_is_free(int *is_free)
+{
+	int rc;
+	__u32 result;
+
+	rc = gw_read_cr(HCR_OFFSET_GO, &result);
+	if (rc) {
+		eprintf("");
+		return rc;
+	}
+	*is_free = (result & 0x800000) == 0;
+
+	return 0;
+}
+
+static void edit_hcr(command_fields_t * cmd_prms, __u32 * buf)
+{
+	unsigned int i;
+
+	switch (cmd_prms->in_trans) {
+	case TRANS_NA:
+		/* note! since these are zeroes I do not bother to deal with endianess */
+		buf[0] = 0;
+		buf[1] = 0;
+		break;
+
+	case TRANS_IMMEDIATE:
+		buf[0] = cmd_prms->in_param[0];
+		buf[1] = cmd_prms->in_param[1];
+		break;
+
+	case TRANS_MAILBOX:
+		buf[0] = 0;
+		buf[1] = virt_to_bus(cmd_prms->in_param);
+
+		for (i = 0; i < cmd_prms->in_param_size; i += 4)
+			cmd_prms->in_param[i >> 2] =
+			    cpu_to_be32(cmd_prms->in_param[i >> 2]);
+		break;
+	}
+
+	buf[2] = cmd_prms->input_modifier;
+
+	switch (cmd_prms->out_trans) {
+	case TRANS_NA:
+		/* note! since these are zeroes I do not bother to deal with endianess */
+		buf[3] = 0;
+		buf[4] = 0;
+		break;
+
+	case TRANS_IMMEDIATE:
+		break;
+	case TRANS_MAILBOX:
+		buf[3] = 0;
+		buf[4] = virt_to_bus(cmd_prms->out_param);
+		break;
+	}
+
+	buf[5] = 0;		/* token is always 0 */
+	buf[6] = cmd_prms->opcode |	/* opcode */
+	    0x800000 |		/* go bit */
+	    ((cmd_prms->opcode_modifier & 0xf) << 12);	/* opcode modifier 
+*/ }
+
+static int wait_cmdif_free(void)
+{
+	int ret, is_free;
+	unsigned int i, relax_time = 1, max_time = 5000;
+
+	/* wait until go bit is free */
+	for (i = 0; i < max_time; i += relax_time) {
+		ret = cmdif_is_free(&is_free);
+		if (ret)
+			return ret;
+		if (is_free)
+			break;
+		mdelay(relax_time);
+	}
+	if (i >= max_time)
+		return -1;
+	return 0;
+}
+
+static XHH_cmd_status_t cmd_invoke(command_fields_t * cmd_prms)
+{
+	int ret, is_free, i;
+	__u32 hcr[7], data;
+	__u8 status;
+
+	/* check if go bit is free */
+	ret = cmdif_is_free(&is_free);
+	if (ret) {
+		eprintf("");
+		return -1;
+	}
+
+	__asm__ __volatile__("":::"memory");
+	/* it must be free */
+	if (!is_free) {
+		eprintf("");
+		return -1;
+	}
+	__asm__ __volatile__("":::"memory");
+	edit_hcr(cmd_prms, hcr);
+	__asm__ __volatile__("":::"memory");
+
+	for (i = 0; i < 7; ++i) {
+		ret = gw_write_cr(HCR_BASE + i * 4, hcr[i]);
+		if (ret) {
+			eprintf("");
+			return -1;
+		}
+	}
+
+	__asm__ __volatile__("":::"memory");
+	/* wait for completion */
+	ret = wait_cmdif_free();
+	if (ret) {
+		eprintf("");
+		return -1;
+	}
+
+	__asm__ __volatile__("":::"memory");
+	ret = gw_read_cr(HCR_OFFSET_STATUS, &data);
+	if (ret) {
+		eprintf("");
+		return -1;
+	}
+
+	status = data >> 24;
+
+	if (status) {
+		tprintf("status=0x%x", status);
+		return status;
+	}
+
+	if (cmd_prms->out_trans == TRANS_MAILBOX)
+		be_to_cpu_buf(cmd_prms->out_param, cmd_prms->out_param_size);
+	else if (cmd_prms->out_trans == TRANS_IMMEDIATE) {
+		if (gw_read_cr(HCR_OFFSET_OUTPRM_H, &cmd_prms->out_param[0]))
+			return -1;
+		if (gw_read_cr(HCR_OFFSET_OUTPRM_L, &cmd_prms->out_param[1]))
+			return -1;
+	}
+
+	return 0;
+}
+
+/*************************************************
+					commands
+*************************************************/
+
+/*
+ *  cmd_close_hca
+ */
+static int cmd_close_hca(int panic)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_CLOSE_HCA;
+	cmd_desc.opcode_modifier= panic;
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_init_hca
+ */
+static int cmd_init_hca(__u32 * inprm, __u32 in_prm_size)
+{
+	int rc;
+
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.opcode = XDEV_CMD_INIT_HCA;
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = in_prm_size;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_sw2hw_eq
+ */
+static int cmd_sw2hw_eq(__u32 inprm_sz)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	void *inprm;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	inprm = get_inprm_buf();
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.opcode = XDEV_CMD_SW2HW_EQ;
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = inprm_sz;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_hw2sw_eq
+ */
+static int cmd_hw2sw_eq(__u8 eqn)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	void *outprm;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	outprm = get_outprm_buf();
+	cmd_desc.opcode = XDEV_CMD_HW2SW_EQ;
+	cmd_desc.input_modifier = eqn;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = outprm;
+	cmd_desc.out_param_size = 0x40;
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_map_eq
+ */
+static int cmd_map_eq(__u8 eqn, __u32 mask, int map)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	__u32 *inprm;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	inprm = get_inprm_buf();
+
+	inprm[1] = mask;
+	inprm[0] = 0;
+
+	cmd_desc.opcode = XDEV_CMD_MAP_EQ;
+	cmd_desc.in_trans = TRANS_IMMEDIATE;
+	cmd_desc.in_param = inprm;
+	cmd_desc.input_modifier = ((map ? 0 : 1) << 31) | eqn;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_sw2hw_mpt
+ */
+static int cmd_sw2hw_mpt(__u32 * lkey, __u32 in_key, __u32 * inprm,
+			 __u32 inprm_sz)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.opcode = XDEV_CMD_SW2HW_MPT;
+	cmd_desc.input_modifier = in_key & MKEY_IDX_MASK;	/* only one MR for the whole driver */
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = inprm_sz;
+
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc)
+		*lkey = in_key;
+
+	return rc;
+}
+
+/*
+ *  cmd_hw2sw_mpt
+ */
+static int cmd_hw2sw_mpt(__u32 key)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_HW2SW_MPT;
+	cmd_desc.input_modifier = key & MKEY_IDX_MASK;
+	cmd_desc.opcode_modifier = 1;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_init_ib
+ */
+static int cmd_init_ib(__u32 port, __u32 * inprm, __u32 inprm_sz)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_INIT_IB;
+	cmd_desc.input_modifier = port;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = inprm_sz;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_close_ib
+ */
+static int cmd_close_ib(__u32 port)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_CLOSE_IB;
+	cmd_desc.input_modifier = port;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_sw2hw_cq
+ */
+static int cmd_sw2hw_cq(__u32 cqn, __u32 * inprm, __u32 inprm_sz)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_SW2HW_CQ;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = inprm_sz;
+	cmd_desc.input_modifier = cqn;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_hw2sw_cq
+ */
+static int cmd_hw2sw_cq(__u32 cqn)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_HW2SW_CQ;
+	cmd_desc.input_modifier = cqn;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_rst2init_qpee
+ */
+static int cmd_rst2init_qpee(__u32 qpn, __u32 * inprm, __u32 inprm_sz)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_RST2INIT_QPEE;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = inprm_sz;
+	cmd_desc.input_modifier = qpn;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_init2rtr_qpee
+ */
+static int cmd_init2rtr_qpee(__u32 qpn, __u32 * inprm, __u32 inprm_sz)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_INIT2RTR_QPEE;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = inprm_sz;
+	cmd_desc.input_modifier = qpn;;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_rtr2rts_qpee
+ */
+static int cmd_rtr2rts_qpee(__u32 qpn, __u32 * inprm, __u32 inprm_sz)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_RTR2RTS_QPEE;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = inprm;
+	cmd_desc.in_param_size = inprm_sz;
+	cmd_desc.input_modifier = qpn;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_2rst_qpee
+ */
+static int cmd_2rst_qpee(__u32 qpn)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_ERR2RST_QPEE;
+	cmd_desc.opcode_modifier = 0;
+	cmd_desc.input_modifier = qpn;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_2err_qpee
+ */
+static int cmd_2err_qpee(__u32 qpn)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_2ERR_QPEE;
+	cmd_desc.input_modifier = qpn;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_post_doorbell
+ */
+static int cmd_post_doorbell(void *inprm, __u32 offset)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_POST_DOORBELL;
+	cmd_desc.in_trans = TRANS_IMMEDIATE;
+	cmd_desc.in_param = inprm;
+	cmd_desc.input_modifier = offset;
+	if (0) {
+		rc = cmd_invoke(&cmd_desc);
+	} else {
+		dev_post_dbell(inprm, offset);
+		rc = 0;
+	}
+
+	return rc;
+}
+
+static int cmd_mad_ifc(void *inprm, struct ib_mad_st *mad, __u8 port)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = XDEV_CMD_MAD_IFC;
+	cmd_desc.opcode_modifier = 1;	/* no mkey/bkey validation */
+	cmd_desc.input_modifier = port;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param_size = 256;
+	cmd_desc.in_param = (__u32 *) inprm;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = (__u32 *) mad;
+	cmd_desc.out_param_size = 256;
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+static int cmd_mgid_hash(__u8 * gid, __u16 * mgid_hash_p)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	__u16 result[2];
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = XDEV_CMD_MGID_HASH;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = (__u32 *) gid;
+	cmd_desc.in_param_size = 16;
+	cmd_desc.out_trans = TRANS_IMMEDIATE;
+
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc) {
+		rc = gw_read_cr(HCR_BASE + 16, (__u32 *) result);
+		if (!rc) {
+			*mgid_hash_p = result[0];
+		}
+	}
+
+	return rc;
+}

src/drivers/net/mlx_ipoib/cmdif_comm.h

@@ -0,0 +1,60 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __cmdif_comm_h__
+#define __cmdif_comm_h__
+
+  /* initialization and general commands */
+#define XDEV_CMD_INIT_HCA			0x7
+#define XDEV_CMD_CLOSE_HCA			0x8
+#define XDEV_CMD_INIT_IB				0x9
+#define XDEV_CMD_CLOSE_IB			0xa
+
+  /* TPT commands */
+#define XDEV_CMD_SW2HW_MPT			0xd
+#define	XDEV_CMD_HW2SW_MPT			0xf
+
+  /* EQ commands */
+#define XDEV_CMD_MAP_EQ				0x12
+#define XDEV_CMD_SW2HW_EQ			0x13
+#define XDEV_CMD_HW2SW_EQ			0x14
+
+  /* CQ commands */
+#define XDEV_CMD_SW2HW_CQ			0x16
+#define	XDEV_CMD_HW2SW_CQ			0x17
+
+  /* QP/EE commands */
+#define	XDEV_CMD_RST2INIT_QPEE		0x19
+#define XDEV_CMD_INIT2RTR_QPEE		0x1a
+#define XDEV_CMD_RTR2RTS_QPEE		0x1b
+#define XDEV_CMD_2ERR_QPEE			0x1e
+#define XDEV_CMD_ERR2RST_QPEE		0x21
+
+  /* special QPs and management commands */
+#define XDEV_CMD_MAD_IFC				0x24
+
+  /* multicast commands */
+#define XDEV_CMD_READ_MGM			0x25
+#define XDEV_CMD_MGID_HASH			0x27
+
+#define XDEV_CMD_POST_DOORBELL		0x41
+
+#endif				/* __cmdif_comm_h__ */

src/drivers/net/mlx_ipoib/cmdif_mt23108.c

@@ -0,0 +1,193 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+#include "cmdif.h"
+#include "cmdif_priv.h"
+#include "mt23108.h"
+
+/*
+ *  cmd_sys_en
+ */
+static int cmd_sys_en(void)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = TAVOR_CMD_SYS_EN;
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_sys_dis
+ */
+static int cmd_sys_dis(void)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.in_trans = TRANS_NA;
+	cmd_desc.out_trans = TRANS_NA;
+	cmd_desc.opcode = TAVOR_CMD_SYS_DIS;
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_query_dev_lim
+ */
+static int cmd_query_dev_lim(struct dev_lim_st *dev_lim_p)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = TAVOR_CMD_QUERY_DEV_LIM;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+	cmd_desc.out_param_size = MT_STRUCT_SIZE(tavorprm_query_dev_lim_st);
+
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc) {
+		dev_lim_p->log2_rsvd_qps =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   log2_rsvd_qps);
+		dev_lim_p->qpc_entry_sz =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   qpc_entry_sz);
+
+		dev_lim_p->log2_rsvd_srqs =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   log2_rsvd_srqs);
+		dev_lim_p->srq_entry_sz =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   srq_entry_sz);
+
+		dev_lim_p->log2_rsvd_ees =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   log2_rsvd_ees);
+		dev_lim_p->eec_entry_sz =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   eec_entry_sz);
+
+		dev_lim_p->log2_rsvd_cqs =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   log2_rsvd_cqs);
+		dev_lim_p->cqc_entry_sz =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   cqc_entry_sz);
+
+		dev_lim_p->log2_rsvd_mtts =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   log2_rsvd_mtts);
+		dev_lim_p->mtt_entry_sz = 64;	/* segment size is set to zero in init_hca */
+
+		dev_lim_p->log2_rsvd_mrws =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   log2_rsvd_mrws);
+		dev_lim_p->mpt_entry_sz = MT_STRUCT_SIZE(tavorprm_mpt_st);
+
+		dev_lim_p->eqc_entry_sz =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_dev_lim_st,
+			   eqc_entry_sz);
+	}
+
+	return rc;
+}
+
+/*
+ *  cmd_write_mgm
+ */
+static int cmd_write_mgm(void *mg, __u16 index)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = TAVOR_CMD_WRITE_MGM;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param_size = MT_STRUCT_SIZE(tavorprm_mgm_entry_st);
+	cmd_desc.in_param = (__u32 *) mg;
+	cmd_desc.input_modifier = index;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_mod_stat_cfg
+ */
+static int cmd_mod_stat_cfg(void *cfg)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = TAVOR_CMD_MOD_STAT_CFG;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param_size = MT_STRUCT_SIZE(tavorprm_mod_stat_cfg_st);
+	cmd_desc.in_param = (__u32 *) cfg;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+
+/*
+ *  cmd_query_fw
+ */
+static int cmd_query_fw(struct query_fw_st *qfw)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = TAVOR_CMD_QUERY_FW;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+	cmd_desc.out_param_size = MT_STRUCT_SIZE(tavorprm_query_fw_st);
+
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc) {
+		qfw->fw_rev_major =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_fw_st, fw_rev_major);
+		qfw->fw_rev_minor =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_fw_st, fw_rev_minor);
+		qfw->fw_rev_subminor =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_fw_st, fw_rev_subminor);
+
+		qfw->error_buf_start_h =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_fw_st, error_buf_start_h);
+		qfw->error_buf_start_l =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_fw_st, error_buf_start_l);
+		qfw->error_buf_size =
+		    EX_FLD(cmd_desc.out_param, tavorprm_query_fw_st, error_buf_size);
+	}
+
+	return rc;
+}

src/drivers/net/mlx_ipoib/cmdif_mt25218.c

@@ -0,0 +1,457 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+#include "cmdif.h"
+#include "cmdif_priv.h"
+#include "mt25218.h"
+
+/*
+ *  cmd_sys_dis
+ */
+static int cmd_sys_dis(void)
+{
+	return 0;
+}
+
+/*
+ *  cmd_write_mgm
+ */
+static int cmd_write_mgm(void *mg, __u16 index)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = MEMFREE_CMD_WRITE_MGM;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param_size = MT_STRUCT_SIZE(arbelprm_mgm_entry_st);
+	cmd_desc.in_param = (__u32 *) mg;
+	cmd_desc.input_modifier = index;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_mod_stat_cfg
+ */
+static int cmd_mod_stat_cfg(void)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+	cmd_desc.opcode = MEMFREE_CMD_MOD_STAT_CFG;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param_size = MT_STRUCT_SIZE(arbelprm_mod_stat_cfg_st);
+	cmd_desc.in_param = get_inprm_buf();
+	memset(cmd_desc.in_param, 0, cmd_desc.in_param_size);
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_query_fw
+ */
+static int cmd_query_fw(struct query_fw_st *qfw)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_QUERY_FW;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+	cmd_desc.out_param_size = MT_STRUCT_SIZE(arbelprm_query_fw_st);
+
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc) {
+		qfw->fw_rev_major =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st, fw_rev_major);
+		qfw->fw_rev_minor =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st, fw_rev_minor);
+		qfw->fw_rev_subminor =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st, fw_rev_subminor);
+
+		qfw->error_buf_start_h =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st, error_buf_start_h);
+		qfw->error_buf_start_l =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st, error_buf_start_l);
+		qfw->error_buf_size =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st, error_buf_size);
+
+		qfw->fw_pages =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st, fw_pages);
+		qfw->eq_ci_table.addr_h =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st,
+			   eq_set_ci_base_addr_h);
+		qfw->eq_ci_table.addr_l =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st,
+			   eq_set_ci_base_addr_l);
+		qfw->clear_int_addr.addr_h =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st,
+			   clr_int_base_addr_h);
+		qfw->clear_int_addr.addr_l =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_fw_st,
+			   clr_int_base_addr_l);
+	}
+
+	return rc;
+}
+
+/*
+ *  cmd_query_adapter
+ */
+static int cmd_query_adapter(struct query_adapter_st *qa)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_QUERY_ADAPTER;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+	cmd_desc.out_param_size = MT_STRUCT_SIZE(arbelprm_query_adapter_st);
+
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc) {
+		qa->intapin =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_adapter_st,
+			   intapin);
+	}
+
+	return rc;
+}
+
+/*
+ *  cmd_enable_lam
+ */
+static int cmd_enable_lam(void)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_ENABLE_LAM;
+	cmd_desc.opcode_modifier = 1;	/* zero locally attached memory */
+	cmd_desc.input_modifier = 0;	/* disable fast refresh */
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+	cmd_desc.out_param_size = MT_STRUCT_SIZE(arbelprm_enable_lam_st);
+
+	rc = cmd_invoke(&cmd_desc);
+	if (rc) {
+	}
+
+	return rc;
+}
+
+/*
+ *  cmd_map_fa
+ */
+static int cmd_map_fa(struct map_icm_st *map_fa_p)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	unsigned int in_param_size, i;
+	unsigned long off;
+
+	if (map_fa_p->num_vpm > MAX_VPM_PER_CALL) {
+		return -1;
+	}
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_MAP_FA;
+	cmd_desc.input_modifier = map_fa_p->num_vpm;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = get_inprm_buf();
+	in_param_size =
+	    MT_STRUCT_SIZE(arbelprm_virtual_physical_mapping_st) *
+	    map_fa_p->num_vpm;
+	cmd_desc.in_param_size = in_param_size;
+	memset(cmd_desc.in_param, 0, in_param_size);
+
+	for (i = 0; i < map_fa_p->num_vpm; ++i) {
+		off = (unsigned long)(cmd_desc.in_param) +
+		    MT_STRUCT_SIZE(arbelprm_virtual_physical_mapping_st) * i;
+		INS_FLD(map_fa_p->vpm_arr[i].va_h, off,
+			arbelprm_virtual_physical_mapping_st, va_h);
+		INS_FLD(map_fa_p->vpm_arr[i].va_l >> 12, off,
+			arbelprm_virtual_physical_mapping_st, va_l);
+		INS_FLD(map_fa_p->vpm_arr[i].pa_h, off,
+			arbelprm_virtual_physical_mapping_st, pa_h);
+		INS_FLD(map_fa_p->vpm_arr[i].pa_l >> 12, off,
+			arbelprm_virtual_physical_mapping_st, pa_l);
+		INS_FLD(map_fa_p->vpm_arr[i].log2_size, off,
+			arbelprm_virtual_physical_mapping_st, log2size);
+	}
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_unmap_fa
+ */
+static int cmd_unmap_fa(void)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_UNMAP_FA;
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_run_fw
+ */
+static int cmd_run_fw(void)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_RUN_FW;
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_set_icm_size
+ */
+static int cmd_set_icm_size(__u32 icm_size, __u32 * aux_pages_p)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	__u32 iprm[2], oprm[2];
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_SET_ICM_SIZE;
+
+	iprm[1] = icm_size;
+	iprm[0] = 0;
+	cmd_desc.in_trans = TRANS_IMMEDIATE;
+	cmd_desc.in_param = iprm;
+	cmd_desc.out_trans = TRANS_IMMEDIATE;
+	cmd_desc.out_param = oprm;
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc) {
+		if (oprm[0]) {
+			/* too many pages required */
+			return -1;
+		}
+		*aux_pages_p = oprm[1];
+	}
+
+	return rc;
+}
+
+/*
+ *  cmd_map_icm_aux
+ */
+static int cmd_map_icm_aux(struct map_icm_st *map_icm_aux_p)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	unsigned int in_param_size, i;
+	unsigned long off;
+
+	if (map_icm_aux_p->num_vpm > MAX_VPM_PER_CALL) {
+		return -1;
+	}
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_MAP_ICM_AUX;
+	cmd_desc.input_modifier = map_icm_aux_p->num_vpm;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = get_inprm_buf();
+	in_param_size =
+	    MT_STRUCT_SIZE(arbelprm_virtual_physical_mapping_st) *
+	    map_icm_aux_p->num_vpm;
+	cmd_desc.in_param_size = in_param_size;
+	memset(cmd_desc.in_param, 0, in_param_size);
+
+	for (i = 0; i < map_icm_aux_p->num_vpm; ++i) {
+		off = (unsigned long)(cmd_desc.in_param) +
+		    MT_STRUCT_SIZE(arbelprm_virtual_physical_mapping_st) * i;
+		INS_FLD(map_icm_aux_p->vpm_arr[i].va_h, off,
+			arbelprm_virtual_physical_mapping_st, va_h);
+		INS_FLD(map_icm_aux_p->vpm_arr[i].va_l >> 12, off,
+			arbelprm_virtual_physical_mapping_st, va_l);
+		INS_FLD(map_icm_aux_p->vpm_arr[i].pa_h, off,
+			arbelprm_virtual_physical_mapping_st, pa_h);
+		INS_FLD(map_icm_aux_p->vpm_arr[i].pa_l >> 12, off,
+			arbelprm_virtual_physical_mapping_st, pa_l);
+		INS_FLD(map_icm_aux_p->vpm_arr[i].log2_size, off,
+			arbelprm_virtual_physical_mapping_st, log2size);
+	}
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_map_icm
+ */
+static int cmd_map_icm(struct map_icm_st *map_icm_p)
+{
+	int rc;
+	command_fields_t cmd_desc;
+	unsigned int in_param_size, i;
+	unsigned long off;
+
+	if (map_icm_p->num_vpm > MAX_VPM_PER_CALL) {
+		return -1;
+	}
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_MAP_ICM;
+	cmd_desc.input_modifier = map_icm_p->num_vpm;
+	cmd_desc.in_trans = TRANS_MAILBOX;
+	cmd_desc.in_param = get_inprm_buf();
+	in_param_size =
+	    MT_STRUCT_SIZE(arbelprm_virtual_physical_mapping_st) *
+	    map_icm_p->num_vpm;
+	cmd_desc.in_param_size = in_param_size;
+	memset(cmd_desc.in_param, 0, in_param_size);
+
+	for (i = 0; i < map_icm_p->num_vpm; ++i) {
+		off = (unsigned long)(cmd_desc.in_param) +
+		    MT_STRUCT_SIZE(arbelprm_virtual_physical_mapping_st) * i;
+		INS_FLD(map_icm_p->vpm_arr[i].va_h, off,
+			arbelprm_virtual_physical_mapping_st, va_h);
+		INS_FLD(map_icm_p->vpm_arr[i].va_l >> 12, off,
+			arbelprm_virtual_physical_mapping_st, va_l);
+		INS_FLD(map_icm_p->vpm_arr[i].pa_h, off,
+			arbelprm_virtual_physical_mapping_st, pa_h);
+		INS_FLD(map_icm_p->vpm_arr[i].pa_l >> 12, off,
+			arbelprm_virtual_physical_mapping_st, pa_l);
+		INS_FLD(map_icm_p->vpm_arr[i].log2_size, off,
+			arbelprm_virtual_physical_mapping_st, log2size);
+	}
+
+	rc = cmd_invoke(&cmd_desc);
+
+	return rc;
+}
+
+/*
+ *  cmd_query_dev_lim
+ */
+static int cmd_query_dev_lim(struct dev_lim_st *dev_lim_p)
+{
+	int rc;
+	command_fields_t cmd_desc;
+
+	memset(&cmd_desc, 0, sizeof cmd_desc);
+
+	cmd_desc.opcode = MEMFREE_CMD_QUERY_DEV_LIM;
+	cmd_desc.out_trans = TRANS_MAILBOX;
+	cmd_desc.out_param = get_outprm_buf();
+	cmd_desc.out_param_size = MT_STRUCT_SIZE(arbelprm_query_dev_lim_st);
+
+	rc = cmd_invoke(&cmd_desc);
+	if (!rc) {
+		dev_lim_p->log2_rsvd_qps =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   log2_rsvd_qps);
+		dev_lim_p->qpc_entry_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   qpc_entry_sz);
+
+		dev_lim_p->log2_rsvd_srqs =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   log2_rsvd_srqs);
+		dev_lim_p->srq_entry_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   srq_entry_sz);
+
+		dev_lim_p->log2_rsvd_ees =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   log2_rsvd_ees);
+		dev_lim_p->eec_entry_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   eec_entry_sz);
+
+		dev_lim_p->log2_rsvd_cqs =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   log2_rsvd_cqs);
+		dev_lim_p->cqc_entry_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   cqc_entry_sz);
+
+		dev_lim_p->log2_rsvd_mtts =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   log2_rsvd_mtts);
+		dev_lim_p->mtt_entry_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   mtt_entry_sz);
+
+		dev_lim_p->log2_rsvd_mrws =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   log2_rsvd_mrws);
+		dev_lim_p->mpt_entry_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   mpt_entry_sz);
+
+		dev_lim_p->log2_rsvd_rdbs =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   log2_rsvd_rdbs);
+
+		dev_lim_p->eqc_entry_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   eqc_entry_sz);
+
+		dev_lim_p->max_icm_size_l =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   max_icm_size_l);
+		dev_lim_p->max_icm_size_h =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   max_icm_size_h);
+
+		dev_lim_p->num_rsvd_uars =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   num_rsvd_uars);
+		dev_lim_p->uar_sz =
+		    EX_FLD(cmd_desc.out_param, arbelprm_query_dev_lim_st,
+			   uar_sz);
+	}
+
+	return rc;
+}

src/drivers/net/mlx_ipoib/cmdif_priv.h

@@ -0,0 +1,50 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __cmdif_priv__h__
+#define __cmdif_priv__h__
+
+typedef enum {
+	TRANS_NA,
+	TRANS_IMMEDIATE,
+	TRANS_MAILBOX
+} trans_type_t;
+
+typedef struct {
+	__u32 *in_param;	/* holds the virtually contigious buffer of the parameter block passed */
+	unsigned int in_param_size;
+	trans_type_t in_trans;
+
+	__u32 input_modifier;
+
+	__u32 *out_param;	/* holds the virtually contigious buffer of the parameter block passed */
+	unsigned int out_param_size;
+	trans_type_t out_trans;
+
+	__u32 opcode;
+	__u8 opcode_modifier;
+} command_fields_t;
+
+typedef int XHH_cmd_status_t;
+
+static XHH_cmd_status_t cmd_invoke(command_fields_t * cmd_prms);
+
+#endif

src/drivers/net/mlx_ipoib/doc/README.boot_over_ib

@@ -0,0 +1,176 @@
+.Boot over IB over Mellanox HCAs README - Pre-Alpha release
+==========================================================
+Document #2442, Rev 0.10, December 2005
+
+
+1. General
+-----------
+This README describes the Boot over IB package which enables booting a Linux 
+kernel from a remote server using one of the Mellanox Technologies HCA 
+devices. The package is based on Etherboot 5.4.1.
+
+The package actually implements a network driver for Etherboot. The wire 
+protocol is compliant with IP Over IB 
+(see http://www.ietf.org/html.charters/ipoib-charter.html for related 
+documents).
+
+Etherboot uses a traditional setup of a DHCP server and a TFTP server to 
+perform a remote boot in a similar manner to Ethernet NICs. The binary code is 
+exported by the device as an expansion ROM image.
+
+
+2. Supported Devices
+---------------------
+The following Mellanox Technologies HCA devices are supported:
+
+	PCI Device ID		Mellanox HCA Device
+	----------------------------------------------
+	23108			InfiniHost (P/N MT23108)
+	25208			InfiniHost III Ex (P/N MT25208) (InfiniHost)
+	25218			InfiniHost III Ex (P/N MT25208) (MemFree)
+	25204			InfiniHost III Lx (P/N MT25204)
+
+	
+	Note:	For devices with more than one IB port, port 1 is used for 
+	communications.
+
+
+3. Compiling
+----------------
+From the src directory:
+Run" make bin/<device>.<ext>
+where device can be any of:
+	MT23108
+	MT25218
+	MT25208
+	MT25204
+	
+and ext can be rom, zrom etc. (see Etherbot doumentation for more details)
+
+4. Directory Structure
+-----------------------
+All driver files are available under src/drivers/net/mlx_ipoib/. Under this 
+directory the following files can be found:
+	
+	*** 	doc - Contains related documents including this file.
+	***		patches - Contains needed patch files.
+	*** 	samples - Contains sample files.
+	*** 	. Contains driver source files.
+	
+
+5. Burning the Flash Memory
+----------------------------
+The binary code resides in the same Flash device of the device firmware. 
+However the binary files are distinct and do not affect each other. Mellanox's 
+'mlxburn' tool is available for burning, however, it is not possible to burn 
+the expansion ROM image by itself; rather, both the firmware and expansion ROM 
+images must be burnt simultaneously.
+
+'mlxburn' is part of the Mellanox Firmware Tools (MFT) package 	available for 
+download from www.mellanox.com under 'Firmware Downloads'.
+
+Example:
+The following command burns a firmware image and an expansion ROM image to an 
+InfiniHost Adapter Card (P/N MHX-CE128-T.ini):
+	  
+   mlxburn -fw fw-23108-a1-rel.mlx -exp_rom MT23108.bin
+			 /dev/mst/mt23108_pci_cr0 -conf MHX-CE128-T.ini
+
+*** Important Note: The .ini file must support burning expansion ROMs. For 
+example, the following lines must appear in the .ini file. If they do not, 
+please add them	manually.
+
+[ADAPTER]
+exp_rom_en = true
+
+Mellanox's web site contains firmware binary files with extension .bin.gz. 
+These files contain contain EVERYTHING the goes in the flash memory and thus 
+are NOT suitable for including the expansion rom image. Therefore, one use the 
+files with .mlx extension also available from Mellanox's web site.
+
+	
+
+6. Preparing the DHCP Server
+-----------------------------
+DHCP messages over IP Over IB are transmitted as broadcasts. In order to 
+distinguish between messages belonging to a certain DHCP session, the messages 
+must carry the client identifier option (see ietf documentation	referred to 
+above). As of November 2005, ISC DHCP servers do not support this feature. 
+They are expected to support this at the end of 2005. In order to work this 
+out, the appropriate patch must be applied (see patches directory). It has 
+been tested on version isc-dhcpd-V3.0.4b2.
+
+The DHCP server must run on a machine which supports IP Over IB. The Mellanox 
+IBGD package (gen1 or gen2) can be used to provide this.
+To run the DHCP server from the command line use: dhcpd ib0
+
+7. DHCP Server Configuration File
+----------------------------------
+In order for the DHCP server to provide configuration records for clients, an 
+appropriate configuration file dhcpd.conf must be created and put under /etc/. 
+A sample configuration file with comments can be found in the samples directory.
+
+
+8. OpenSM
+----------
+To successfully boot over IB, the IB network must contain a Subnet Manager 
+which configures the IB network. OpenSM is part of the IBGD distribution and 
+can be used to accomplish that. Note that OpenSM may be run on the same host 
+running the DHCP server but it is not mandatory.
+
+
+9. TFTP Server
+---------------
+When the DHCP session is completed, the client has the IP address of the TFTP 
+server from which it should download the kernel image. This TFTP server must 
+run on a machine with InfiniBand support. The client loads first a loader 
+image based on PXE API which then loads the kernel image. The image can be 
+found in the Linux kernel homepage:
+
+http://www.kernel.org/pub/linux/boot/syslinux/
+
+
+10. BIOS Configuration
+-----------------------
+The expansion ROM image presents itself to the BIOS as a boot device. As a 
+result, the BIOS will add it to the list of boot devices. The priority of this 
+list can be modified when entering the BIOS setup. The boot over IB	image must 
+be set first for the BIOS to attempt to use it first.
+
+
+11. Operation
+--------------
+When booting the client, a message appears on the screen describing the device 
+found and the revision of the code. The user has 3 seconds to press a key for 
+increased functionality:
+'V' will increase verbosity.
+'I' will prinit some information to aid in configuring the DHCP configuration 
+    file. In this case the display will hold for 5 seconds to let the user 
+	grasp the information.
+	
+Note that increasing verbosity will significantly slow boot time and will 
+print lots of debug messages to the screen.
+
+
+12. Diskless Machines
+----------------------
+Most often it is required to boot a diskless machine. In these 	cases the 
+kernel mounts its root file system over NFS over one of the interfaces. For 
+this to happen on a client with only InfiniBand interfaces, the kernel image 
+must be configured accordingly and must include IP Over IB support. This can 
+be achieved either by compiling this into the kernel or using initrd images 
+that contain IP Over IB support.
+
+
+13. Changing Defaults
+----------------------
+As stated the driver uses port 1 for its communications. To use another port 
+edit the file src/drivers/net/ib_driver.h and modify the definition of 
+PXE_IB_PORT.
+
+
+14. Installing a package from Mellanox
+--------------------------------------
+When using a package obtained from Mellanox Technologies' web site, the
+directory src/bin will contain the driver binary files. The files have a .bin
+extension and are equivalent to the same files with .zrom extension.

src/drivers/net/mlx_ipoib/ib_driver.c

@@ -0,0 +1,342 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#include "ib_driver.h"
+
+static const __u8 ipv4_bcast_gid[] = {
+	0xff, 0x12, 0x40, 0x1b, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff
+};
+
+static int wait_logic_link_up(__u8 port)
+{
+	unsigned int relax_time, max_time;
+	relax_time = 500;
+	max_time = 30000;	/* 30 seconds */
+	int rc;
+	unsigned int i, error = 1;
+	__u16 status;
+	struct port_info_st pi_var;
+	__u8 port_state;
+
+	for (i = 0; i < max_time; i += relax_time) {
+		rc = get_port_info(port, &pi_var, &status);
+		if (rc) {
+			eprintf("");
+			return rc;
+		} else {
+			if (status == 0) {
+				port_state = (pi_var.combined4 >> 24) & 0xf;
+				//port_state= pi_var.port_state;
+				if (port_state == 4) {
+					error = 0;
+					break;
+				}
+			}
+		}
+		printf("+");
+		mdelay(relax_time);
+	}
+
+	if (i >= max_time)
+		return -1;
+
+	return 0;
+}
+
+static int ib_driver_init(struct pci_device *pci, udqp_t * ipoib_qph_p)
+{
+	int rc;
+	__u8 port;
+	__u16 status;
+	__u32 qkey;
+	__u16 mlid;
+	ud_av_t av;
+	struct ib_eqe_st ib_eqe;
+	__u8 num_eqe;
+
+	tprintf("");
+	rc = ib_device_init(pci);
+	if (rc)
+		return rc;
+
+	tprintf("");
+
+	memcpy(ib_data.bcast_gid.raw, ipv4_bcast_gid, sizeof(ipv4_bcast_gid));
+
+	port = PXE_IB_PORT;
+	rc = setup_hca(port, &ib_data.eq);
+	if (rc)
+		return rc;
+	tprintf("setup_hca() success");
+
+	ib_data.port = port;
+
+	if(print_info)
+		printf("boot port = %d\n", ib_data.port);
+
+	rc = wait_logic_link_up(port);
+	if (rc)
+		return rc;
+
+	tprintf("wait_logic_link_up() success");
+
+	rc = get_guid_info(&status);
+	if (rc) {
+		eprintf("");
+		return rc;
+	} else if (status) {
+		eprintf("");
+		return rc;
+	}
+
+	tprintf("get_guid_info() success");
+
+	/* this to flush stdout that contains previous chars */
+	printf("    \n");
+	if(print_info) {
+		__u8 *gid=ib_data.port_gid.raw;
+
+		printf("\n");
+		printf("port GID=%hhx:%hhx:%hhx:%hhx:%hhx:%hhx:%hhx:%hhx:"
+		       "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx:%hhx:%hhx\n",
+		       gid[0],gid[1],gid[2],gid[3],gid[4],gid[5],gid[6],gid[7],
+		       gid[8],gid[9],gid[10],gid[11],gid[12],gid[13],gid[14],gid[15]);
+	}
+
+	rc = get_pkey_tbl(NULL, &status);
+	if (rc) {
+		eprintf("");
+		return rc;
+	} else if (status) {
+		eprintf("");
+		return rc;
+	}
+	rc = create_mads_qp(&ib_data.mads_qp,
+			    &ib_data.mads_snd_cq, &ib_data.mads_rcv_cq);
+	if (rc) {
+		eprintf("");
+		return rc;
+	}
+
+	tprintf("attempt to join mcast group ...");
+	rc = join_mc_group(&qkey, &mlid, 1);
+	if (rc) {
+		eprintf("");
+		return rc;
+	} else {
+		tprintf("join_mc_group() successfull qkey=0x%lx, mlid=0x%x",
+			qkey, mlid);
+	}
+
+	rc = create_ipoib_qp(&ib_data.ipoib_qp,
+			     &ib_data.ipoib_snd_cq,
+			     &ib_data.ipoib_rcv_cq, qkey);
+	if (rc) {
+		eprintf("");
+		return rc;
+	}
+
+	tprintf("create_ipoib_qp() success");
+	*ipoib_qph_p = ib_data.ipoib_qp;
+
+	tprintf("register qp to receive mcast...");
+	rc = add_qp_to_mcast_group(ib_data.bcast_gid, 1);
+	if (rc) {
+		eprintf("");
+		return rc;
+	} else {
+		tprintf("add_qp_to_mcast_group() success");
+	}
+
+	/* create a broadcast group ud AV */
+	av = alloc_ud_av();
+	if (!av) {
+		eprintf("");
+		return -1;
+	}
+	tprintf("alloc_ud_av() success");
+	modify_av_params(av, mlid, 1, 0, 0, &ib_data.bcast_gid, BCAST_QPN);
+	tprintf("modify_av_params() success");
+	ib_data.bcast_av = av;
+
+	do {
+		rc = poll_eq(&ib_eqe, &num_eqe);
+		if (rc) {
+			eprintf("");
+			return -1;
+		}
+		if (num_eqe) {
+			tprintf("num_eqe=%d", num_eqe);
+		}
+		tprintf("num_eqe=%d", num_eqe);
+	} while (num_eqe);
+	tprintf("eq is drained");
+
+	clear_interrupt();
+
+	return rc;
+}
+
+static int ib_driver_close(int fw_fatal)
+{
+	int rc, ret = 0;
+	__u32 qkey;
+	__u16 mlid;
+
+	rc = ib_device_close();
+	if (rc) {
+		eprintf("ib_device_close() failed");
+		ret = 1;
+	}
+
+	tprintf("");
+	if (!fw_fatal) {
+		rc = join_mc_group(&qkey, &mlid, 0);
+		if (rc) {
+			eprintf("");
+			ret = 1;
+		}
+		tprintf("join_mc_group(leave) success");
+
+		rc = add_qp_to_mcast_group(ib_data.bcast_gid, 0);
+		if (rc) {
+			eprintf("");
+			ret = 1;
+		}
+		tprintf("add_qp_to_mcast_group(remove) success");
+
+		rc = cmd_close_ib(ib_data.port);
+		if (rc) {
+			eprintf("");
+			ret = 1;
+		}
+		tprintf("cmd_close_ib(%d) success", ib_data.port);
+
+		if (destroy_udqp(ib_data.mads_qp)) {
+			eprintf("");
+			ret = 1;
+		}
+
+		if (destroy_udqp(ib_data.ipoib_qp)) {
+			eprintf("");
+			ret = 1;
+		}
+	}
+
+	rc = cmd_close_hca(fw_fatal);
+	if (rc) {
+		eprintf("");
+		ret = 1;
+	}
+
+	if (!fw_fatal) {
+		rc = cmd_sys_dis();
+		if (rc) {
+			eprintf("");
+			ret = 1;
+		}
+	}
+
+	return ret;
+}
+
+static int poll_cqe_tout(cq_t cqh, __u16 tout, void **wqe, int *good_p)
+{
+	int rc;
+	struct ib_cqe_st ib_cqe;
+	__u8 num_cqes;
+	unsigned long end;
+
+	end = currticks() + tout;
+	do {
+		rc = ib_poll_cq(cqh, &ib_cqe, &num_cqes);
+		if (rc)
+			return rc;
+
+		if (num_cqes == 1) {
+			if (good_p) {
+				*good_p = ib_cqe.is_error ? 0 : 1;
+			}
+			if (wqe)
+				*wqe = ib_cqe.wqe;
+			return 0;
+		}
+	}
+	while (currticks() < end);
+
+	return -1;
+}
+
+static u8 *get_port_gid(void)
+{
+	return ib_data.port_gid.raw;
+}
+
+static __u32 ib_get_qpn(udqp_t qph)
+{
+	__u32 qpn;
+
+	qpn = dev_get_qpn(qph);
+
+	return qpn;
+}
+
+static int drain_eq(void)
+{
+	__u8 num_eqe = 0, tot_eqe = 0;
+	int rc;
+
+	do {
+		tot_eqe += num_eqe;
+		rc = poll_eq(ib_data.eq, &num_eqe);
+		if (rc) {
+			eprintf("");
+			return -1;
+		}
+
+		tprintf("num_eqe=%d", num_eqe);
+	} while (num_eqe);
+	tprintf("eq is drained");
+	if (tot_eqe) {
+		tprintf("got %d eqes", tot_eqe);
+		return -1;
+	}
+
+	return 0;
+}
+
+
+static int poll_error_buf(void)
+{
+	__u32 *ptr= dev_ib_data.error_buf_addr;
+	__u32 i;
+
+	for (i=0; i<dev_ib_data.error_buf_size; ++i, ptr++) {
+		if ( readl(ptr) ) {
+			return -1;
+		}
+	}
+
+	return 0;
+}
+
+

src/drivers/net/mlx_ipoib/ib_driver.h

@@ -0,0 +1,169 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __ib_driver_h__
+#define __ib_driver_h__
+
+#define MELLANOX_VENDOR_ID	0x15b3
+
+#define GLOBAL_PD   0x123456
+#define GLOBAL_QKEY   0x80010000
+
+#define MAD_BUF_SZ 256
+#define IPOIB_RCV_BUF_SZ 2048
+#define IPOIB_SND_BUF_SZ 2048
+#define GRH_SIZE 40
+
+#define ARP_BUF_SZ 56
+
+#define FL_EOL 255		/* end of free list */
+
+#define SEND_CQE_POLL_TOUT 38	/* 2 sec */
+#define SA_RESP_POLL_TOUT 91	/* 5 seconds */
+
+#define NUM_AVS 10
+
+#define PXE_IB_PORT 1
+
+#define SA_QPN 1
+#define BCAST_QPN 0xffffff
+
+#define QPN_BASE 0x550000
+
+enum {
+	MADS_QPN_SN,
+	IPOIB_QPN_SN,
+	MAX_APP_QPS
+};
+
+enum {
+	MADS_SND_CQN_SN,
+	MADS_RCV_CQN_SN,
+	IPOIB_SND_CQN_SN,
+	IPOIB_RCV_CQN_SN,
+	MAX_APP_CQS
+};
+
+enum {
+	MTU_256 = 1,
+	MTU_512 = 2,
+	MTU_1024 = 3,
+	MTU_2048 = 4,
+};
+
+#define HCR_BASE 0x80680
+#define HCR_OFFSET_GO 0x80698
+#define HCR_OFFSET_STATUS 0x80698
+#define HCR_OFFSET_OUTPRM_H 0x8068C
+#define HCR_OFFSET_OUTPRM_L 0x80690
+
+#define MKEY_PREFIX 0x77000000
+#define MKEY_IDX_MASK 0xffffff
+
+/* event types */
+/*=============*/
+/* Completion Events */
+#define XDEV_EV_TYPE_CQ_COMP					0
+
+  /* IB - affiliated errors CQ  */
+#define XDEV_EV_TYPE_CQ_ERR						0x04
+#define XDEV_EV_TYPE_LOCAL_WQ_CATAS_ERR			0x05
+
+  /* Unaffiliated errors */
+#define XDEV_EV_TYPE_PORT_ERR					0x09
+#define XDEV_EV_TYPE_LOCAL_WQ_INVALID_REQ_ERR	0x10
+#define XDEV_EV_TYPE_LOCAL_WQ_ACCESS_VIOL_ERR	0x11
+
+/* NOPCODE field enumeration for doorbells and send-WQEs */
+#define XDEV_NOPCODE_SEND	10	/* Send */
+
+struct ib_gid_u32_st {
+	__u32 dw[4];
+};
+
+union ib_gid_u {
+	__u8 raw[16];
+	struct ib_gid_u32_st as_u32;
+} __attribute__ ((packed));
+
+struct ib_cqe_st {
+	__u8 is_error;
+	__u8 is_send;
+	void *wqe;
+	__u32 count;
+};
+
+typedef void *udqp_t;
+typedef void *cq_t;
+typedef void *ud_av_t;
+typedef void *ud_send_wqe_t;
+typedef void *eq_t;
+
+struct ib_data_st {
+//      __u32 mkey;
+//      __u32 pd;
+//      __u32 qkey;
+	udqp_t mads_qp;
+	udqp_t ipoib_qp;
+	cq_t mads_snd_cq;
+	cq_t mads_rcv_cq;
+	cq_t ipoib_snd_cq;
+	cq_t ipoib_rcv_cq;
+	eq_t eq;
+	__u16 sm_lid;
+	__u16 pkey;
+	union ib_gid_u port_gid;
+	union ib_gid_u bcast_gid;
+	ud_av_t bcast_av;	/* av allocated and used solely for broadcast */
+	__u8 port;
+};
+
+static int setup_hca(__u8 port, void **eq_p);
+static int post_send_req(udqp_t qp, ud_send_wqe_t wqe, __u8 num_gather);
+static void prep_send_wqe_buf(udqp_t qp,
+			      ud_av_t av,
+			      ud_send_wqe_t wqe,
+			      const void *buf,
+			      unsigned int offset, __u16 len, __u8 e);
+
+static int create_mads_qp(void **qp_pp, void **snd_cq_pp, void **rcv_cq_pp);
+
+static int create_ipoib_qp(udqp_t * qp_p,
+			   void **snd_cq_pp, void **rcv_cq_pp, __u32 qkey);
+
+static int gw_read_cr(__u32 addr, __u32 * result);
+static int gw_write_cr(__u32 addr, __u32 data);
+static ud_av_t alloc_ud_av(void);
+static void free_ud_av(ud_av_t av);
+static int ib_poll_cq(cq_t cq, struct ib_cqe_st *ib_cqe_p, __u8 * num_cqes);
+static int add_qp_to_mcast_group(union ib_gid_u mcast_gid, __u8 add);
+static int clear_interrupt(void);
+static int poll_cqe_tout(cq_t cqh, __u16 tout, void **wqe, int *good_p);
+
+static void *get_inprm_buf(void);
+static void *get_outprm_buf(void);
+static __u32 ib_get_qpn(udqp_t qph);
+
+static void dev_post_dbell(void *dbell, __u32 offset);
+
+static struct ib_data_st ib_data;
+
+#endif				/* __ib_driver_h__ */

src/drivers/net/mlx_ipoib/ib_mad.c

@@ -0,0 +1,396 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#include "ib_mad.h"
+#include "mad_attrib.h"
+#include "cmdif.h"
+#include "ib_driver.h"
+
+#define TID_START 0x1234
+#define TID_INC 117
+
+static u32 next_tid = TID_START;
+
+/*
+ *  get_port_info
+ *
+ *	query the local device for the portinfo attribute
+ *
+ *	port(in) port number to query
+ *  buf(out) buffer to hold the result
+ */
+static int get_port_info(__u8 port, struct port_info_st *buf, __u16 * status)
+{
+	union port_info_mad_u *inprm;
+	union port_info_mad_u *outprm;
+	int rc;
+
+	inprm = get_inprm_buf();
+	outprm = get_outprm_buf();
+	memset(inprm, 0, sizeof *inprm);
+
+	inprm->mad.mad_hdr.method = IB_MGMT_METHOD_GET;
+	inprm->mad.mad_hdr.mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
+	inprm->mad.mad_hdr.class_version = 1;
+	inprm->mad.mad_hdr.base_version = IB_MGMT_BASE_VERSION;
+	inprm->mad.mad_hdr.attr_id = IB_SMP_ATTR_PORT_INFO;
+	inprm->mad.mad_hdr.attr_mod = port;
+
+	rc = cmd_mad_ifc(inprm, (struct ib_mad_st *)outprm, port);
+	if (!rc) {
+		memcpy(buf, &outprm->mad.port_info,
+		       sizeof(outprm->mad.port_info));
+		*status = inprm->mad.mad_hdr.status;
+		if (!(*status)) {
+			ib_data.sm_lid = outprm->mad.port_info.mastersm_lid;
+			memcpy(&ib_data.port_gid.raw[0],
+			       outprm->mad.port_info.gid_prefix, 8);
+			cpu_to_be_buf(&ib_data.port_gid.raw[0], 8);
+		}
+	}
+	return rc;
+}
+
+/*
+ *  get_guid_info
+ *
+ *	query the local device for the guidinfo attribute
+ *
+ *  buf(out) buffer to hold the result
+ */
+static int get_guid_info(__u16 * status)
+{
+	union guid_info_mad_u *inprm;
+	union guid_info_mad_u *outprm;
+	int rc;
+
+	inprm = get_inprm_buf();
+	outprm = get_outprm_buf();
+	memset(inprm, 0, sizeof *inprm);
+
+	inprm->mad.mad_hdr.method = IB_MGMT_METHOD_GET;
+	inprm->mad.mad_hdr.mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
+	inprm->mad.mad_hdr.class_version = 1;
+	inprm->mad.mad_hdr.base_version = IB_MGMT_BASE_VERSION;
+	inprm->mad.mad_hdr.attr_id = IB_SMP_ATTR_GUID_INFO;
+	inprm->mad.mad_hdr.attr_mod = 0;
+
+	rc = cmd_mad_ifc(inprm, (struct ib_mad_st *)outprm, ib_data.port);
+	if (!rc) {
+		*status = inprm->mad.mad_hdr.status;
+		if (!(*status)) {
+			memcpy(&ib_data.port_gid.raw[8],
+			       &outprm->mad.guid_info.gid_tbl[0], 8);
+			cpu_to_be_buf(&ib_data.port_gid.raw[8], 8);
+		}
+	}
+	return rc;
+}
+
+static int get_pkey_tbl(struct pkey_tbl_st *pkey_tbl, __u16 * status)
+{
+	union pkey_tbl_mad_u *inprm;
+	union pkey_tbl_mad_u *outprm;
+	int rc;
+
+	inprm = get_inprm_buf();
+	outprm = get_outprm_buf();
+	memset(inprm, 0, sizeof *inprm);
+	memset(outprm, 0, sizeof *outprm);
+
+	inprm->mad.mad_hdr.method = IB_MGMT_METHOD_GET;
+	inprm->mad.mad_hdr.mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
+	inprm->mad.mad_hdr.class_version = 1;
+	inprm->mad.mad_hdr.base_version = IB_MGMT_BASE_VERSION;
+	inprm->mad.mad_hdr.attr_id = IB_SMP_ATTR_PKEY_TABLE;
+	inprm->mad.mad_hdr.attr_mod = 0;
+
+	rc = cmd_mad_ifc(inprm, (struct ib_mad_st *)outprm, 1);
+	if (!rc) {
+		if (pkey_tbl)
+			memcpy(pkey_tbl, &outprm->mad.pkey_tbl, 2);
+		*status = inprm->mad.mad_hdr.status;
+		if (!(*status)) {
+			ib_data.pkey = outprm->mad.pkey_tbl.pkey_tbl[0][1];
+			ib_data.bcast_gid.raw[4] =
+			    outprm->mad.pkey_tbl.pkey_tbl[0][1] >> 8;
+			ib_data.bcast_gid.raw[5] =
+			    outprm->mad.pkey_tbl.pkey_tbl[0][1] & 0xff;
+		}
+	}
+	return rc;
+}
+
+static int join_mc_group(__u32 * qkey_p, __u16 * mlid_p, __u8 join)
+{
+	struct mc_member_mad_st *mad, *rcv_mad;
+	void *snd_wqe;
+	void *tmp_wqe;
+	udqp_t qp;
+	void *av;
+	int rc;
+	u32 tid;
+	void *rcv_wqe;
+	int is_good;
+
+	qp = ib_data.mads_qp;
+
+	snd_wqe = alloc_send_wqe(qp);
+	if (!snd_wqe) {
+		eprintf("");
+		return -1;
+	}
+	tprintf("allocated snd_wqe=0x%lx", snd_wqe);
+
+	mad = get_send_wqe_buf(snd_wqe, 0);
+	memset(mad, 0, 256);
+
+	av = alloc_ud_av();
+	if (!av) {
+		eprintf("");
+		free_wqe(snd_wqe);
+		return -1;
+	}
+	modify_av_params(av, ib_data.sm_lid, 0, 0, 0, NULL, SA_QPN);
+
+	prep_send_wqe_buf(qp, av, snd_wqe, NULL, 0, 256, 0);
+
+	mad->mad_hdr.method = join ? IB_MGMT_METHOD_SET : IB_MGMT_METHOD_DELETE;
+	mad->mad_hdr.mgmt_class = IB_MGMT_CLASS_SUBN_ADM;
+	mad->mad_hdr.class_version = 2;
+	mad->mad_hdr.base_version = IB_MGMT_BASE_VERSION;
+	mad->mad_hdr.attr_id = IB_SA_ATTR_MC_MEMBER_REC;
+	tid = next_tid;
+	next_tid += TID_INC;
+	mad->mad_hdr.tid[1] = tid;
+
+	mad->sa_hdr.comp_mask[1] = IB_SA_MCMEMBER_REC_MGID |
+	    IB_SA_MCMEMBER_REC_PORT_GID | IB_SA_MCMEMBER_REC_JOIN_STATE;
+
+	mad->mc_member.combined4 |= (1 << 24);	/*mad->mc_member.join_state = 1; */
+
+	be_to_cpu_buf(mad, sizeof *mad);
+	memcpy(mad->mc_member.mgid, ib_data.bcast_gid.raw, 16);
+	memcpy(mad->mc_member.port_gid, ib_data.port_gid.raw, 16);
+
+	rc = post_send_req(qp, snd_wqe, 1);
+	if (rc) {
+		eprintf("");
+		free_ud_av(av);
+		free_wqe(snd_wqe);
+		return -1;
+	}
+
+	tprintf("");
+	/* poll the CQ to get the completions
+	   on the send and the expected receive */
+
+	/* send completion */
+	rc = poll_cqe_tout(ib_data.mads_snd_cq, SEND_CQE_POLL_TOUT, &tmp_wqe,
+			   &is_good);
+	if (rc) {
+		eprintf("");
+		return -1;
+	}
+
+	if (tmp_wqe != snd_wqe) {
+		eprintf("");
+		return -1;
+	}
+
+	if (free_wqe(snd_wqe)) {
+		eprintf("");
+		return -1;
+	}
+	free_ud_av(av);
+
+	if (!is_good) {
+		eprintf("");
+		return -1;
+	}
+
+	/* receive completion */
+	rc = poll_cqe_tout(ib_data.mads_rcv_cq, SA_RESP_POLL_TOUT, &rcv_wqe,
+			   &is_good);
+	if (rc) {
+		eprintf("");
+		return -1;
+	}
+
+	if (is_good) {
+		rcv_mad = get_rcv_wqe_buf(rcv_wqe, 1);
+		be_to_cpu_buf(rcv_mad, sizeof *rcv_mad);
+		if (rcv_mad->mad_hdr.tid[1] == tid) {
+			/* that's our response */
+			if (mad->mad_hdr.status == 0) {
+				/* good response - save results */
+				*qkey_p = rcv_mad->mc_member.q_key;
+				*mlid_p = rcv_mad->mc_member.combined1 >> 16;	// rcv_mad->mc_member.mlid;
+			} else {
+				/* join failed */
+				eprintf("");
+				return -1;
+			}
+		} else {
+			/* not our response */
+			eprintf("");
+			return -1;
+		}
+	}
+
+	if (free_wqe(rcv_wqe)) {
+		eprintf("");
+		return -1;
+	}
+
+	return is_good ? 0 : -1;
+}
+
+static int get_path_record(union ib_gid_u *dgid, __u16 * dlid_p, u8 * sl_p,
+			   u8 * rate_p)
+{
+	struct path_record_mad_st *mad, *rcv_mad;
+	void *snd_wqe;
+	udqp_t qp;
+	ud_av_t av;
+	void *tmp_wqe;
+	void *rcv_wqe;
+	u32 tid;
+	int rc;
+	int is_good;
+
+	tprintf("gid=%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x:"
+		"%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x",
+		dgid->raw[0], dgid->raw[1], dgid->raw[2], dgid->raw[3],
+		dgid->raw[4], dgid->raw[5], dgid->raw[6], dgid->raw[7],
+		dgid->raw[8], dgid->raw[9], dgid->raw[10], dgid->raw[11],
+		dgid->raw[12], dgid->raw[13], dgid->raw[14], dgid->raw[15]);
+	qp = ib_data.mads_qp;
+
+	snd_wqe = alloc_send_wqe(qp);
+	if (!snd_wqe) {
+		eprintf("");
+		return -1;
+	}
+
+	mad = get_send_wqe_buf(snd_wqe, 0);
+	memset(mad, 0, 256);
+
+	av = alloc_ud_av();
+	if (!av) {
+		eprintf("");
+		free_wqe(snd_wqe);
+		return -1;
+	}
+	modify_av_params(av, ib_data.sm_lid, 0, 0, 0, NULL, SA_QPN);
+
+	prep_send_wqe_buf(qp, av, snd_wqe, NULL, 0, 256, 0);
+
+	mad->mad_hdr.method = IB_MGMT_METHOD_GET;
+	mad->mad_hdr.mgmt_class = IB_MGMT_CLASS_SUBN_ADM;
+	mad->mad_hdr.class_version = 2;
+	mad->mad_hdr.base_version = IB_MGMT_BASE_VERSION;
+	mad->mad_hdr.attr_id = IB_SA_ATTR_PATH_REC;
+	tid = next_tid;
+	next_tid += TID_INC;
+	mad->mad_hdr.tid[1] = tid;
+
+	memcpy(mad->path_record.dgid.raw, dgid->raw, 16);
+	cpu_to_be_buf(mad->path_record.dgid.raw, 16);
+
+	mad->sa_hdr.comp_mask[1] = IB_SA_PATH_REC_DGID | IB_SA_PATH_REC_SGID;
+
+	cpu_to_be_buf(mad, sizeof *mad);
+	memcpy(mad->path_record.sgid.raw, ib_data.port_gid.raw, 16);
+
+	rc = post_send_req(qp, snd_wqe, 1);
+	if (rc) {
+		eprintf("");
+		free_ud_av(av);
+		free_wqe(snd_wqe);
+		return rc;
+	}
+
+	/* poll the CQ to get the completions
+	   on the send and the expected receive */
+
+	/* send completion */
+	rc = poll_cqe_tout(ib_data.mads_snd_cq, SEND_CQE_POLL_TOUT, &tmp_wqe,
+			   &is_good);
+	if (rc) {
+		eprintf("");
+		return -1;
+	}
+
+	if (tmp_wqe != snd_wqe) {
+		eprintf("");
+		return -1;
+	}
+
+	if (free_wqe(snd_wqe)) {
+		eprintf("");
+		return -1;
+	}
+	free_ud_av(av);
+
+	if (!is_good) {
+		eprintf("");
+		return -1;
+	}
+
+	/* receive completion */
+	rc = poll_cqe_tout(ib_data.mads_rcv_cq, SA_RESP_POLL_TOUT, &rcv_wqe,
+			   &is_good);
+	if (rc) {
+		eprintf("");
+		return -1;
+	}
+
+	if (is_good) {
+		rcv_mad = get_rcv_wqe_buf(rcv_wqe, 1);
+		be_to_cpu_buf(rcv_mad, sizeof *rcv_mad);
+		if (rcv_mad->mad_hdr.tid[1] == tid) {
+			/* that's our response */
+			if (mad->mad_hdr.status == 0) {
+				/* good response - save results */
+				*dlid_p = rcv_mad->path_record.dlid;
+				*sl_p = (rcv_mad->path_record.combined3 >> 16) & 0xf;	//  rcv_mad->path_record.sl;
+				*rate_p = rcv_mad->path_record.combined3 & 0x3f;	//rcv_mad->path_record.rate;
+			} else {
+				/* join failed */
+				eprintf("");
+				return -1;
+			}
+		} else {
+			/* not our response */
+			eprintf("");
+			return -1;
+		}
+	}
+
+	if (free_wqe(rcv_wqe)) {
+		eprintf("");
+		return -1;
+	}
+
+	tprintf("");
+	return is_good ? 0 : -1;
+}

src/drivers/net/mlx_ipoib/ib_mad.h

@@ -0,0 +1,110 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __ib_mad_h__
+#define __ib_mad_h__
+
+#include "ib_driver.h"
+
+/* Management base version */
+#define IB_MGMT_BASE_VERSION			1
+
+/* Management classes */
+#define IB_MGMT_CLASS_SUBN_LID_ROUTED		0x01
+#define IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE	0x81
+#define IB_MGMT_CLASS_SUBN_ADM			0x03
+#define IB_MGMT_CLASS_PERF_MGMT			0x04
+#define IB_MGMT_CLASS_BM			0x05
+#define IB_MGMT_CLASS_DEVICE_MGMT		0x06
+#define IB_MGMT_CLASS_CM			0x07
+#define IB_MGMT_CLASS_SNMP			0x08
+#define IB_MGMT_CLASS_VENDOR_RANGE2_START	0x30
+#define IB_MGMT_CLASS_VENDOR_RANGE2_END		0x4F
+
+/* Management methods */
+#define IB_MGMT_METHOD_GET			0x01
+#define IB_MGMT_METHOD_SET			0x02
+#define IB_MGMT_METHOD_GET_RESP			0x81
+#define IB_MGMT_METHOD_SEND			0x03
+#define IB_MGMT_METHOD_TRAP			0x05
+#define IB_MGMT_METHOD_REPORT			0x06
+#define IB_MGMT_METHOD_REPORT_RESP		0x86
+#define IB_MGMT_METHOD_TRAP_REPRESS		0x07
+#define IB_MGMT_METHOD_DELETE			0x15
+
+#define IB_MGMT_METHOD_RESP			0x80
+
+/* Subnet management attributes */
+#define IB_SMP_ATTR_NOTICE					0x0002
+#define IB_SMP_ATTR_NODE_DESC				0x0010
+#define IB_SMP_ATTR_NODE_INFO				0x0011
+#define IB_SMP_ATTR_SWITCH_INFO				0x0012
+#define IB_SMP_ATTR_GUID_INFO				0x0014
+#define IB_SMP_ATTR_PORT_INFO				0x0015
+#define IB_SMP_ATTR_PKEY_TABLE				0x0016
+#define IB_SMP_ATTR_SL_TO_VL_TABLE			0x0017
+#define IB_SMP_ATTR_VL_ARB_TABLE			0x0018
+#define IB_SMP_ATTR_LINEAR_FORWARD_TABLE	0x0019
+#define IB_SMP_ATTR_RANDOM_FORWARD_TABLE	0x001A
+#define IB_SMP_ATTR_MCAST_FORWARD_TABLE		0x001B
+#define IB_SMP_ATTR_SM_INFO					0x0020
+#define IB_SMP_ATTR_VENDOR_DIAG				0x0030
+#define IB_SMP_ATTR_LED_INFO				0x0031
+#define IB_SMP_ATTR_VENDOR_MASK				0xFF00
+
+struct ib_mad_hdr_st {
+	__u8 method;
+	__u8 class_version;
+	__u8 mgmt_class;
+	__u8 base_version;
+	__u16 class_specific;
+	__u16 status;
+	__u32 tid[2];
+	__u16 resv;
+	__u16 attr_id;
+	__u32 attr_mod;
+} __attribute__ ((packed));
+
+struct rmpp_hdr_st {
+	__u32 raw[3];
+} __attribute__ ((packed));
+
+struct sa_header_st {
+	__u32 sm_key[2];
+	__u16 attrib_offset;
+	__u16 r0;
+	__u32 comp_mask[2];
+} __attribute__ ((packed));
+
+struct ib_mad_st {
+	struct ib_mad_hdr_st mad_hdr;
+	__u8 data[232];
+} __attribute__ ((packed));
+
+union mad_u {
+	__u8 raw[256];
+	struct ib_mad_st mad;
+} __attribute__ ((packed));
+
+static int get_path_record(union ib_gid_u *dgid, __u16 * dlid_p, __u8 * sl_p,
+			   __u8 * rate_p);
+
+#endif				/* __ib_mad_h__ */

src/drivers/net/mlx_ipoib/ipoib.h

@@ -0,0 +1,297 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __ipoib_h__
+#define __ipoib_h__
+
+#define ARP_PROT_TYPE 0x806
+#define IPV4_PROT_TYPE 0x800
+
+#define IPOIB_HW_TYPE 0x20
+#define ETH_HW_TYPE 1
+
+#define ARP_OP_REQUESET 1
+#define ARP_OP_REPLY    2
+
+#define MLX_ETH_3BYTE_PREFIX 0x2c9	/* 00,02,c9 */
+#define MLX_ETH_BYTE0 0
+#define MLX_ETH_BYTE1 2
+#define MLX_ETH_BYTE2 0xC9
+
+#define IP_PROT_UDP 17
+#define DHCP_TYPE_REQUEST 1
+#define DHCP_TYPE_RESPONSE 2
+#define DHCP_TYPE_ACK 5
+
+struct ipoib_mac_st {
+	__u32 qpn:24;
+	__u32 r0:8;
+	__u8 gid[16];
+} __attribute__ ((packed));
+
+struct arp_packet_st {
+	__u16 arp_prot_type;
+	__u16 hw_type;
+	__u16 opcode;
+	__u8 prot_size;
+	__u8 hw_len;
+	struct ipoib_mac_st sender_mac;
+	__u32 sender_ip;
+	struct ipoib_mac_st target_mac;
+	__u32 target_ip;
+} __attribute__ ((packed));
+
+/* this struct is used to translate between ipoib and
+   ethernet mac addresses */
+struct mac_xlation_st {
+	__u8 valid;		/* 1=entry valid 0=entry free */
+	__u32 youth;		/* youth of this entry the lowest the
+				   number the older in age */
+	__u8 eth_mac_lsb[3];	/* three bytes Ethernet MAC
+				   LS bytes are constants */
+	union ib_gid_u gid;
+	__u32 qpn;
+	ud_av_t av;		/* address vector representing neighbour */
+};
+
+static inline __u16 get_prot_type(void *data)
+{
+	__u8 *ptr = data;
+
+	return be16_to_cpu(*((__u16 *) ptr));
+}
+
+static inline __u8 get_hw_len(void *data)
+{
+	return ((__u8 *) data)[8];
+}
+
+static inline __u8 get_prot_size(void *data)
+{
+	return ((__u8 *) data)[9];
+}
+
+static inline __u16 get_opcode(const void *data)
+{
+	return be16_to_cpu(*((__u16 *) (&(((__u8 *) data)[10]))));
+}
+
+static inline __u32 get_sender_qpn(void *data)
+{
+	__u8 *ptr = data;
+
+	return (ptr[13] << 16) | (ptr[14] << 8) | ptr[15];
+}
+
+static inline const __u8 *get_sender_gid(void *data)
+{
+	return &(((__u8 *) data)[16]);
+}
+
+static inline void *arp_mac6_get_sender_ip(const void *data)
+{
+	return (__u8 *) data + 14;
+}
+
+static inline const void *arp_mac6_get_target_ip(const void *data)
+{
+	return data + 24;
+}
+
+static inline void arp_mac20_set_sender_ip(const void *ip, void *data)
+{
+	memcpy(((__u8 *) data) + 28, ip, 4);
+}
+
+static inline void arp_mac20_set_target_ip(const void *ip, void *data)
+{
+	memcpy(((__u8 *) data) + 52, ip, 4);
+}
+
+static inline void arp_mac20_set_sender_mac(const void *qpn, const void *gid,
+					    void *data)
+{
+	memcpy(((__u8 *) data) + 9, qpn, 3);
+	memcpy(((__u8 *) data) + 12, gid, 16);
+}
+
+static inline void arp_mac20_set_target_mac(void *qpn, void *gid, void *data)
+{
+	memcpy(((__u8 *) data) + 33, qpn, 3);
+	memcpy(((__u8 *) data) + 36, gid, 16);
+}
+
+static inline const void *arp_mac6_get_opcode(const void *data)
+{
+	return data + 6;
+}
+
+static inline void arp_mac20_set_opcode(const void *opcode, void *data)
+{
+	memcpy(data + 6, opcode, 2);
+}
+
+static inline const void *arp_mac6_get_target_mac(const void *data)
+{
+	return data + 18;
+}
+
+static inline const void *arp_mac20_get_sender_qpn(void *data)
+{
+	return ((__u8 *) data) + 13;
+}
+
+static inline const void *arp_mac20_get_sender_gid(void *data)
+{
+	return ((__u8 *) data) + 16;
+}
+
+static inline const void *arp_mac20_get_target_qpn(void *data)
+{
+	return ((__u8 *) data) + 37;
+}
+
+static inline const void *arp_mac20_get_target_gid(void *data)
+{
+	return ((__u8 *) data) + 40;
+}
+
+static inline const void *get_lptr_by_off(const void *packet, __u16 offset)
+{
+	return packet + offset;
+}
+
+static inline __u8 get_ip_protocl_type(const void *packet)
+{
+	const void *ptr;
+	__u8 prot;
+
+	ptr = get_lptr_by_off(packet, 9);
+
+	memcpy(&prot, ptr, 1);
+	return prot;
+}
+
+static inline __u16 get_udp_dest_port(const void *packet)
+{
+	const void *ptr;
+	__u16 port;
+
+	ptr = get_lptr_by_off(packet, 22);
+
+	memcpy(&port, ptr, 2);
+	return port;
+}
+
+static inline __u8 get_dhcp_message_type(const void *packet)
+{
+	const void *ptr;
+	__u8 type;
+
+	ptr = get_lptr_by_off(packet, 28);
+
+	memcpy(&type, ptr, 1);
+	return type;
+}
+
+static inline void set_hw_type(__u8 * packet)
+{
+	packet[29] = IPOIB_HW_TYPE;
+}
+
+static inline void zero_hw_len(__u8 * packet)
+{
+	packet[30] = 0;
+}
+
+static inline void set_udp_csum(__u8 * packet, __u16 val)
+{
+	__u16 *csum_ptr;
+
+	csum_ptr = (__u16 *) (packet + 26);
+
+	*csum_ptr = htons(val);
+}
+
+static inline void zero_chaddr(__u8 * packet)
+{
+	memset(packet + 56, 0, 16);
+}
+
+static inline void set_bcast_flag(__u8 * packet)
+{
+	packet[38] = 0x80;
+}
+
+static inline __u8 get_ip_protocl(void *buf)
+{
+	return ((__u8 *) buf)[9];
+}
+
+static inline __u16 get_udp_dst_port(void *buf)
+{
+	return be16_to_cpu(*((__u16 *) (((__u8 *) buf) + 0x16)));
+}
+
+static inline __u8 get_dhcp_msg_type(void *buf)
+{
+	return ((__u8 *) buf)[0x1c];
+}
+
+static inline void set_eth_hwtype(void *buf)
+{
+	((__u8 *) buf)[0x1d] = ETH_HW_TYPE;
+}
+
+static inline void set_eth_hwlen(void *buf)
+{
+	((__u8 *) buf)[0x1e] = 6;
+}
+
+static inline void add_udp_len(void *buf, __u16 size_add)
+{
+	__u16 old_len, *len_ptr;
+
+	len_ptr = (__u16 *) (((__u8 *) buf) + 24);
+	old_len = ntohs(*len_ptr);
+	*len_ptr = htons(old_len + size_add);
+}
+
+static inline void set_own_mac(void *buf)
+{
+	((__u8 *) buf)[0x38] = 0xff;	//MLX_ETH_BYTE0;
+	((__u8 *) buf)[0x39] = 0xff;	//MLX_ETH_BYTE1;
+	((__u8 *) buf)[0x3a] = 0xff;	//MLX_ETH_BYTE2;
+	((__u8 *) buf)[0x3b] = 0xff;	//0;
+	((__u8 *) buf)[0x3c] = 0xff;	//0;
+	((__u8 *) buf)[0x3d] = 0xff;	//0;
+}
+
+static int ipoib_handle_rcv(void *buf, void **out_buf_p,
+			    unsigned int *new_size_p, int *bcast_p);
+static int ipoib_send_packet(const __u8 * mac, __u16 protocol, const void *data,
+			     unsigned int size);
+static int ipoib_init(struct pci_device *pci);
+static u8 *get_port_gid(void);
+static int ipoib_read_packet(__u16 * prot_p, void *data, unsigned int *size_p,
+			     int *is_bcast_p);
+
+#endif				/* __ipoib_h__ */

src/drivers/net/mlx_ipoib/mad_attrib.h

@@ -0,0 +1,244 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+#ifndef __mad_attrib_h_
+#define __mad_attrib_h_
+
+#include "ib_mad.h"
+
+#define IB_SA_ATTR_MC_MEMBER_REC 0x38
+#define IB_SA_ATTR_PATH_REC 0x35
+
+#define IB_SA_MCMEMBER_REC_MGID						(1<<0)
+#define IB_SA_MCMEMBER_REC_PORT_GID					(1<<1)
+#define IB_SA_MCMEMBER_REC_QKEY						(1<<2)
+#define IB_SA_MCMEMBER_REC_MLID						(1<<3)
+#define IB_SA_MCMEMBER_REC_MTU_SELECTOR				(1<<4)
+#define IB_SA_MCMEMBER_REC_MTU						(1<<5)
+#define IB_SA_MCMEMBER_REC_TRAFFIC_CLASS			(1<<6)
+#define IB_SA_MCMEMBER_REC_PKEY						(1<<7)
+#define IB_SA_MCMEMBER_REC_RATE_SELECTOR			(1<<8)
+#define IB_SA_MCMEMBER_REC_RATE						(1<<9)
+#define IB_SA_MCMEMBER_REC_PACKET_LIFE_TIME_SELECTOR	(1<<10)
+#define IB_SA_MCMEMBER_REC_PACKET_LIFE_TIME			(1<<11)
+#define IB_SA_MCMEMBER_REC_SL						(1<<12)
+#define IB_SA_MCMEMBER_REC_FLOW_LABEL				(1<<13)
+#define IB_SA_MCMEMBER_REC_HOP_LIMIT				(1<<14)
+#define IB_SA_MCMEMBER_REC_SCOPE					(1<<15)
+#define IB_SA_MCMEMBER_REC_JOIN_STATE				(1<<16)
+#define IB_SA_MCMEMBER_REC_PROXY_JOIN				(1<<17)
+
+#define IB_SA_PATH_REC_DGID		(1<<2)
+#define IB_SA_PATH_REC_SGID		(1<<3)
+
+struct port_info_st {
+	__u32 mkey[2];
+	__u32 gid_prefix[2];
+	__u16 mastersm_lid;
+	__u16 lid;
+	__u32 cap_mask;
+	__u32 combined2;
+			/*__u32 mkey_lease_period:16;
+			__u32 diag_code:16;*/
+	__u32 combined3;
+			/*__u32 link_width_active:8;
+			__u32 link_width_supported:8;
+			__u32 link_width_enabled:8;
+			__u32 local_port_num:8;*/
+	__u32 combined4;
+			/*__u32 link_speed_enabled:4;
+			__u32 link_speed_active:4;
+			__u32 lmc:3;
+			__u32 r1:3;
+			__u32 mkey_prot_bits:2;
+			__u32 link_down_def_state:4;
+			__u32 port_phys_state:4;
+			__u32 port_state:4;
+			__u32 link_speed_supported:4;*/
+	__u32 combined5;
+			/*__u32 vl_arb_hi_cap:8;
+			__u32 vl_hi_limit:8;
+			__u32 init_type:4;
+			__u32 vl_cap:4;
+			__u32 master_smsl:4;
+			__u32 neigh_mtu:4;*/
+	__u32 combined6;
+			/*__u32 filt_raw_oub:1;
+			__u32 filt_raw_inb:1;
+			__u32 part_enf_oub:1;
+			__u32 part_enf_inb:1;
+			__u32 op_vls:4;
+			__u32 hoq_life:5;
+			__u32 vl_stall_count:3;
+			__u32 mtu_cap:4;
+			__u32 init_type_reply:4;
+			__u32 vl_arb_lo_cap:8;*/
+	__u32 combined7;
+			/*__u32 pkey_viol:16;
+			__u32 mkey_viol:16;*/
+	__u32 combined8;
+			/*__u32 subn_tout:5;
+			__u32 r2:2;
+			__u32 client_rereg:1;
+			__u32 guid_cap:8;
+			__u32 qkey_viol:16;*/
+	__u32 combined9;
+			/*__u32 max_cred_hint:16;
+			__u32 overrun_err:4;
+			__u32 local_phy_err:4;
+			__u32 resp_t_val:5;
+			__u32 r3:3;*/
+	__u32 combined10;
+			/*__u32 r4:8;
+			__u32 link_rtrip_lat:24;*/
+} __attribute__ ((packed));
+
+struct port_info_mad_st {
+	struct ib_mad_hdr_st mad_hdr;
+	__u32 mkey[2];
+	__u32 r1[8];
+	struct port_info_st port_info;
+} __attribute__ ((packed));
+
+union port_info_mad_u {
+	__u8 raw[256];
+	struct port_info_mad_st mad;
+} __attribute__ ((packed));
+
+struct guid_info_st {
+	union ib_gid_u gid_tbl[8];
+} __attribute__ ((packed));
+
+struct guid_info_mad_st {
+	struct ib_mad_hdr_st mad_hdr;
+	__u32 mkey[2];
+	__u32 r1[8];
+	struct guid_info_st guid_info;
+} __attribute__ ((packed));
+
+union guid_info_mad_u {
+	__u8 raw[256];
+	struct guid_info_mad_st mad;
+} __attribute__ ((packed));
+
+struct mc_member_st {
+	__u8 mgid[16];
+	__u8 port_gid[16];
+	__u32 q_key;
+	__u32 combined1;
+			/*__u32	tclass:8;
+			__u32 mtu:6;
+			__u32 mtu_selector:2;
+			__u32 mlid:16;*/
+	__u32 combined2;
+			/*__u32 packet_liftime:6;
+			__u32 packet_liftime_selector:2;
+			__u32 rate:6;
+			__u32 rate_selector:2;
+			__u32 pkey:16;*/
+	__u32 combined3;
+			/*__u32 hop_limit:8;
+			__u32 flow_label:20;
+			__u32 sl:4;*/
+	__u32 combined4;
+			/*__u32 r0:23;
+			__u32 proxy_join:1;
+			__u32 join_state:4;
+			__u32 scope:4;*/
+} __attribute__ ((packed));
+
+struct mc_member_mad_st {
+	struct ib_mad_hdr_st mad_hdr;
+	struct rmpp_hdr_st rmpp_hdr;
+	struct sa_header_st sa_hdr;
+	struct mc_member_st mc_member;
+} __attribute__ ((packed));
+
+union mc_member_mad_u {
+	struct mc_member_mad_st mc_member;
+	__u8 raw[256];
+} __attribute__ ((packed));
+
+struct pkey_tbl_st {
+	__u16 pkey_tbl[16][2];
+} __attribute__ ((packed));
+
+struct pkey_tbl_mad_st {
+	struct ib_mad_hdr_st mad_hdr;
+	__u32 mkey[2];
+	__u32 r1[8];
+	struct pkey_tbl_st pkey_tbl;
+} __attribute__ ((packed));
+
+union pkey_tbl_mad_u {
+	struct pkey_tbl_mad_st mad;
+	__u8 raw[256];
+} __attribute__ ((packed));
+
+struct path_record_st {
+	__u32 r0[2];
+	union ib_gid_u dgid;
+	union ib_gid_u sgid;
+	__u16 slid;
+	__u16 dlid;
+	__u32 combined1;
+			/*__u32	hop_limit:8;
+			__u32 flow_label:20;
+			__u32 r1:3;
+			__u32 raw_traffic:1;*/
+	__u32 combined2;
+			/*__u32 pkey:16;
+			__u32 numb_path:7;
+			__u32 reversible:1;
+			__u32 tclass:8;*/
+	__u32 combined3;
+			/*__u32 rate:6;
+			__u32 rate_selector:2;
+			__u32 mtu:6;
+			__u32 mtu_selector:2;
+			__u32 sl:4;
+			__u32 reserved:12;*/
+	__u32 combined4;
+			/*__u32 r2:16;
+			__u32 preference:8;
+			__u32 packet_lifetime:6;
+			__u32 packet_lifetime_selector:2;*/
+	__u32 r3;
+} __attribute__ ((packed));
+
+struct path_record_mad_st {
+	struct ib_mad_hdr_st mad_hdr;
+	struct rmpp_hdr_st rmpp_hdr;
+	struct sa_header_st sa_hdr;
+	struct path_record_st path_record;
+} __attribute__ ((packed));
+
+union path_record_mad_u {
+	struct path_record_mad_st mad;
+	__u8 raw[256];
+} __attribute__ ((packed));
+
+static int get_port_info(__u8 port, struct port_info_st *buf, __u16 * status);
+static int get_guid_info(__u16 * status);
+static int get_pkey_tbl(struct pkey_tbl_st *pkey_tbl, __u16 * status);
+static int join_mc_group(__u32 * qkey_p, __u16 * mlid_p, __u8 join);
+
+#endif				/* __mad_attrib_h_ */

src/drivers/net/mlx_ipoib/mt23108.c

@@ -0,0 +1,245 @@
+/**************************************************************************
+Etherboot -  BOOTP/TFTP Bootstrap Program
+Skeleton NIC driver for Etherboot
+***************************************************************************/
+
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2, or (at
+ * your option) any later version.
+ */
+
+/* to get some global routines like printf */
+#include "etherboot.h"
+/* to get the interface to the body of the program */
+#include "nic.h"
+/* to get the PCI support functions, if this is a PCI NIC */
+#include "pci.h"
+/* to get the ISA support functions, if this is an ISA NIC */
+#include "isa.h"
+
+#include "mt_version.c"
+#include "mt23108_imp.c"
+
+/* NIC specific static variables go here */
+
+int prompt_key(int secs, unsigned char *ch_p)
+{
+	unsigned long tmo;
+	unsigned char ch;
+
+	for (tmo = currticks() + secs * TICKS_PER_SEC; currticks() < tmo;) {
+		if (iskey()) {
+			ch = getchar();
+			/* toupper does not work ... */
+			if (ch == 'v')
+				ch = 'V';
+			if (ch == 'i')
+				ch = 'I';
+			if ((ch=='V') || (ch=='I')) {
+				*ch_p = ch;
+				return 1;
+			}
+		}
+	}
+
+	return 0;
+}
+
+/**************************************************************************
+IRQ - handle interrupts
+***************************************************************************/
+static void tavor_irq(struct nic *nic, irq_action_t action)
+{
+	/* This routine is somewhat optional.  Etherboot itself
+	 * doesn't use interrupts, but they are required under some
+	 * circumstances when we're acting as a PXE stack.
+	 *
+	 * If you don't implement this routine, the only effect will
+	 * be that your driver cannot be used via Etherboot's UNDI
+	 * API.  This won't affect programs that use only the UDP
+	 * portion of the PXE API, such as pxelinux.
+	 */
+
+	if (0) {
+		nic = NULL;
+	}
+	switch (action) {
+	case DISABLE:
+	case ENABLE:
+		/* Set receive interrupt enabled/disabled state */
+		/*
+		   outb ( action == ENABLE ? IntrMaskEnabled : IntrMaskDisabled,
+		   nic->ioaddr + IntrMaskRegister );
+		 */
+		break;
+	case FORCE:
+		/* Force NIC to generate a receive interrupt */
+		/*
+		   outb ( ForceInterrupt, nic->ioaddr + IntrForceRegister );
+		 */
+		break;
+	}
+}
+
+/**************************************************************************
+POLL - Wait for a frame
+***************************************************************************/
+static int tavor_poll(struct nic *nic, int retrieve)
+{
+	/* Work out whether or not there's an ethernet packet ready to
+	 * read.  Return 0 if not.
+	 */
+	/* 
+	   if ( ! <packet_ready> ) return 0;
+	 */
+
+	/* retrieve==0 indicates that we are just checking for the
+	 * presence of a packet but don't want to read it just yet.
+	 */
+	/*
+	   if ( ! retrieve ) return 1;
+	 */
+
+	/* Copy data to nic->packet.  Data should include the
+	 * link-layer header (dest MAC, source MAC, type).
+	 * Store length of data in nic->packetlen.
+	 * Return true to indicate a packet has been read.
+	 */
+	/* 
+	   nic->packetlen = <packet_length>;
+	   memcpy ( nic->packet, <packet_data>, <packet_length> );
+	   return 1;
+	 */
+	unsigned int size;
+	int rc;
+	rc = poll_imp(nic, retrieve, &size);
+	if (rc) {
+		return 0;
+	}
+
+	if (size == 0) {
+		return 0;
+	}
+
+	nic->packetlen = size;
+
+	return 1;
+}
+
+/**************************************************************************
+TRANSMIT - Transmit a frame
+***************************************************************************/
+static void tavor_transmit(struct nic *nic, const char *dest,	/* Destination */
+			   unsigned int type,	/* Type */
+			   unsigned int size,	/* size */
+			   const char *packet)
+{				/* Packet */
+	int rc;
+
+	/* Transmit packet to dest MAC address.  You will need to
+	 * construct the link-layer header (dest MAC, source MAC,
+	 * type).
+	 */
+	if (nic) {
+		rc = transmit_imp(dest, type, packet, size);
+		if (rc)
+			eprintf("tranmit error");
+	}
+}
+
+/**************************************************************************
+DISABLE - Turn off ethernet interface
+***************************************************************************/
+static void tavor_disable(struct dev *dev)
+{
+	/* put the card in its initial state */
+	/* This function serves 3 purposes.
+	 * This disables DMA and interrupts so we don't receive
+	 *  unexpected packets or interrupts from the card after
+	 *  etherboot has finished. 
+	 * This frees resources so etherboot may use
+	 *  this driver on another interface
+	 * This allows etherboot to reinitialize the interface
+	 *  if something is something goes wrong.
+	 */
+	if (dev || 1) {		// ????
+		disable_imp();
+	}
+}
+
+/**************************************************************************
+PROBE - Look for an adapter, this routine's visible to the outside
+***************************************************************************/
+
+static int tavor_probe(struct dev *dev, struct pci_device *pci)
+{
+	struct nic *nic = (struct nic *)dev;
+	int rc;
+	unsigned char user_request;
+
+	if (pci->vendor != MELLANOX_VENDOR_ID) {
+		eprintf("");
+		return 0;
+	}
+
+	printf("\n");
+	printf("Mellanox Technologies LTD - Boot over IB implementaion\n");
+	printf("Build version = %s\n\n", build_revision);
+
+	verbose_messages = 0;
+        print_info = 0;
+	printf("Press within 3 seconds:\n");
+	printf("V - to increase verbosity\n");
+	printf("I - to print information\n");
+	if (prompt_key(3, &user_request)) {
+		if (user_request == 'V') {
+			printf("User selected verbose messages\n");
+			verbose_messages = 1;
+		}
+		else if (user_request == 'I') {
+			printf("User selected to print information\n");
+			print_info = 1;
+		}
+	}
+	printf("\n");
+
+	adjust_pci_device(pci);
+
+	nic->priv_data = NULL;
+	rc = probe_imp(pci, nic);
+
+	/* give the user a chance to look at the info */
+	if (print_info)
+		sleep(5);
+
+	if (!rc) {
+		/* store NIC parameters */
+		nic->ioaddr = pci->ioaddr & ~3;
+		nic->irqno = pci->irq;
+		/* point to NIC specific routines */
+		dev->disable = tavor_disable;
+		nic->poll = tavor_poll;
+		nic->transmit = tavor_transmit;
+		nic->irq = tavor_irq;
+
+		return 1;
+	}
+	/* else */
+	return 0;
+}
+
+static struct pci_id tavor_nics[] = {
+	PCI_ROM(0x15b3, 0x5a44, "MT23108", "MT23108 HCA driver"),
+	PCI_ROM(0x15b3, 0x6278, "MT25208", "MT25208 HCA driver"),
+};
+
+static struct pci_driver tavor_driver __pci_driver = {
+	.type = NIC_DRIVER,
+	.name = "MT23108/MT25208",
+	.probe = tavor_probe,
+	.ids = tavor_nics,
+	.id_count = sizeof(tavor_nics) / sizeof(tavor_nics[0]),
+	.class = 0,
+};

src/drivers/net/mlx_ipoib/mt23108.h

@@ -0,0 +1,543 @@
+#ifndef __mt23108_h__
+#define __mt23108_h__
+
+#include "MT23108_PRM.h"
+#include "ib_mad.h"
+
+#define TAVOR_DEVICE_ID		0x5a44
+#define TAVOR_BRIDGE_DEVICE_ID 0x5a46
+#define ARTAVOR_DEVICE_ID	0x6278
+
+#define TAVOR_RESET_OFFSET 0xF0010
+
+/*
+ * Tavor specific command
+ *	Only coomands that are specific to Tavor
+ *  and used by the driver are listed here
+ */
+#define TAVOR_CMD_SYS_EN	0x1
+#define TAVOR_CMD_SYS_DIS	0x2
+
+#define TAVOR_CMD_WRITE_MGM		0x26
+#define TAVOR_CMD_MOD_STAT_CFG	0x34
+#define TAVOR_CMD_QUERY_DEV_LIM   0x003
+#define TAVOR_CMD_QUERY_FW		0x004
+
+/*
+ * Tavor specific event types
+ *	Only event types that are specific to Tavor
+ *  and are used by the driver are listed here
+ */
+#define TAVOR_IF_EV_TYPE_OVERRUN	0x0F
+
+/*
+ * EQ doorbel commands
+ */
+#define EQ_DBELL_CMD_INC_CONS_IDX 1	/* increment Consumer_indx by one */
+#define EQ_DBELL_CMD_ARM_EQ       2	/* Request notifcation for next event (Arm EQ) */
+#define EQ_DBELL_CMD_DISARM_CQ    3	/* Disarm CQ (CQ number is specified in EQ_param) */
+#define EQ_DBELL_CMD_SET_CONS_IDX 4	/* set Consumer_indx to value of EQ_param */
+#define EQ_DBELL_CMD_ALWAYS_ARM   5	/* move EQ to Always Armed state */
+
+/*
+ * CQ doorbel commands
+ */
+#define CQ_DBELL_CMD_INC_CONS_IDX 1
+#define CQ_DBELL_CMD_REQ_NOTIF_SOL_UNSOL 2
+#define CQ_DBELL_CMD_REQ_NOTIF_SOL 3
+#define CQ_DBELL_CMD_SET_CONS_IDX 4
+#define CQ_DBELL_CMD_REQ_NOTIF_MULT 5
+
+#define INPRM_BUF_SZ 0x200
+#define INPRM_BUF_ALIGN 16
+#define OUTPRM_BUF_SZ 0x200
+#define OUTPRM_BUF_ALIGN 16
+
+/*
+ *  sizes of parameter blocks used in certain
+ *	commands.
+ *  TODO: replace them with sizeof
+ *  operators of the appropriate structs
+ */
+#define SW2HW_MPT_IBUF_SZ	 MT_STRUCT_SIZE(tavorprm_mpt_st)
+#define SW2HW_EQ_IBUF_SZ	 MT_STRUCT_SIZE(tavorprm_eqc_st)
+#define INIT_IB_IBUF_SZ		 0x100
+#define SW2HW_CQ_IBUF_SZ	 0x40
+#define QPCTX_IBUF_SZ		 0x200
+
+#define EQN 0
+#define UAR_IDX 1
+
+#define QPC_OFFSET 0
+#define CQC_OFFSET (QPC_OFFSET + 0x100000)
+#define EQPC_OFFSET (CQC_OFFSET + 0x100000)
+#define EQC_OFFSET (EQPC_OFFSET + 0x100000)
+#define MC_BASE_OFFSET (EQC_OFFSET + 0x100000)
+#define MPT_BASE_OFFSET (MC_BASE_OFFSET + 0x100000)
+#define MTT_BASE_OFFSET (MPT_BASE_OFFSET + 0x100000)
+
+#define LOG2_QPS 7
+#define LOG2_CQS 8
+#define LOG2_EQS 6
+#define LOG2_MC_ENTRY 6		/* 8 QPs per group */
+#define LOG2_MC_GROUPS 3	/* 8 groups */
+#define LOG2_MPT_ENTRIES 5
+
+#define LOG2_EQ_SZ 5
+#define LOG2_CQ_SZ 5
+
+#define NUM_PORTS 2
+
+#define EQE_OWNER_SW 0
+#define EQE_OWNER_HW 1
+
+#define OWNER_HW 1
+#define OWNER_SW 0
+
+#define POST_RCV_OFFSET 0x18
+#define POST_SND_OFFSET 0x10
+#define CQ_DBELL_OFFSET 0x20
+#define EQ_DBELL_OFFSET 0x28
+
+#define CQE_ERROR_OPCODE 0xfe
+
+#define MAX_GATHER 1		/* max gather entries used in send */
+#define MAX_SCATTER 2
+
+#define LOG2_MADS_SND_CQ_SZ LOG2_CQ_SZ
+#define LOG2_MADS_RCV_CQ_SZ LOG2_CQ_SZ
+#define LOG2_IPOIB_SND_CQ_SZ LOG2_CQ_SZ
+#define LOG2_IPOIB_RCV_CQ_SZ LOG2_CQ_SZ
+
+#define NUM_MADS_SND_CQES (1<<LOG2_MADS_SND_CQ_SZ)
+#define NUM_MADS_RCV_CQES (1<<LOG2_MADS_RCV_CQ_SZ)
+#define NUM_IPOIB_SND_CQES (1<<LOG2_IPOIB_SND_CQ_SZ)
+#define NUM_IPOIB_RCV_CQES (1<<LOG2_IPOIB_RCV_CQ_SZ)
+
+#define NUM_MADS_RCV_WQES 3
+#define NUM_IPOIB_RCV_WQES 8
+
+#if NUM_MADS_RCV_WQES > NUM_IPOIB_RCV_WQES
+#define MAX_RCV_WQES NUM_MADS_RCV_WQES
+#else
+#define MAX_RCV_WQES NUM_IPOIB_RCV_WQES
+#endif
+
+#define NUM_MADS_SND_WQES 2
+#define NUM_IPOIB_SND_WQES 2
+
+#if NUM_MADS_SND_WQES > NUM_IPOIB_SND_WQES
+#define MAX_SND_WQES NUM_MADS_SND_WQES
+#else
+#define MAX_SND_WQES NUM_IPOIB_SND_WQES
+#endif
+
+struct ib_buffers_st {
+	__u8 send_mad_buf[NUM_MADS_SND_WQES][MAD_BUF_SZ];
+	__u8 rcv_mad_buf[NUM_MADS_RCV_WQES][MAD_BUF_SZ + GRH_SIZE];
+	__u8 ipoib_rcv_buf[NUM_IPOIB_RCV_WQES][IPOIB_RCV_BUF_SZ + GRH_SIZE];
+	__u8 ipoib_rcv_grh_buf[NUM_IPOIB_RCV_WQES][IPOIB_RCV_BUF_SZ];
+	__u8 send_ipoib_buf[NUM_IPOIB_SND_WQES][IPOIB_SND_BUF_SZ];
+};
+
+struct pcidev {
+	unsigned long bar[6];
+	__u32 dev_config_space[64];
+	struct pci_device *dev;
+	__u8 bus;
+	__u8 devfn;
+};
+
+struct dev_pci_struct {
+	struct pcidev dev;
+	struct pcidev br;
+	void *cr_space;
+	void *uar;
+};
+
+struct eq_st {
+	__u8 eqn;
+	__u32 cons_idx;
+	__u32 eq_size;
+	struct eqe_t *eq_buf;
+};
+
+struct udav_st {
+	union ud_av_u *av_array;
+	__u8 udav_next_free;
+};
+
+#if 0
+struct udavtable_memory_parameters_st {
+	__u32 lkey;
+	__u32 pd:24;
+	__u32 r0:5;
+	__u32 xlation_en:1;
+	__u32 r1:2;
+} __attribute__ ((packed));
+
+struct multicast_parameters_st {
+	__u32 mc_base_addr_h;
+	__u32 mc_base_addr_l;
+	__u32 r0[2];
+	__u32 log_mc_table_entry_sz:16;
+	__u32 r1:16;
+	__u32 mc_table_hash_sz:17;
+	__u32 r2:15;
+	__u32 log_mc_table_sz:5;
+	__u32 r3:19;
+	__u32 mc_hash_fn:3;
+	__u32 r4:5;
+	__u32 r5;
+} __attribute__ ((packed));
+
+struct tpt_parameters_st {
+	__u32 mpt_base_addr_h;
+	__u32 mpt_base_addr_l;
+
+	__u32 log_mpt_sz:6;
+	__u32 r0:2;
+	__u32 pfto:5;
+	__u32 r1:3;
+	__u32 mtt_segment_size:3;
+	__u32 r2:13;
+
+	__u32 mtt_version:8;
+	__u32 r3:24;
+
+	__u32 mtt_base_addr_h;
+	__u32 mtt_base_addr_l;
+	__u32 r4[2];
+} __attribute__ ((packed));
+
+struct uar_parameters_st {
+	__u32 uar_base_addr_h;
+	__u32 uar_base_addr_l;	/* 12 lsbs must be zero */
+	__u32 uar_page_sz:8;
+	__u32 r1:24;
+	__u32 r2;
+	__u32 uar_scratch_base_addr_h;
+	__u32 uar_scratch_base_addr_l;
+	__u32 r3[3];
+} __attribute__ ((packed));
+
+struct comp_event_data_st {
+	__u32 cqn:24;
+	__u32 r1:8;
+	__u32 r2[5];
+} __attribute__ ((packed));
+
+struct qp_event_data_st {
+	__u32 qpn_een:24;
+	__u32 r1:8;
+	__u32 r2;
+	__u32 r3:28;
+	__u32 e_q:1;
+	__u32 r4:3;
+	__u32 r5[3];
+} __attribute__ ((packed));
+
+struct port_state_change_event_data_st {
+	__u32 r0[2];
+	__u32 r1:28;
+	__u32 port:2;
+	__u32 r2:2;
+	__u32 r3[3];
+} __attribute__ ((packed));
+#endif
+
+struct eqe_t {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_event_queue_entry_st)];
+} __attribute__ ((packed));
+
+enum qp_state_e {
+	QP_STATE_RST = 0,
+	QP_STATE_INIT = 1,
+	QP_STATE_RTR = 2,
+	QP_STATE_RTS = 3,
+	QP_STATE_SQEr = 4,
+	QP_STATE_SQD = 5,
+	QP_STATE_ERR = 6,
+	QP_STATE_SQDING = 7,
+	QP_STATE_SUSPEND = 9
+};
+
+struct memory_pointer_st {
+	__u32 byte_count;
+	__u32 lkey;
+	__u32 local_addr_h;
+	__u32 local_addr_l;
+} __attribute__ ((packed));
+
+/* receive wqe descriptor */
+struct recv_wqe_st {
+	/* part referenced by hardware */
+	__u8 next[MT_STRUCT_SIZE(wqe_segment_next_st)];
+	__u8 control[MT_STRUCT_SIZE(wqe_segment_ctrl_recv_st)];
+	struct memory_pointer_st mpointer[MAX_SCATTER];
+} __attribute__ ((packed));
+
+struct recv_wqe_cont_st {
+	struct recv_wqe_st wqe;
+
+	struct udqp_st *qp;	/* qp this wqe is used with */
+} __attribute__ ((packed));
+
+#define RECV_WQE_U_ALIGN 64
+union recv_wqe_u {
+	__u8 align[(sizeof(struct recv_wqe_cont_st) + RECV_WQE_U_ALIGN - 1) & (~(RECV_WQE_U_ALIGN - 1))];	/* this ensures proper alignment */
+	struct recv_wqe_st wqe;
+	struct recv_wqe_cont_st wqe_cont;
+} __attribute__ ((packed));
+
+struct recv_doorbell_st {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_receive_doorbell_st)];
+} __attribute__ ((packed));
+
+struct send_doorbell_st {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_send_doorbell_st)];
+} __attribute__ ((packed));
+
+struct next_control_seg_st {
+	__u8 next[MT_STRUCT_SIZE(wqe_segment_next_st)];
+	__u8 control[MT_STRUCT_SIZE(wqe_segment_ctrl_send_st)];
+} __attribute__ ((packed));
+
+struct ud_seg_st {
+	__u32 r1;
+	__u32 lkey;
+	__u32 av_add_h;
+	__u32 av_add_l;
+	__u32 r2[4];
+	__u32 dest_qp;
+	__u32 qkey;
+	__u32 r3[2];
+} __attribute__ ((packed));
+
+struct ud_send_wqe_st {
+	struct next_control_seg_st next;
+	struct ud_seg_st udseg;
+	struct memory_pointer_st mpointer[MAX_GATHER];
+} __attribute__ ((packed));
+
+struct ude_send_wqe_cont_st {
+	struct ud_send_wqe_st wqe;
+
+	struct udqp_st *qp;	/* qp this wqe is used with */
+} __attribute__ ((packed));
+
+#define UD_SEND_WQE_U_ALIGN 64
+union ud_send_wqe_u {
+	__u8 align[(sizeof(struct ude_send_wqe_cont_st) + UD_SEND_WQE_U_ALIGN -
+		    1) & (~(UD_SEND_WQE_U_ALIGN - 1))];
+	struct ude_send_wqe_cont_st wqe_cont;
+	struct ud_send_wqe_st wqe;
+} __attribute__ ((packed));
+
+#define ADDRESS_VECTOR_ST_ALIGN 64
+struct address_vector_st {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_ud_address_vector_st)];
+} __attribute__ ((packed));
+
+struct ud_av_st {
+	struct address_vector_st av;
+	__u32 dest_qp;		/* destination qpn */
+	__u8 next_free;
+} __attribute__ ((packed));
+
+union ud_av_u {
+	__u8 raw[(sizeof(struct ud_av_st) + ADDRESS_VECTOR_ST_ALIGN -
+		  1) & (~(ADDRESS_VECTOR_ST_ALIGN - 1))];
+	struct ud_av_st ud_av;
+} __attribute__ ((packed));
+
+union cqe_st {
+	__u8 good_cqe[MT_STRUCT_SIZE(tavorprm_completion_queue_entry_st)];
+	__u8 error_cqe[MT_STRUCT_SIZE(tavorprm_completion_with_error_st)];
+} __attribute__ ((packed));
+
+struct address_path_st {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_address_path_st)];
+};
+
+struct qp_ee_ctx_t {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_queue_pair_ee_context_entry_st)];
+} __attribute__ ((packed));
+
+struct qp_ee_state_tarnisition_st {
+	__u32 opt_param_mask;
+	__u32 r1;
+	struct qp_ee_ctx_t ctx;
+	__u32 r2[62];
+} __attribute__ ((packed));
+
+struct eq_dbell_st {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_eq_cmd_doorbell_st)];
+} __attribute__ ((packed));
+
+struct cq_dbell_st {
+	__u8 raw[MT_STRUCT_SIZE(tavorprm_cq_cmd_doorbell_st)];
+} __attribute__ ((packed));
+
+struct mad_ifc_inprm_st {
+	union mad_u mad;
+} __attribute__ ((packed));
+
+struct wqe_buf_st {
+	struct ud_send_wqe_st *sndq;
+	struct recv_wqe_st *rcvq;
+};
+
+struct mad_buffer_st {
+	void *buf;		/* pointer to a 256 byte buffer */
+	__u8 owner;		/* sw or hw ownership BUF_OWNER_SW or BUF_OWNER_HW */
+};
+
+struct rcv_buf_st {
+	void *buf;
+	__u8 busy;
+};
+
+struct ib_eqe_st {
+	__u8 event_type;
+	__u32 cqn;
+};
+
+struct cq_st {
+	__u32 cqn;
+	union cqe_st *cq_buf;
+	__u32 cons_idx;
+	__u8 num_cqes;
+};
+
+struct udqp_st {
+	/* cq used by this QP */
+	struct cq_st snd_cq;
+	struct cq_st rcv_cq;
+
+	/* QP related data */
+	__u32 qpn;		/* QP number */
+
+	__u32 qkey;
+
+	__u8 recv_wqe_cur_free;
+	__u8 recv_wqe_alloc_idx;
+	__u8 max_recv_wqes;
+	void *rcv_bufs[MAX_RCV_WQES];
+	union recv_wqe_u *rcv_wq;	/* receive work queue */
+	struct recv_wqe_st *last_posted_rcv_wqe;
+
+	__u8 snd_wqe_cur_free;
+	__u8 snd_wqe_alloc_idx;
+	__u8 max_snd_wqes;
+	void *snd_bufs[MAX_SND_WQES];
+	__u16 send_buf_sz;
+	__u16 rcv_buf_sz;
+	union ud_send_wqe_u *snd_wq;	/* send work queue */
+	struct ud_send_wqe_st *last_posted_snd_wqe;
+};
+
+struct device_ib_data_st {
+	__u32 mkey;
+	__u32 pd;
+	__u8 port;
+	__u32 qkey;
+	struct eq_st eq;
+	struct udav_st udav;
+	struct udqp_st mads_qp;
+	struct udqp_st ipoib_qp;
+	void *error_buf_addr;
+	__u32 error_buf_size;
+};
+
+
+
+struct query_fw_st {
+	__u16 fw_rev_major;
+	__u16 fw_rev_minor;
+	__u16 fw_rev_subminor;
+	__u32 error_buf_start_h;
+	__u32 error_buf_start_l;
+	__u32 error_buf_size;
+};
+
+
+struct dev_lim_st {
+	__u8 log2_rsvd_qps;
+	__u16 qpc_entry_sz;
+
+	__u8 log2_rsvd_srqs;
+	__u16 srq_entry_sz;
+
+	__u8 log2_rsvd_ees;
+	__u16 eec_entry_sz;
+
+	__u8 log2_rsvd_cqs;
+	__u16 cqc_entry_sz;
+
+	__u8 log2_rsvd_mtts;
+	__u16 mtt_entry_sz;
+
+	__u8 log2_rsvd_mrws;
+	__u16 mpt_entry_sz;
+
+	__u16 eqc_entry_sz;
+};
+
+struct init_hca_st {
+	__u32 qpc_base_addr_h;
+	__u32 qpc_base_addr_l;
+	__u8 log_num_of_qp;
+
+	__u32 eec_base_addr_h;
+	__u32 eec_base_addr_l;
+	__u8 log_num_of_ee;
+
+	__u32 srqc_base_addr_h;
+	__u32 srqc_base_addr_l;
+	__u8 log_num_of_srq;
+
+	__u32 cqc_base_addr_h;
+	__u32 cqc_base_addr_l;
+	__u8 log_num_of_cq;
+
+	__u32 eqpc_base_addr_h;
+	__u32 eqpc_base_addr_l;
+
+	__u32 eeec_base_addr_h;
+	__u32 eeec_base_addr_l;
+
+	__u32 eqc_base_addr_h;
+	__u32 eqc_base_addr_l;
+	__u8 log_num_of_eq;
+
+	__u32 rdb_base_addr_h;
+	__u32 rdb_base_addr_l;
+
+	__u32 mc_base_addr_h;
+	__u32 mc_base_addr_l;
+	__u16 log_mc_table_entry_sz;
+	__u32 mc_table_hash_sz;
+	__u8 log_mc_table_sz;
+
+	__u32 mpt_base_addr_h;
+	__u32 mpt_base_addr_l;
+	__u8 log_mpt_sz;
+	__u32 mtt_base_addr_h;
+	__u32 mtt_base_addr_l;
+	__u8 log_max_uars;
+};
+
+static int create_udqp(struct udqp_st *qp);
+static int destroy_udqp(struct udqp_st *qp);
+static void *get_send_wqe_buf(void *wqe, __u8 index);
+static void *get_rcv_wqe_buf(void *wqe, __u8 index);
+
+static struct recv_wqe_st *alloc_rcv_wqe(struct udqp_st *qp);
+static int free_wqe(void *wqe);
+static int poll_cq(void *cqh, union cqe_st *cqe_p, __u8 * num_cqes);
+static int poll_eq(struct ib_eqe_st *ib_eqe_p, __u8 * num_eqes);
+static int post_rcv_buf(struct udqp_st *qp, struct recv_wqe_st *rcv_wqe);
+static __u32 dev_get_qpn(void *qph);
+
+#endif				/* __mt23108_h__ */

src/drivers/net/mlx_ipoib/mt23108_imp.c

@@ -0,0 +1,230 @@
+typedef uint32_t __u32;
+typedef uint16_t __u16;
+typedef uint8_t __u8;
+
+static int verbose_messages=0;
+static int print_info=0;
+static int fatal_condition=0;
+static int fw_fatal;
+
+#define tprintf(fmt, a...) \
+		 do {    \
+			if ( verbose_messages ) { \
+				printf("%s:%d: " fmt "\n", __func__, __LINE__,  ##a); \
+			} \
+		 } \
+		 while(0)
+
+#define eprintf(fmt, a...) \
+		 printf("%s:%d: " fmt "\n", __func__, __LINE__,  ##a)
+
+static void cpu_to_be_buf(void *buf, int size)
+{
+	int dw_sz = size >> 2, i;
+
+	for (i = 0; i < dw_sz; ++i) {
+		((__u32 *) buf)[i] = cpu_to_be32(((__u32 *) buf)[i]);
+	}
+}
+
+static void be_to_cpu_buf(void *buf, int size)
+{
+	int dw_sz = size >> 2, i;
+	u32 *p = buf;
+
+	for (i = 0; i < dw_sz; ++i) {
+		p[i] = be32_to_cpu(p[i]);
+	}
+}
+
+#include "timer.h"
+#include "cmdif_mt23108.c"
+#include "cmdif_comm.c"
+#include "ib_mt23108.c"
+#include "ib_mad.c"
+#include "ib_driver.c"
+#include "ipoib.c"
+
+static int probe_imp(struct pci_device *pci, struct nic *nic)
+{
+	int rc;
+
+	if (0 && nic) {		/* just to supress warning */
+		return 0;
+	}
+
+	fatal_condition= 0;
+	fw_fatal= 0;
+
+	tprintf("");
+	rc = ipoib_init(pci);
+	if (rc)
+		return rc;
+
+	tprintf("");
+
+	return rc;
+}
+
+static int disable_imp(void)
+{
+	int rc;
+
+	rc = ipoib_close(fw_fatal);
+
+	return rc;
+}
+
+static int transmit_imp(const char *dest,	/* Destination */
+			unsigned int type,	/* Type */
+			const char *packet,	/* Packet */
+			unsigned int size)
+{				/* size */
+	int rc;
+
+	if (fatal_condition) {
+		/* since the transmit function does not return a value
+		   we return success but do nothing to suppress error messages */
+		return 0;
+	}
+
+	rc = ipoib_send_packet(dest, type, packet, size);
+	if (rc) {
+		printf("*** ERROR IN SEND FLOW ***\n");
+		printf("restarting Etherboot\n");
+		sleep(1);
+		longjmp(restart_etherboot, -1);
+		/* we should not be here ... */
+		return -1; 
+	}
+
+	return rc;
+}
+
+static void hd(void *where, int n)
+{
+	int i;
+
+	while (n > 0) {
+		printf("%X ", where);
+		for (i = 0; i < ((n > 16) ? 16 : n); i++)
+			printf(" %hhX", ((char *)where)[i]);
+		printf("\n");
+		n -= 16;
+		where += 16;
+	}
+}
+
+static int poll_imp(struct nic *nic, int retrieve, unsigned int *size_p)
+{
+	static char packet[2048];
+	static char *last_packet_p = NULL;
+	static unsigned long last_packet_size;
+	char *packet_p;
+	const int eth_header_len = 14;
+	unsigned int packet_len;
+	int is_bcast = 0;
+	__u16 prot, *ptr;
+	int rc;
+
+	if (0 && nic) {		/* just to supress warning */
+		return -1;
+	}
+
+	if (fatal_condition) {
+		*size_p = 0;
+		return 0;
+	}
+
+	if (poll_error_buf()) {
+		fatal_condition= 1;
+		fw_fatal= 1;
+		printf("\n *** DEVICE FATAL ERROR ***\n");
+		goto fatal_handling;
+	}
+	else if (drain_eq()) {
+		fatal_condition= 1;
+		printf("\n *** FATAL ERROR ***\n");
+		goto fatal_handling;
+	}
+
+
+	if (retrieve) {
+		/* we actually want to read the packet */
+		if (last_packet_p) {
+			eprintf("");
+			/* there is already a packet that was previously read */
+			memcpy(nic->packet, last_packet_p, last_packet_size);
+			*size_p = last_packet_size;
+			last_packet_p = NULL;
+			return 0;
+		}
+		packet_p = nic->packet;
+	} else {
+		/* we don't want to read the packet,
+		   just know if there is one. so we
+		   read the packet to a local buffer and
+		   we will return that buffer when the ip layer wants
+		   another packet */
+		if (last_packet_p) {
+			/* there is already a packet that
+			   was not consumend */
+			eprintf("overflow receive packets");
+			return -1;
+		}
+		packet_p = packet;
+	}
+
+	rc = ipoib_read_packet(&prot, packet_p + eth_header_len, &packet_len,
+			       &is_bcast);
+	if (rc) {
+		printf("*** FATAL IN RECEIVE FLOW ****\n");
+		goto fatal_handling;
+	}
+
+	if (packet_len == 0) {
+		*size_p = 0;
+		return 0;
+	}
+
+	if (is_bcast) {
+		int i;
+		for (i = 0; i < 6; ++i) {
+			packet_p[i] = 0xff;
+		}
+	} else {
+		packet_p[0] = MLX_ETH_BYTE0;
+		packet_p[1] = MLX_ETH_BYTE1;
+		packet_p[2] = MLX_ETH_BYTE2;
+		packet_p[3] = 0;
+		packet_p[4] = 0;
+		packet_p[5] = 0;
+	}
+
+	memset(packet_p + 6, 0, 6);
+
+	ptr = (__u16 *) (packet_p + 12);
+	*ptr = htons(prot);
+
+	if (!retrieve) {
+		last_packet_p = packet;
+		last_packet_size = packet_len + eth_header_len;
+		*size_p = 0;
+	}
+
+	*size_p = packet_len + eth_header_len;
+	tprintf("packet size=%d, prot=%x\n", *size_p, prot);
+	if (0) {
+		hd(nic->packet, 42);
+	}
+
+	return 0;
+
+fatal_handling:
+	printf("restarting Etherboot\n");
+	sleep(1);
+	longjmp(restart_etherboot, -1);
+	/* we should not be here ... */
+	return -1; 
+	
+}

src/drivers/net/mlx_ipoib/mt25218.c

@@ -0,0 +1,245 @@
+/**************************************************************************
+Etherboot -  BOOTP/TFTP Bootstrap Program
+Skeleton NIC driver for Etherboot
+***************************************************************************/
+
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2, or (at
+ * your option) any later version.
+ */
+
+/* to get some global routines like printf */
+#include "etherboot.h"
+/* to get the interface to the body of the program */
+#include "nic.h"
+/* to get the PCI support functions, if this is a PCI NIC */
+#include "pci.h"
+/* to get the ISA support functions, if this is an ISA NIC */
+#include "isa.h"
+
+#include "mt_version.c"
+#include "mt25218_imp.c"
+
+/* NIC specific static variables go here */
+
+int prompt_key(int secs, unsigned char *ch_p)
+{
+	unsigned long tmo;
+	unsigned char ch;
+
+	for (tmo = currticks() + secs * TICKS_PER_SEC; currticks() < tmo;) {
+		if (iskey()) {
+			ch = getchar();
+			/* toupper does not work ... */
+			if (ch == 'v')
+				ch = 'V';
+			if (ch == 'i')
+				ch = 'I';
+			if ((ch=='V') || (ch=='I')) {
+				*ch_p = ch;
+				return 1;
+			}
+		}
+	}
+
+	return 0;
+}
+
+/**************************************************************************
+IRQ - handle interrupts
+***************************************************************************/
+static void mt25218_irq(struct nic *nic, irq_action_t action)
+{
+	/* This routine is somewhat optional.  Etherboot itself
+	 * doesn't use interrupts, but they are required under some
+	 * circumstances when we're acting as a PXE stack.
+	 *
+	 * If you don't implement this routine, the only effect will
+	 * be that your driver cannot be used via Etherboot's UNDI
+	 * API.  This won't affect programs that use only the UDP
+	 * portion of the PXE API, such as pxelinux.
+	 */
+
+	if (0) {
+		nic = NULL;
+	}
+	switch (action) {
+	case DISABLE:
+	case ENABLE:
+		/* Set receive interrupt enabled/disabled state */
+		/*
+		   outb ( action == ENABLE ? IntrMaskEnabled : IntrMaskDisabled,
+		   nic->ioaddr + IntrMaskRegister );
+		 */
+		break;
+	case FORCE:
+		/* Force NIC to generate a receive interrupt */
+		/*
+		   outb ( ForceInterrupt, nic->ioaddr + IntrForceRegister );
+		 */
+		break;
+	}
+}
+
+/**************************************************************************
+POLL - Wait for a frame
+***************************************************************************/
+static int mt25218_poll(struct nic *nic, int retrieve)
+{
+	/* Work out whether or not there's an ethernet packet ready to
+	 * read.  Return 0 if not.
+	 */
+	/* 
+	   if ( ! <packet_ready> ) return 0;
+	 */
+
+	/* retrieve==0 indicates that we are just checking for the
+	 * presence of a packet but don't want to read it just yet.
+	 */
+	/*
+	   if ( ! retrieve ) return 1;
+	 */
+
+	/* Copy data to nic->packet.  Data should include the
+	 * link-layer header (dest MAC, source MAC, type).
+	 * Store length of data in nic->packetlen.
+	 * Return true to indicate a packet has been read.
+	 */
+	/* 
+	   nic->packetlen = <packet_length>;
+	   memcpy ( nic->packet, <packet_data>, <packet_length> );
+	   return 1;
+	 */
+	unsigned int size;
+	int rc;
+	rc = poll_imp(nic, retrieve, &size);
+	if (rc) {
+		return 0;
+	}
+
+	if (size == 0) {
+		return 0;
+	}
+
+	nic->packetlen = size;
+
+	return 1;
+}
+
+/**************************************************************************
+TRANSMIT - Transmit a frame
+***************************************************************************/
+static void mt25218_transmit(struct nic *nic, const char *dest,	/* Destination */
+			     unsigned int type,	/* Type */
+			     unsigned int size,	/* size */
+			     const char *packet)
+{				/* Packet */
+	int rc;
+
+	/* Transmit packet to dest MAC address.  You will need to
+	 * construct the link-layer header (dest MAC, source MAC,
+	 * type).
+	 */
+	if (nic) {
+		rc = transmit_imp(dest, type, packet, size);
+		if (rc)
+			eprintf("tranmit error");
+	}
+}
+
+/**************************************************************************
+DISABLE - Turn off ethernet interface
+***************************************************************************/
+static void mt25218_disable(struct dev *dev)
+{
+	/* put the card in its initial state */
+	/* This function serves 3 purposes.
+	 * This disables DMA and interrupts so we don't receive
+	 *  unexpected packets or interrupts from the card after
+	 *  etherboot has finished. 
+	 * This frees resources so etherboot may use
+	 *  this driver on another interface
+	 * This allows etherboot to reinitialize the interface
+	 *  if something is something goes wrong.
+	 */
+	if (dev || 1) {		// ????
+		disable_imp();
+	}
+}
+
+/**************************************************************************
+PROBE - Look for an adapter, this routine's visible to the outside
+***************************************************************************/
+
+static int mt25218_probe(struct dev *dev, struct pci_device *pci)
+{
+	struct nic *nic = (struct nic *)dev;
+	int rc;
+	unsigned char user_request;
+
+	if (pci->vendor != MELLANOX_VENDOR_ID) {
+		eprintf("");
+		return 0;
+	}
+
+	printf("\n");
+	printf("Mellanox Technologies LTD - Boot over IB implementaion\n");
+	printf("Build version = %s\n\n", build_revision);
+
+	verbose_messages = 0;
+        print_info = 0;
+	printf("Press within 3 seconds:\n");
+	printf("V - to increase verbosity\n");
+	printf("I - to print information\n");
+	if (prompt_key(3, &user_request)) {
+		if (user_request == 'V') {
+			printf("User selected verbose messages\n");
+			verbose_messages = 1;
+		}
+		else if (user_request == 'I') {
+			printf("User selected to print information\n");
+			print_info = 1;
+		}
+	}
+	printf("\n");
+
+	adjust_pci_device(pci);
+
+	nic->priv_data = NULL;
+	rc = probe_imp(pci, nic);
+
+	/* give the user a chance to look at the info */
+	if (print_info)
+		sleep(5);
+
+	if (!rc) {
+		/* store NIC parameters */
+		nic->ioaddr = pci->ioaddr & ~3;
+		nic->irqno = pci->irq;
+		/* point to NIC specific routines */
+		dev->disable = mt25218_disable;
+		nic->poll = mt25218_poll;
+		nic->transmit = mt25218_transmit;
+		nic->irq = mt25218_irq;
+
+		return 1;
+	}
+	/* else */
+	return 0;
+}
+
+static struct pci_id mt25218_nics[] = {
+	PCI_ROM(0x15b3, 0x6282, "MT25218", "MT25218 HCA driver"),
+	PCI_ROM(0x15b3, 0x6274, "MT25204", "MT25204 HCA driver"),
+};
+
+static struct pci_driver mt25218_driver __pci_driver = {
+	.type = NIC_DRIVER,
+	.name = "MT25218",
+	.probe = mt25218_probe,
+	.ids = mt25218_nics,
+	.id_count = sizeof(mt25218_nics) / sizeof(mt25218_nics[0]),
+	.class = 0,
+};

src/drivers/net/mlx_ipoib/mt25218.h

@@ -0,0 +1,546 @@
+#ifndef __mt25218_h__
+#define __mt25218_h__
+
+#include "MT25218_PRM.h"
+#include "ib_mad.h"
+
+#define TAVOR_DEVICE_ID		0x5a44
+#define TAVOR_BRIDGE_DEVICE_ID 0x5a46
+#define ARTAVOR_DEVICE_ID	0x6278
+
+#define MEMFREE_RESET_OFFSET 0xF0010
+
+#define INVALID_WQE_LKEY 0x00000100
+
+/*
+ * memfree specific command
+ *	
+ */
+#define MEMFREE_CMD_QUERY_ADAPTER	0x006
+#define MEMFREE_CMD_WRITE_MGM		0x026
+#define MEMFREE_CMD_MOD_STAT_CFG	0x034
+#define MEMFREE_CMD_QUERY_FW		0x004
+#define MEMFREE_CMD_ENABLE_LAM		0xff8
+#define MEMFREE_CMD_MAP_FA			0xfff
+#define MEMFREE_CMD_UNMAP_FA		0xffe
+#define MEMFREE_CMD_RUN_FW			0xff6
+#define MEMFREE_CMD_SET_ICM_SIZE	0xffd
+#define MEMFREE_CMD_MAP_ICM_AUX		0xffc
+#define MEMFREE_CMD_MAP_ICM			0xffa
+#define MEMFREE_CMD_QUERY_DEV_LIM   0x003
+
+/*
+ * Tavor specific event types
+ *	Only event types that are specific to Tavor
+ *  and are used by the driver are listed here
+ */
+#define TAVOR_IF_EV_TYPE_OVERRUN	0x0F
+
+/*
+ * EQ doorbel commands
+ */
+#define EQ_DBELL_CMD_INC_CONS_IDX 1	/* increment Consumer_indx by one */
+#define EQ_DBELL_CMD_ARM_EQ       2	/* Request notifcation for next event (Arm EQ) */
+#define EQ_DBELL_CMD_DISARM_CQ    3	/* Disarm CQ (CQ number is specified in EQ_param) */
+#define EQ_DBELL_CMD_SET_CONS_IDX 4	/* set Consumer_indx to value of EQ_param */
+#define EQ_DBELL_CMD_ALWAYS_ARM   5	/* move EQ to Always Armed state */
+
+/*
+ * CQ doorbel commands
+ */
+#define CQ_DBELL_CMD_INC_CONS_IDX 1
+#define CQ_DBELL_CMD_REQ_NOTIF_SOL_UNSOL 2
+#define CQ_DBELL_CMD_REQ_NOTIF_SOL 3
+#define CQ_DBELL_CMD_SET_CONS_IDX 4
+#define CQ_DBELL_CMD_REQ_NOTIF_MULT 5
+
+#define INPRM_BUF_SZ 4096
+#define INPRM_BUF_ALIGN 4096
+#define OUTPRM_BUF_SZ 4096
+#define OUTPRM_BUF_ALIGN 4096
+
+/*
+ *  sizes of parameter blocks used in certain
+ *	commands.
+ *  TODO: replace them with sizeof
+ *  operators of the appropriate structs
+ */
+#define SW2HW_MPT_IBUF_SZ	 MT_STRUCT_SIZE(arbelprm_mpt_st)
+#define SW2HW_EQ_IBUF_SZ	 MT_STRUCT_SIZE(arbelprm_eqc_st)
+#define INIT_IB_IBUF_SZ		 MT_STRUCT_SIZE(arbelprm_init_ib_st)
+#define SW2HW_CQ_IBUF_SZ	 MT_STRUCT_SIZE(arbelprm_completion_queue_context_st)
+#define QPCTX_IBUF_SZ		 MT_STRUCT_SIZE(arbelprm_queue_pair_ee_context_entry_st)
+
+#define EQN 0
+#define UAR_IDX 1
+
+#define QPC_OFFSET 0
+#define CQC_OFFSET (QPC_OFFSET + 0x100000)
+#define EQPC_OFFSET (CQC_OFFSET + 0x100000)
+#define EQC_OFFSET (EQPC_OFFSET + 0x100000)
+#define MC_BASE_OFFSET (EQC_OFFSET + 0x100000)
+#define MPT_BASE_OFFSET (MC_BASE_OFFSET + 0x100000)
+#define MTT_BASE_OFFSET (MPT_BASE_OFFSET + 0x100000)
+
+#define LOG2_QPS 7
+#define LOG2_CQS 8
+#define LOG2_EQS 6
+#define LOG2_MC_ENTRY 6		/* 8 QPs per group */
+#define LOG2_MC_GROUPS 3	/* 8 groups */
+#define LOG2_MPT_ENTRIES 5
+
+#define LOG2_EQ_SZ 5
+#define LOG2_CQ_SZ 5
+
+#define NUM_PORTS 2
+
+#define EQE_OWNER_OFFSET 31
+#define EQE_OWNER_VAL_HW 0x80
+
+#define CQE_OWNER_OFFSET 31
+#define CQE_OWNER_VAL_HW 0x80
+
+#define POST_RCV_OFFSET 0x18
+#define POST_SND_OFFSET 0x10
+#define CQ_DBELL_OFFSET 0x20
+#define EQ_DBELL_OFFSET 0x28
+
+#define CQE_ERROR_OPCODE 0xfe
+
+#define OWNER_HW 1
+#define OWNER_SW 0
+
+#define MAX_GATHER 1		/* max gather entries used in send */
+#define MAX_SCATTER 2
+
+#define LOG2_MADS_SND_CQ_SZ LOG2_CQ_SZ
+#define LOG2_MADS_RCV_CQ_SZ LOG2_CQ_SZ
+#define LOG2_IPOIB_SND_CQ_SZ LOG2_CQ_SZ
+#define LOG2_IPOIB_RCV_CQ_SZ LOG2_CQ_SZ
+
+#define NUM_MADS_SND_CQES (1<<LOG2_MADS_SND_CQ_SZ)
+#define NUM_MADS_RCV_CQES (1<<LOG2_MADS_RCV_CQ_SZ)
+#define NUM_IPOIB_SND_CQES (1<<LOG2_IPOIB_SND_CQ_SZ)
+#define NUM_IPOIB_RCV_CQES (1<<LOG2_IPOIB_RCV_CQ_SZ)
+
+/* work queues must be 2^n size with n=0.. */
+#define NUM_MADS_RCV_WQES (1<<1)
+#define NUM_IPOIB_RCV_WQES (1<<1)
+
+#if NUM_MADS_RCV_WQES > NUM_IPOIB_RCV_WQES
+#define MAX_RCV_WQES NUM_MADS_RCV_WQES
+#else
+#define MAX_RCV_WQES NUM_IPOIB_RCV_WQES
+#endif
+
+#define NUM_MADS_SND_WQES (1<<1)
+#define NUM_IPOIB_SND_WQES (1<<1)
+
+#if NUM_MADS_SND_WQES > NUM_IPOIB_SND_WQES
+#define MAX_SND_WQES NUM_MADS_SND_WQES
+#else
+#define MAX_SND_WQES NUM_IPOIB_SND_WQES
+#endif
+
+/* uar context indexes */
+enum {
+	MADS_RCV_CQ_ARM_DB_IDX,
+	MADS_SND_CQ_ARM_DB_IDX,
+	IPOIB_RCV_CQ_ARM_DB_IDX,
+	IPOIB_SND_CQ_ARM_DB_IDX,
+	MADS_SND_QP_DB_IDX,
+	IPOIB_SND_QP_DB_IDX,
+	GROUP_SEP_IDX,
+	START_UNMAPPED_DB_IDX,
+	/* --------------------------
+	   unmapped doorbell records
+	   -------------------------- */
+	END_UNMAPPED_DB_IDX = 505,
+	MADS_RCV_QP_DB_IDX = 506,
+	IPOIB_RCV_QP_DB_IDX = 507,
+	MADS_RCV_CQ_CI_DB_IDX = 508,
+	MADS_SND_CQ_CI_DB_IDX = 509,
+	IPOIB_RCV_CQ_CI_DB_IDX = 510,
+	IPOIB_SND_CQ_CI_DB_IDX = 511
+};
+
+/* uar resources types */
+enum {
+	UAR_RES_INVALID = 0x0,	/* Invalid (not allocated) DoorBell record */
+	UAR_RES_CQ_SET_CI = 0x1,	/* CQ SET_CI DoorBell record */
+	UAR_RES_CQ_ARM = 0x2,	/* CQ ARM DoorBell record */
+	UAR_RES_SQ_DBELL = 0x3,	/* Send Queue DoorBell record */
+	UAR_RES_RQ_DBELL = 0x4,	/* Receive Queue DoorBell record */
+	UAR_RES_SRQ_DBELL = 0x5,	/* Shared Receive Queue DoorBell record */
+	UAR_RES_GROUP_SEP = 0x7	/* Group Separator record */
+};
+
+enum {
+	TS_RC,
+	TS_UC,
+	TS_RD,
+	TS_UD,
+	TS_MLX
+};
+
+enum {
+	PM_STATE_ARMED = 0,
+	PM_STATE_REARM = 1,
+	PM_STATE_MIGRATED = 3
+};
+
+enum {
+	DOORBEL_RES_SQ = 3,
+	DOORBEL_RES_RQ = 4,
+	DOORBEL_RES_SRQ = 5
+};
+
+struct ib_buffers_st {
+	__u8 send_mad_buf[NUM_MADS_SND_WQES][MAD_BUF_SZ];
+	__u8 rcv_mad_buf[NUM_MADS_RCV_WQES][MAD_BUF_SZ + GRH_SIZE];
+	__u8 ipoib_rcv_buf[NUM_IPOIB_RCV_WQES][IPOIB_RCV_BUF_SZ + GRH_SIZE];
+	__u8 ipoib_rcv_grh_buf[NUM_IPOIB_RCV_WQES][IPOIB_RCV_BUF_SZ];
+	__u8 send_ipoib_buf[NUM_IPOIB_SND_WQES][IPOIB_SND_BUF_SZ];
+};
+
+struct pcidev {
+	unsigned long bar[6];
+	__u32 dev_config_space[64];
+	struct pci_device *dev;
+	__u8 bus;
+	__u8 devfn;
+};
+
+struct dev_pci_struct {
+	struct pcidev dev;
+	struct pcidev br;
+	void *cr_space;
+	void *uar;
+};
+
+struct eq_st {
+	__u8 eqn;
+	__u32 cons_counter;
+	__u32 eq_size;
+	void *ci_base_base_addr;
+	struct eqe_t *eq_buf;
+};
+
+struct eqe_t {
+	__u8 raw[MT_STRUCT_SIZE(arbelprm_event_queue_entry_st)];
+} __attribute__ ((packed));
+
+enum qp_state_e {
+	QP_STATE_RST = 0,
+	QP_STATE_INIT = 1,
+	QP_STATE_RTR = 2,
+	QP_STATE_RTS = 3,
+	QP_STATE_SQEr = 4,
+	QP_STATE_SQD = 5,
+	QP_STATE_ERR = 6,
+	QP_STATE_SQDING = 7,
+	QP_STATE_SUSPEND = 9
+};
+
+struct memory_pointer_st {
+	__u32 byte_count;
+	__u32 lkey;
+	__u32 local_addr_h;
+	__u32 local_addr_l;
+} __attribute__ ((packed));
+
+/* receive wqe descriptor */
+struct recv_wqe_st {
+	/* part referenced by hardware */
+	__u8 control[MT_STRUCT_SIZE(arbelprm_wqe_segment_ctrl_recv_st)];
+	struct memory_pointer_st mpointer[MAX_SCATTER];
+} __attribute__ ((packed));
+
+struct recv_wqe_cont_st {
+	struct recv_wqe_st wqe;
+
+	struct udqp_st *qp;	/* qp this wqe is used with */
+} __attribute__ ((packed));
+
+#define RECV_WQE_U_ALIGN 64
+union recv_wqe_u {
+	__u8 align[RECV_WQE_U_ALIGN];	/* this ensures proper alignment */
+	struct recv_wqe_st wqe;
+	struct recv_wqe_cont_st wqe_cont;
+} __attribute__ ((packed));
+
+struct send_doorbell_st {
+	__u8 raw[MT_STRUCT_SIZE(arbelprm_send_doorbell_st)];
+} __attribute__ ((packed));
+
+struct next_control_seg_st {
+	__u8 next[MT_STRUCT_SIZE(arbelprm_wqe_segment_next_st)];
+	__u8 control[MT_STRUCT_SIZE(arbelprm_wqe_segment_ctrl_send_st)];
+} __attribute__ ((packed));
+
+struct ud_seg_st {
+	__u8 av[MT_STRUCT_SIZE(arbelprm_wqe_segment_ud_st)];
+} __attribute__ ((packed));
+
+struct ud_send_wqe_st {
+	struct next_control_seg_st next;	/* 16 bytes */
+	struct ud_seg_st udseg;	/* 48 bytes */
+	struct memory_pointer_st mpointer[MAX_GATHER];	/* 16 * MAX_GATHER bytes */
+} __attribute__ ((packed));
+
+struct ude_send_wqe_cont_st {
+	struct ud_send_wqe_st wqe;
+
+	struct udqp_st *qp;	/* qp this wqe is used with */
+} __attribute__ ((packed));
+
+#define UD_SEND_WQE_U_ALIGN 128
+union ud_send_wqe_u {
+	__u8 align[UD_SEND_WQE_U_ALIGN];
+	struct ude_send_wqe_cont_st wqe_cont;
+} __attribute__ ((packed));
+
+struct address_vector_st {
+	__u8 raw[MT_STRUCT_SIZE(arbelprm_ud_address_vector_st)];
+} __attribute__ ((packed));
+
+struct ud_av_st {
+	struct address_vector_st av;
+	__u32 dest_qp;		/* destination qpn */
+	__u32 qkey;
+	__u8 next_free;
+} __attribute__ ((packed));
+
+union ud_av_u {
+	struct ud_av_st ud_av;
+} __attribute__ ((packed));
+
+struct udav_st {
+	union ud_av_u av_array[NUM_AVS];
+	__u8 udav_next_free;
+};
+
+union cqe_st {
+	__u8 good_cqe[MT_STRUCT_SIZE(arbelprm_completion_queue_entry_st)];
+	__u8 error_cqe[MT_STRUCT_SIZE(arbelprm_completion_with_error_st)];
+} __attribute__ ((packed));
+
+struct qp_ee_ctx_t {
+	__u8 raw[MT_STRUCT_SIZE(arbelprm_queue_pair_ee_context_entry_st)];
+} __attribute__ ((packed));
+
+struct qp_ee_state_tarnisition_st {
+	__u32 opt_param_mask;
+	__u32 r1;
+	struct qp_ee_ctx_t ctx;
+	__u32 r2[62];
+} __attribute__ ((packed));
+
+struct cq_dbell_st {
+	__u8 raw[MT_STRUCT_SIZE(arbelprm_cq_cmd_doorbell_st)];
+} __attribute__ ((packed));
+
+struct mad_ifc_inprm_st {
+	union mad_u mad;
+} __attribute__ ((packed));
+
+struct wqe_buf_st {
+	struct ud_send_wqe_st *sndq;
+	struct recv_wqe_st *rcvq;
+};
+
+struct mad_buffer_st {
+	void *buf;		/* pointer to a 256 byte buffer */
+	__u8 owner;		/* sw or hw ownership BUF_OWNER_SW or BUF_OWNER_HW */
+};
+
+struct rcv_buf_st {
+	void *buf;
+	__u8 busy;
+};
+
+struct ib_eqe_st {
+	__u8 event_type;
+	__u32 cqn;
+};
+
+struct cq_st {
+	__u32 cqn;
+	union cqe_st *cq_buf;
+	__u32 cons_counter;	/* consuner counter */
+	__u8 num_cqes;
+	__u32 arm_db_ctx_idx;
+	void *arm_db_ctx_pointer;
+	__u32 ci_db_ctx_idx;
+	void *ci_db_ctx_pointer;
+};
+
+struct udqp_st {
+	/* cq used by this QP */
+	struct cq_st snd_cq;
+	struct cq_st rcv_cq;
+
+	/* QP related data */
+	__u32 qpn;		/* QP number */
+
+	__u32 qkey;
+
+	__u8 recv_wqe_cur_free;
+	__u8 recv_wqe_alloc_idx;
+	__u8 max_recv_wqes;
+	void *rcv_bufs[MAX_RCV_WQES];
+	union recv_wqe_u *rcv_wq;	/* receive work queue */
+	struct recv_wqe_st *last_posted_rcv_wqe;
+
+	__u8 snd_wqe_cur_free;
+	__u8 snd_wqe_alloc_idx;
+	__u8 max_snd_wqes;
+	void *snd_bufs[MAX_SND_WQES];
+	__u16 send_buf_sz;
+	__u16 rcv_buf_sz;
+	union ud_send_wqe_u *snd_wq;	/* send work queue */
+	struct ud_send_wqe_st *last_posted_snd_wqe;
+	/* pointers to uar context entries */
+	void *send_uar_context;
+	__u16 post_send_counter;
+	void *rcv_uar_context;
+	__u16 post_rcv_counter;
+	__u32 snd_db_record_index;
+	__u32 rcv_db_record_index;
+};
+
+struct device_ib_data_st {
+	__u32 mkey;
+	__u32 pd;
+	__u8 port;
+	__u32 qkey;
+	struct eq_st eq;
+	struct udav_st udav;
+	struct udqp_st mads_qp;
+	struct udqp_st ipoib_qp;
+	void *clr_int_addr;
+	__u32 clr_int_data;
+	__u32 uar_idx;
+	void *uar_context_base;
+	void *error_buf_addr;
+	__u32 error_buf_size;
+};
+
+struct query_fw_st {
+	__u16 fw_rev_major;
+	__u16 fw_rev_minor;
+	__u16 fw_rev_subminor;
+	__u32 error_buf_start_h;
+	__u32 error_buf_start_l;
+	__u32 error_buf_size;
+	__u32 fw_pages;
+	struct addr_64_st eq_ci_table;
+	struct addr_64_st clear_int_addr;
+};
+
+struct query_adapter_st {
+	__u8 intapin;
+};
+
+struct vpm_entry_st {
+	__u32 va_h;
+	__u32 va_l;
+	__u32 pa_h;
+	__u32 pa_l;
+	__u8 log2_size;
+};
+
+#define MAX_VPM_PER_CALL 1
+
+struct map_icm_st {
+	__u32 num_vpm;
+	struct vpm_entry_st vpm_arr[MAX_VPM_PER_CALL];
+};
+
+struct init_hca_st {
+	__u32 qpc_base_addr_h;
+	__u32 qpc_base_addr_l;
+	__u8 log_num_of_qp;
+
+	__u32 eec_base_addr_h;
+	__u32 eec_base_addr_l;
+	__u8 log_num_of_ee;
+
+	__u32 srqc_base_addr_h;
+	__u32 srqc_base_addr_l;
+	__u8 log_num_of_srq;
+
+	__u32 cqc_base_addr_h;
+	__u32 cqc_base_addr_l;
+	__u8 log_num_of_cq;
+
+	__u32 eqpc_base_addr_h;
+	__u32 eqpc_base_addr_l;
+
+	__u32 eeec_base_addr_h;
+	__u32 eeec_base_addr_l;
+
+	__u32 eqc_base_addr_h;
+	__u32 eqc_base_addr_l;
+	__u8 log_num_of_eq;
+
+	__u32 rdb_base_addr_h;
+	__u32 rdb_base_addr_l;
+
+	__u32 mc_base_addr_h;
+	__u32 mc_base_addr_l;
+	__u16 log_mc_table_entry_sz;
+	__u32 mc_table_hash_sz;
+	__u8 log_mc_table_sz;
+
+	__u32 mpt_base_addr_h;
+	__u32 mpt_base_addr_l;
+	__u8 log_mpt_sz;
+	__u32 mtt_base_addr_h;
+	__u32 mtt_base_addr_l;
+	__u8 log_max_uars;
+};
+
+struct dev_lim_st {
+	__u8 log2_rsvd_qps;
+	__u16 qpc_entry_sz;
+
+	__u8 log2_rsvd_srqs;
+	__u16 srq_entry_sz;
+
+	__u8 log2_rsvd_ees;
+	__u16 eec_entry_sz;
+
+	__u8 log2_rsvd_cqs;
+	__u16 cqc_entry_sz;
+
+	__u8 log2_rsvd_mtts;
+	__u16 mtt_entry_sz;
+
+	__u8 log2_rsvd_mrws;
+	__u16 mpt_entry_sz;
+
+	__u8 log2_rsvd_rdbs;
+
+	__u16 eqc_entry_sz;
+
+	__u32 max_icm_size_l;
+	__u32 max_icm_size_h;
+
+	__u8 uar_sz;
+	__u8 num_rsvd_uars;
+};
+
+static int create_udqp(struct udqp_st *qp);
+static int destroy_udqp(struct udqp_st *qp);
+static void *get_send_wqe_buf(void *wqe, __u8 index);
+static void *get_rcv_wqe_buf(void *wqe, __u8 index);
+
+static struct recv_wqe_st *alloc_rcv_wqe(struct udqp_st *qp);
+static int free_wqe(void *wqe);
+static int poll_cq(void *cqh, union cqe_st *cqe_p, __u8 * num_cqes);
+static int poll_eq(struct ib_eqe_st *ib_eqe_p, __u8 * num_eqes);
+static int post_rcv_buf(struct udqp_st *qp, struct recv_wqe_st *rcv_wqe);
+static __u32 dev_get_qpn(void *qph);
+
+#endif				/* __mt25218_h__ */

src/drivers/net/mlx_ipoib/mt25218_imp.c

@@ -0,0 +1,230 @@
+typedef uint32_t __u32;
+typedef uint16_t __u16;
+typedef uint8_t __u8;
+
+static int verbose_messages=0;
+static int print_info=0;
+static int fatal_condition=0;
+static int fw_fatal;
+
+#define tprintf(fmt, a...) \
+		 do {    \
+			if ( verbose_messages ) { \
+				printf("%s:%d: " fmt "\n", __func__, __LINE__,  ##a); \
+			} \
+		 } \
+		 while(0)
+
+#define eprintf(fmt, a...) \
+		 printf("%s:%d: " fmt "\n", __func__, __LINE__,  ##a)
+
+static void cpu_to_be_buf(void *buf, int size)
+{
+	int dw_sz = size >> 2, i;
+
+	for (i = 0; i < dw_sz; ++i) {
+		((__u32 *) buf)[i] = cpu_to_be32(((__u32 *) buf)[i]);
+	}
+}
+
+static void be_to_cpu_buf(void *buf, int size)
+{
+	int dw_sz = size >> 2, i;
+	u32 *p = buf;
+
+	for (i = 0; i < dw_sz; ++i) {
+		p[i] = be32_to_cpu(p[i]);
+	}
+}
+
+#include "timer.h"
+#include "cmdif_mt25218.c"
+#include "cmdif_comm.c"
+#include "ib_mt25218.c"
+#include "ib_mad.c"
+#include "ib_driver.c"
+#include "ipoib.c"
+
+static int probe_imp(struct pci_device *pci, struct nic *nic)
+{
+	int rc;
+
+	if (0 && nic) {		/* just to supress warning */
+		return 0;
+	}
+
+	fatal_condition= 0;
+	fw_fatal= 0;
+
+	tprintf("");
+	rc = ipoib_init(pci);
+	if (rc)
+		return rc;
+
+	tprintf("");
+
+	return rc;
+}
+
+static int disable_imp(void)
+{
+	int rc;
+
+	rc = ipoib_close(fw_fatal);
+
+	return rc;
+}
+
+static int transmit_imp(const char *dest,	/* Destination */
+			unsigned int type,	/* Type */
+			const char *packet,	/* Packet */
+			unsigned int size)
+{				/* size */
+	int rc;
+
+	if (fatal_condition) {
+		/* since the transmit function does not return a value
+		   we return success but do nothing to suppress error messages */
+		return 0;
+	}
+
+	rc = ipoib_send_packet(dest, type, packet, size);
+	if (rc) {
+		printf("*** ERROR IN SEND FLOW ***\n");
+		printf("restarting Etherboot\n");
+		sleep(1);
+		longjmp(restart_etherboot, -1);
+		/* we should not be here ... */
+		return -1; 
+	}
+
+	return rc;
+}
+
+static void hd(void *where, int n)
+{
+	int i;
+
+	while (n > 0) {
+		printf("%X ", where);
+		for (i = 0; i < ((n > 16) ? 16 : n); i++)
+			printf(" %hhX", ((char *)where)[i]);
+		printf("\n");
+		n -= 16;
+		where += 16;
+	}
+}
+
+static int poll_imp(struct nic *nic, int retrieve, unsigned int *size_p)
+{
+	static char packet[2048];
+	static char *last_packet_p = NULL;
+	static unsigned long last_packet_size;
+	char *packet_p;
+	const int eth_header_len = 14;
+	unsigned int packet_len;
+	int is_bcast = 0;
+	__u16 prot, *ptr;
+	int rc;
+
+	if (0 && nic) {		/* just to supress warning */
+		return -1;
+	}
+
+	if (fatal_condition) {
+		*size_p = 0;
+		return 0;
+	}
+
+	if (poll_error_buf()) {
+		fatal_condition= 1;
+		fw_fatal= 1;
+		printf("\n *** DEVICE FATAL ERROR ***\n");
+		goto fatal_handling;
+	}
+	else if (drain_eq()) {
+		fatal_condition= 1;
+		printf("\n *** FATAL ERROR ***\n");
+		goto fatal_handling;
+	}
+
+
+	if (retrieve) {
+		/* we actually want to read the packet */
+		if (last_packet_p) {
+			eprintf("");
+			/* there is already a packet that was previously read */
+			memcpy(nic->packet, last_packet_p, last_packet_size);
+			*size_p = last_packet_size;
+			last_packet_p = NULL;
+			return 0;
+		}
+		packet_p = nic->packet;
+	} else {
+		/* we don't want to read the packet,
+		   just know if there is one. so we
+		   read the packet to a local buffer and
+		   we will return that buffer when the ip layer wants
+		   another packet */
+		if (last_packet_p) {
+			/* there is already a packet that
+			   was not consumend */
+			eprintf("overflow receive packets");
+			return -1;
+		}
+		packet_p = packet;
+	}
+
+	rc = ipoib_read_packet(&prot, packet_p + eth_header_len, &packet_len,
+			       &is_bcast);
+	if (rc) {
+		printf("*** FATAL IN RECEIVE FLOW ****\n");
+		goto fatal_handling;
+	}
+
+	if (packet_len == 0) {
+		*size_p = 0;
+		return 0;
+	}
+
+	if (is_bcast) {
+		int i;
+		for (i = 0; i < 6; ++i) {
+			packet_p[i] = 0xff;
+		}
+	} else {
+		packet_p[0] = MLX_ETH_BYTE0;
+		packet_p[1] = MLX_ETH_BYTE1;
+		packet_p[2] = MLX_ETH_BYTE2;
+		packet_p[3] = 0;
+		packet_p[4] = 0;
+		packet_p[5] = 0;
+	}
+
+	memset(packet_p + 6, 0, 6);
+
+	ptr = (__u16 *) (packet_p + 12);
+	*ptr = htons(prot);
+
+	if (!retrieve) {
+		last_packet_p = packet;
+		last_packet_size = packet_len + eth_header_len;
+		*size_p = 0;
+	}
+
+	*size_p = packet_len + eth_header_len;
+	tprintf("packet size=%d, prot=%x\n", *size_p, prot);
+	if (0) {
+		hd(nic->packet, 42);
+	}
+
+	return 0;
+
+fatal_handling:
+	printf("restarting Etherboot\n");
+	sleep(1);
+	longjmp(restart_etherboot, -1);
+	/* we should not be here ... */
+	return -1; 
+	
+}

src/drivers/net/mlx_ipoib/mt_version.c

@@ -0,0 +1,23 @@
+/*
+  This software is available to you under a choice of one of two
+  licenses.  You may choose to be licensed under the terms of the GNU
+  General Public License (GPL) Version 2, available at
+  <http://www.fsf.org/copyleft/gpl.html>, or the OpenIB.org BSD
+  license, available in the LICENSE.TXT file accompanying this
+  software.  These details are also available at
+  <http://openib.org/license.html>.
+
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  SOFTWARE.
+
+  Copyright (c) 2004 Mellanox Technologies Ltd.  All rights reserved.
+*/
+
+/* definition of the build version goes here */
+const char *build_revision= "113";