Browse Source

[intel] Avoid completely filling the TX descriptor ring

It is unclear from the datasheets whether or not the TX ring can be
completely filled (i.e. whether writing the tail value as equal to the
current head value will cause the ring to be treated as completely
full or completely empty).  It is very plausible that this edge case
could differ in behaviour between real hardware and the many
implementations of an emulated Intel NIC found in various virtual
machines.  Err on the side of caution and always leave at least one
ring entry empty.

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 10 years ago
parent
commit
27884298a3
2 changed files with 4 additions and 1 deletions
  1. 1
    1
      src/drivers/net/intel.c
  2. 3
    0
      src/drivers/net/intel.h

+ 1
- 1
src/drivers/net/intel.c View File

593
 	physaddr_t address;
593
 	physaddr_t address;
594
 
594
 
595
 	/* Get next transmit descriptor */
595
 	/* Get next transmit descriptor */
596
-	if ( ( intel->tx.prod - intel->tx.cons ) >= INTEL_NUM_TX_DESC ) {
596
+	if ( ( intel->tx.prod - intel->tx.cons ) >= INTEL_TX_FILL ) {
597
 		DBGC ( intel, "INTEL %p out of transmit descriptors\n", intel );
597
 		DBGC ( intel, "INTEL %p out of transmit descriptors\n", intel );
598
 		return -ENOBUFS;
598
 		return -ENOBUFS;
599
 	}
599
 	}

+ 3
- 0
src/drivers/net/intel.h View File

156
  */
156
  */
157
 #define INTEL_NUM_TX_DESC 16
157
 #define INTEL_NUM_TX_DESC 16
158
 
158
 
159
+/** Transmit descriptor ring maximum fill level */
160
+#define INTEL_TX_FILL ( INTEL_NUM_TX_DESC - 1 )
161
+
159
 /** Receive/Transmit Descriptor Base Address Low (offset) */
162
 /** Receive/Transmit Descriptor Base Address Low (offset) */
160
 #define INTEL_xDBAL 0x00
163
 #define INTEL_xDBAL 0x00
161
 
164
 

Loading…
Cancel
Save