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[intelxl] Allow for arbitrary placement of interrupt control register

Signed-off-by: Michael Brown <mcb30@ipxe.org>
tags/v1.20.1
Michael Brown 5 年之前
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1e0342ebd8
共有 2 個檔案被更改,包括 11 行新增12 行删除
  1. 6
    9
      src/drivers/net/intelxl.c
  2. 5
    3
      src/drivers/net/intelxl.h

+ 6
- 9
src/drivers/net/intelxl.c 查看文件

@@ -1509,9 +1509,9 @@ static void intelxl_poll ( struct net_device *netdev ) {
1509 1509
 
1510 1510
 	/* Acknowledge interrupts, if applicable */
1511 1511
 	if ( netdev_irq_enabled ( netdev ) ) {
1512
-		writel ( ( INTELXL_PFINT_DYN_CTL0_CLEARPBA |
1513
-			   INTELXL_PFINT_DYN_CTL0_INTENA_MASK ),
1514
-			 intelxl->regs + INTELXL_PFINT_DYN_CTL0 );
1512
+		writel ( ( INTELXL_INT_DYN_CTL_CLEARPBA |
1513
+			   INTELXL_INT_DYN_CTL_INTENA_MASK ),
1514
+			 ( intelxl->regs + intelxl->intr ) );
1515 1515
 	}
1516 1516
 
1517 1517
 	/* Poll for completed packets */
@@ -1536,12 +1536,8 @@ static void intelxl_poll ( struct net_device *netdev ) {
1536 1536
 static void intelxl_irq ( struct net_device *netdev, int enable ) {
1537 1537
 	struct intelxl_nic *intelxl = netdev->priv;
1538 1538
 
1539
-	if ( enable ) {
1540
-		writel ( INTELXL_PFINT_DYN_CTL0_INTENA,
1541
-			 intelxl->regs + INTELXL_PFINT_DYN_CTL0 );
1542
-	} else {
1543
-		writel ( 0, intelxl->regs + INTELXL_PFINT_DYN_CTL0 );
1544
-	}
1539
+	writel ( ( enable ? INTELXL_INT_DYN_CTL_INTENA : 0 ),
1540
+		 ( intelxl->regs + intelxl->intr ) );
1545 1541
 }
1546 1542
 
1547 1543
 /** Network device operations */
@@ -1585,6 +1581,7 @@ static int intelxl_probe ( struct pci_device *pci ) {
1585 1581
 	netdev->dev = &pci->dev;
1586 1582
 	memset ( intelxl, 0, sizeof ( *intelxl ) );
1587 1583
 	intelxl->pf = PCI_FUNC ( pci->busdevfn );
1584
+	intelxl->intr = INTELXL_PFINT_DYN_CTL0;
1588 1585
 	intelxl_init_admin ( &intelxl->command, INTELXL_ADMIN_CMD,
1589 1586
 			     &intelxl_admin_offsets );
1590 1587
 	intelxl_init_admin ( &intelxl->event, INTELXL_ADMIN_EVT,

+ 5
- 3
src/drivers/net/intelxl.h 查看文件

@@ -735,9 +735,9 @@ intelxl_init_ring ( struct intelxl_ring *ring, unsigned int count, size_t len,
735 735
 
736 736
 /** PF Interrupt Zero Dynamic Control Register */
737 737
 #define INTELXL_PFINT_DYN_CTL0 0x038480
738
-#define INTELXL_PFINT_DYN_CTL0_INTENA	0x00000001UL	/**< Enable */
739
-#define INTELXL_PFINT_DYN_CTL0_CLEARPBA	0x00000002UL	/**< Acknowledge */
740
-#define INTELXL_PFINT_DYN_CTL0_INTENA_MASK 0x80000000UL	/**< Ignore enable */
738
+#define INTELXL_INT_DYN_CTL_INTENA	0x00000001UL	/**< Enable */
739
+#define INTELXL_INT_DYN_CTL_CLEARPBA	0x00000002UL	/**< Acknowledge */
740
+#define INTELXL_INT_DYN_CTL_INTENA_MASK 0x80000000UL	/**< Ignore enable */
741 741
 
742 742
 /** PF Interrupt Zero Linked List Register */
743 743
 #define INTELXL_PFINT_LNKLST0 0x038500
@@ -835,6 +835,8 @@ struct intelxl_nic {
835 835
 	unsigned int vsi;
836 836
 	/** Queue set handle */
837 837
 	unsigned int qset;
838
+	/** Interrupt control register */
839
+	unsigned int intr;
838 840
 
839 841
 	/** Admin command queue */
840 842
 	struct intelxl_admin command;

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