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Reverted driver/net/mlx_ipoib to clean master state

tags/v0.9.3
Michael Brown 16 年前
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+ 0
- 455
src/drivers/net/mlx_ipoib/arbel.h 查看文件

@@ -1,455 +0,0 @@
1
-#ifndef _ARBEL_H
2
-#define _ARBEL_H
3
-
4
-/** @file
5
- *
6
- * Mellanox Arbel Infiniband HCA driver
7
- *
8
- */
9
-
10
-#include <stdint.h>
11
-#include <gpxe/uaccess.h>
12
-
13
-/*
14
- * Hardware constants
15
- *
16
- */
17
-
18
-/* PCI BARs */
19
-#define ARBEL_PCI_CONFIG_BAR		PCI_BASE_ADDRESS_0
20
-#define ARBEL_PCI_CONFIG_BAR_SIZE	0x100000
21
-#define ARBEL_PCI_UAR_BAR		PCI_BASE_ADDRESS_2
22
-#define ARBEL_PCI_UAR_IDX		1
23
-#define ARBEL_PCI_UAR_SIZE		0x1000
24
-
25
-/* UAR context table (UCE) resource types */
26
-#define ARBEL_UAR_RES_NONE		0x00
27
-#define ARBEL_UAR_RES_CQ_CI		0x01
28
-#define ARBEL_UAR_RES_CQ_ARM		0x02
29
-#define ARBEL_UAR_RES_SQ		0x03
30
-#define ARBEL_UAR_RES_RQ		0x04
31
-#define ARBEL_UAR_RES_GROUP_SEP		0x07
32
-
33
-/* Work queue entry and completion queue entry opcodes */
34
-#define ARBEL_OPCODE_SEND		0x0a
35
-#define ARBEL_OPCODE_RECV_ERROR		0xfe
36
-#define ARBEL_OPCODE_SEND_ERROR		0xff
37
-
38
-/* HCA command register opcodes */
39
-#define ARBEL_HCR_QUERY_DEV_LIM		0x0003
40
-#define ARBEL_HCR_QUERY_FW		0x0004
41
-#define ARBEL_HCR_INIT_HCA		0x0007
42
-#define ARBEL_HCR_CLOSE_HCA		0x0008
43
-#define ARBEL_HCR_INIT_IB		0x0009
44
-#define ARBEL_HCR_CLOSE_IB		0x000a
45
-#define ARBEL_HCR_SW2HW_MPT		0x000d
46
-#define ARBEL_HCR_MAP_EQ		0x0012
47
-#define ARBEL_HCR_SW2HW_EQ		0x0013
48
-#define ARBEL_HCR_HW2SW_EQ		0x0014
49
-#define ARBEL_HCR_SW2HW_CQ		0x0016
50
-#define ARBEL_HCR_HW2SW_CQ		0x0017
51
-#define ARBEL_HCR_RST2INIT_QPEE		0x0019
52
-#define ARBEL_HCR_INIT2RTR_QPEE		0x001a
53
-#define ARBEL_HCR_RTR2RTS_QPEE		0x001b
54
-#define ARBEL_HCR_2RST_QPEE		0x0021
55
-#define ARBEL_HCR_MAD_IFC		0x0024
56
-#define ARBEL_HCR_READ_MGM		0x0025
57
-#define ARBEL_HCR_WRITE_MGM		0x0026
58
-#define ARBEL_HCR_MGID_HASH		0x0027
59
-#define ARBEL_HCR_RUN_FW		0x0ff6
60
-#define ARBEL_HCR_DISABLE_LAM		0x0ff7
61
-#define ARBEL_HCR_ENABLE_LAM		0x0ff8
62
-#define ARBEL_HCR_UNMAP_ICM		0x0ff9
63
-#define ARBEL_HCR_MAP_ICM		0x0ffa
64
-#define ARBEL_HCR_UNMAP_ICM_AUX		0x0ffb
65
-#define ARBEL_HCR_MAP_ICM_AUX		0x0ffc
66
-#define ARBEL_HCR_SET_ICM_SIZE		0x0ffd
67
-#define ARBEL_HCR_UNMAP_FA		0x0ffe
68
-#define ARBEL_HCR_MAP_FA		0x0fff
69
-
70
-/* Service types */
71
-#define ARBEL_ST_UD			0x03
72
-
73
-/* MTUs */
74
-#define ARBEL_MTU_2048			0x04
75
-
76
-#define ARBEL_NO_EQ			64
77
-
78
-#define ARBEL_INVALID_LKEY		0x00000100UL
79
-
80
-/*
81
- * Datatypes that seem to be missing from the autogenerated documentation
82
- *
83
- */
84
-struct arbelprm_mgm_hash_st {
85
-	pseudo_bit_t reserved0[0x00020];
86
-/* -------------- */
87
-	pseudo_bit_t hash[0x00010];
88
-	pseudo_bit_t reserved1[0x00010];
89
-} __attribute__ (( packed ));
90
-
91
-struct arbelprm_scalar_parameter_st {
92
-	pseudo_bit_t reserved0[0x00020];
93
-/* -------------- */
94
-	pseudo_bit_t value[0x00020];
95
-} __attribute__ (( packed ));
96
-
97
-/*
98
- * Wrapper structures for hardware datatypes
99
- *
100
- */
101
-
102
-struct MLX_DECLARE_STRUCT ( arbelprm_access_lam );
103
-struct MLX_DECLARE_STRUCT ( arbelprm_completion_queue_context );
104
-struct MLX_DECLARE_STRUCT ( arbelprm_completion_queue_entry );
105
-struct MLX_DECLARE_STRUCT ( arbelprm_completion_with_error );
106
-struct MLX_DECLARE_STRUCT ( arbelprm_cq_arm_db_record );
107
-struct MLX_DECLARE_STRUCT ( arbelprm_cq_ci_db_record );
108
-struct MLX_DECLARE_STRUCT ( arbelprm_eqc );
109
-struct MLX_DECLARE_STRUCT ( arbelprm_hca_command_register );
110
-struct MLX_DECLARE_STRUCT ( arbelprm_init_hca );
111
-struct MLX_DECLARE_STRUCT ( arbelprm_init_ib );
112
-struct MLX_DECLARE_STRUCT ( arbelprm_mad_ifc );
113
-struct MLX_DECLARE_STRUCT ( arbelprm_mgm_entry );
114
-struct MLX_DECLARE_STRUCT ( arbelprm_mgm_hash );
115
-struct MLX_DECLARE_STRUCT ( arbelprm_mpt );
116
-struct MLX_DECLARE_STRUCT ( arbelprm_qp_db_record );
117
-struct MLX_DECLARE_STRUCT ( arbelprm_qp_ee_state_transitions );
118
-struct MLX_DECLARE_STRUCT ( arbelprm_query_dev_lim );
119
-struct MLX_DECLARE_STRUCT ( arbelprm_query_fw );
120
-struct MLX_DECLARE_STRUCT ( arbelprm_queue_pair_ee_context_entry );
121
-struct MLX_DECLARE_STRUCT ( arbelprm_recv_wqe_segment_next );
122
-struct MLX_DECLARE_STRUCT ( arbelprm_scalar_parameter );
123
-struct MLX_DECLARE_STRUCT ( arbelprm_send_doorbell );
124
-struct MLX_DECLARE_STRUCT ( arbelprm_ud_address_vector );
125
-struct MLX_DECLARE_STRUCT ( arbelprm_virtual_physical_mapping );
126
-struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ctrl_send );
127
-struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_data_ptr );
128
-struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_next );
129
-struct MLX_DECLARE_STRUCT ( arbelprm_wqe_segment_ud );
130
-
131
-/*
132
- * Composite hardware datatypes
133
- *
134
- */
135
-
136
-#define ARBEL_MAX_GATHER 1
137
-
138
-struct arbelprm_ud_send_wqe {
139
-	struct arbelprm_wqe_segment_next next;
140
-	struct arbelprm_wqe_segment_ctrl_send ctrl;
141
-	struct arbelprm_wqe_segment_ud ud;
142
-	struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_GATHER];
143
-} __attribute__ (( packed ));
144
-
145
-#define ARBEL_MAX_SCATTER 1
146
-
147
-struct arbelprm_recv_wqe {
148
-	/* The autogenerated header is inconsistent between send and
149
-	 * receive WQEs.  The "ctrl" structure for receive WQEs is
150
-	 * defined to include the "next" structure.  Since the "ctrl"
151
-	 * part of the "ctrl" structure contains only "reserved, must
152
-	 * be zero" bits, we ignore its definition and provide
153
-	 * something more usable.
154
-	 */
155
-	struct arbelprm_recv_wqe_segment_next next;
156
-	uint32_t ctrl[2]; /* All "reserved, must be zero" */
157
-	struct arbelprm_wqe_segment_data_ptr data[ARBEL_MAX_SCATTER];
158
-} __attribute__ (( packed ));
159
-
160
-union arbelprm_completion_entry {
161
-	struct arbelprm_completion_queue_entry normal;
162
-	struct arbelprm_completion_with_error error;
163
-} __attribute__ (( packed ));
164
-
165
-union arbelprm_doorbell_record {
166
-	struct arbelprm_cq_arm_db_record cq_arm;
167
-	struct arbelprm_cq_ci_db_record cq_ci;
168
-	struct arbelprm_qp_db_record qp;
169
-} __attribute__ (( packed ));
170
-
171
-union arbelprm_doorbell_register {
172
-	struct arbelprm_send_doorbell send;
173
-	uint32_t dword[2];
174
-} __attribute__ (( packed ));
175
-
176
-union arbelprm_mad {
177
-	struct arbelprm_mad_ifc ifc;
178
-	union ib_mad mad;
179
-} __attribute__ (( packed ));
180
-
181
-/*
182
- * gPXE-specific definitions
183
- *
184
- */
185
-
186
-/** Arbel device limits */
187
-struct arbel_dev_limits {
188
-	/** Number of reserved QPs */
189
-	unsigned int reserved_qps;
190
-	/** QP context entry size */
191
-	size_t qpc_entry_size;
192
-	/** Extended QP context entry size */
193
-	size_t eqpc_entry_size;
194
-	/** Number of reserved SRQs */
195
-	unsigned int reserved_srqs;
196
-	/** SRQ context entry size */
197
-	size_t srqc_entry_size;
198
-	/** Number of reserved EEs */
199
-	unsigned int reserved_ees;
200
-	/** EE context entry size */
201
-	size_t eec_entry_size;
202
-	/** Extended EE context entry size */
203
-	size_t eeec_entry_size;
204
-	/** Number of reserved CQs */
205
-	unsigned int reserved_cqs;
206
-	/** CQ context entry size */
207
-	size_t cqc_entry_size;
208
-	/** Number of reserved MTTs */
209
-	unsigned int reserved_mtts;
210
-	/** MTT entry size */
211
-	size_t mtt_entry_size;
212
-	/** Number of reserved MRWs */
213
-	unsigned int reserved_mrws;
214
-	/** MPT entry size */
215
-	size_t mpt_entry_size;
216
-	/** Number of reserved RDBs */
217
-	unsigned int reserved_rdbs;
218
-	/** EQ context entry size */
219
-	size_t eqc_entry_size;
220
-	/** Number of reserved UARs */
221
-	unsigned int reserved_uars;
222
-};
223
-
224
-/** Alignment of Arbel send work queue entries */
225
-#define ARBEL_SEND_WQE_ALIGN 128
226
-
227
-/** An Arbel send work queue entry */
228
-union arbel_send_wqe {
229
-	struct arbelprm_ud_send_wqe ud;
230
-	uint8_t force_align[ARBEL_SEND_WQE_ALIGN];
231
-} __attribute__ (( packed ));
232
-
233
-/** An Arbel send work queue */
234
-struct arbel_send_work_queue {
235
-	/** Doorbell record number */
236
-	unsigned int doorbell_idx;
237
-	/** Work queue entries */
238
-	union arbel_send_wqe *wqe;
239
-	/** Size of work queue */
240
-	size_t wqe_size;
241
-};
242
-
243
-/** Alignment of Arbel receive work queue entries */
244
-#define ARBEL_RECV_WQE_ALIGN 64
245
-
246
-/** An Arbel receive work queue entry */
247
-union arbel_recv_wqe {
248
-	struct arbelprm_recv_wqe recv;
249
-	uint8_t force_align[ARBEL_RECV_WQE_ALIGN];
250
-} __attribute__ (( packed ));
251
-
252
-/** An Arbel receive work queue */
253
-struct arbel_recv_work_queue {
254
-	/** Doorbell record number */
255
-	unsigned int doorbell_idx;
256
-	/** Work queue entries */
257
-	union arbel_recv_wqe *wqe;
258
-	/** Size of work queue */
259
-	size_t wqe_size;
260
-};
261
-
262
-/** Maximum number of allocatable queue pairs
263
- *
264
- * This is a policy decision, not a device limit.
265
- */
266
-#define ARBEL_MAX_QPS		8
267
-
268
-/** Base queue pair number */
269
-#define ARBEL_QPN_BASE 0x550000
270
-
271
-/** An Arbel queue pair */
272
-struct arbel_queue_pair {
273
-	/** Send work queue */
274
-	struct arbel_send_work_queue send;
275
-	/** Receive work queue */
276
-	struct arbel_recv_work_queue recv;
277
-};
278
-
279
-/** Maximum number of allocatable completion queues
280
- *
281
- * This is a policy decision, not a device limit.
282
- */
283
-#define ARBEL_MAX_CQS		8
284
-
285
-/** An Arbel completion queue */
286
-struct arbel_completion_queue {
287
-	/** Consumer counter doorbell record number */
288
-	unsigned int ci_doorbell_idx;
289
-	/** Arm queue doorbell record number */
290
-	unsigned int arm_doorbell_idx;
291
-	/** Completion queue entries */
292
-	union arbelprm_completion_entry *cqe;
293
-	/** Size of completion queue */
294
-	size_t cqe_size;
295
-};
296
-
297
-/** An Arbel resource bitmask */
298
-typedef uint32_t arbel_bitmask_t;
299
-
300
-/** Size of an Arbel resource bitmask */
301
-#define ARBEL_BITMASK_SIZE(max_entries)					     \
302
-	( ( (max_entries) + ( 8 * sizeof ( arbel_bitmask_t ) ) - 1 ) /	     \
303
-	  ( 8 * sizeof ( arbel_bitmask_t ) ) )
304
-
305
-/** An Arbel device */
306
-struct arbel {
307
-	/** PCI configuration registers */
308
-	void *config;
309
-	/** PCI user Access Region */
310
-	void *uar;
311
-
312
-	/** Command input mailbox */
313
-	void *mailbox_in;
314
-	/** Command output mailbox */
315
-	void *mailbox_out;
316
-
317
-	/** Firmware area in external memory */
318
-	userptr_t firmware_area;
319
-	/** ICM size */
320
-	size_t icm_len;
321
-	/** ICM AUX size */
322
-	size_t icm_aux_len;
323
-	/** ICM area */
324
-	userptr_t icm;
325
-
326
-	/** Doorbell records */
327
-	union arbelprm_doorbell_record *db_rec;
328
-	/** Reserved LKey
329
-	 *
330
-	 * Used to get unrestricted memory access.
331
-	 */
332
-	unsigned long reserved_lkey;
333
-
334
-	/** Completion queue in-use bitmask */
335
-	arbel_bitmask_t cq_inuse[ ARBEL_BITMASK_SIZE ( ARBEL_MAX_CQS ) ];
336
-	/** Queue pair in-use bitmask */
337
-	arbel_bitmask_t qp_inuse[ ARBEL_BITMASK_SIZE ( ARBEL_MAX_QPS ) ];
338
-	
339
-	/** Device limits */
340
-	struct arbel_dev_limits limits;
341
-};
342
-
343
-/** Global protection domain */
344
-#define ARBEL_GLOBAL_PD			0x123456
345
-
346
-/** Memory key prefix */
347
-#define ARBEL_MKEY_PREFIX		0x77000000UL
348
-
349
-/*
350
- * HCA commands
351
- *
352
- */
353
-
354
-#define ARBEL_HCR_BASE			0x80680
355
-#define ARBEL_HCR_REG(x)		( ARBEL_HCR_BASE + 4 * (x) )
356
-#define ARBEL_HCR_MAX_WAIT_MS		2000
357
-#define ARBEL_MBOX_ALIGN		4096
358
-#define ARBEL_MBOX_SIZE			512
359
-
360
-/* HCA command is split into
361
- *
362
- * bits  11:0	Opcode
363
- * bit     12	Input uses mailbox
364
- * bit     13	Output uses mailbox
365
- * bits 22:14	Input parameter length (in dwords)
366
- * bits 31:23	Output parameter length (in dwords)
367
- *
368
- * Encoding the information in this way allows us to cut out several
369
- * parameters to the arbel_command() call.
370
- */
371
-#define ARBEL_HCR_IN_MBOX		0x00001000UL
372
-#define ARBEL_HCR_OUT_MBOX		0x00002000UL
373
-#define ARBEL_HCR_OPCODE( _command )	( (_command) & 0xfff )
374
-#define ARBEL_HCR_IN_LEN( _command )	( ( (_command) >> 12 ) & 0x7fc )
375
-#define ARBEL_HCR_OUT_LEN( _command )	( ( (_command) >> 21 ) & 0x7fc )
376
-
377
-/** Build HCR command from component parts */
378
-#define ARBEL_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len,		     \
379
-			     _out_mbox, _out_len )			     \
380
-	( (_opcode) |							     \
381
-	  ( (_in_mbox) ? ARBEL_HCR_IN_MBOX : 0 ) |			     \
382
-	  ( ( (_in_len) / 4 ) << 14 ) |					     \
383
-	  ( (_out_mbox) ? ARBEL_HCR_OUT_MBOX : 0 ) |			     \
384
-	  ( ( (_out_len) / 4 ) << 23 ) )
385
-
386
-#define ARBEL_HCR_IN_CMD( _opcode, _in_mbox, _in_len )			     \
387
-	ARBEL_HCR_INOUT_CMD ( _opcode, _in_mbox, _in_len, 0, 0 )
388
-
389
-#define ARBEL_HCR_OUT_CMD( _opcode, _out_mbox, _out_len )		     \
390
-	ARBEL_HCR_INOUT_CMD ( _opcode, 0, 0, _out_mbox, _out_len )
391
-
392
-#define ARBEL_HCR_VOID_CMD( _opcode )					     \
393
-	ARBEL_HCR_INOUT_CMD ( _opcode, 0, 0, 0, 0 )
394
-
395
-/*
396
- * Doorbell record allocation
397
- *
398
- * The doorbell record map looks like:
399
- *
400
- *    ARBEL_MAX_CQS * Arm completion queue doorbell
401
- *    ARBEL_MAX_QPS * Send work request doorbell
402
- *    Group separator
403
- *    ...(empty space)...
404
- *    ARBEL_MAX_QPS * Receive work request doorbell
405
- *    ARBEL_MAX_CQS * Completion queue consumer counter update doorbell
406
- */
407
-
408
-#define ARBEL_MAX_DOORBELL_RECORDS 512
409
-#define ARBEL_GROUP_SEPARATOR_DOORBELL ( ARBEL_MAX_CQS + ARBEL_MAX_QPS )
410
-
411
-/**
412
- * Get arm completion queue doorbell index
413
- *
414
- * @v cqn_offset	Completion queue number offset
415
- * @ret doorbell_idx	Doorbell index
416
- */
417
-static inline unsigned int
418
-arbel_cq_arm_doorbell_idx ( unsigned int cqn_offset ) {
419
-	return cqn_offset;
420
-}
421
-
422
-/**
423
- * Get send work request doorbell index
424
- *
425
- * @v qpn_offset	Queue pair number offset
426
- * @ret doorbell_idx	Doorbell index
427
- */
428
-static inline unsigned int
429
-arbel_send_doorbell_idx ( unsigned int qpn_offset ) {
430
-	return ( ARBEL_MAX_CQS + qpn_offset );
431
-}
432
-
433
-/**
434
- * Get receive work request doorbell index
435
- *
436
- * @v qpn_offset	Queue pair number offset
437
- * @ret doorbell_idx	Doorbell index
438
- */
439
-static inline unsigned int
440
-arbel_recv_doorbell_idx ( unsigned int qpn_offset ) {
441
-	return ( ARBEL_MAX_DOORBELL_RECORDS - ARBEL_MAX_CQS - qpn_offset - 1 );
442
-}
443
-
444
-/**
445
- * Get completion queue consumer counter doorbell index
446
- *
447
- * @v cqn_offset	Completion queue number offset
448
- * @ret doorbell_idx	Doorbell index
449
- */
450
-static inline unsigned int
451
-arbel_cq_ci_doorbell_idx ( unsigned int cqn_offset ) {
452
-	return ( ARBEL_MAX_DOORBELL_RECORDS - cqn_offset - 1 );
453
-}
454
-
455
-#endif /* _ARBEL_H */

+ 0
- 191
src/drivers/net/mlx_ipoib/bit_ops.h 查看文件

@@ -80,14 +80,6 @@ struct addr_64_st {
80 80
  */
81 81
 #define MT_EXTRACT_ARRAY32(A,O,S) MT_EXTRACT32(((__u32*)A)[O >> 5],(O & MASK32(5)),S)
82 82
 
83
-/*
84
- * MT_EXTRACT_ARRAY32_BE macro is similar to EXTRACT but works on an array of (__u32),
85
- * thus offset may be larger than 32 (but not size).
86
- *
87
- * (added by mcb30)
88
- */
89
-#define MT_EXTRACT_ARRAY32_BE(A,O,S) MT_EXTRACT32(be32_to_cpu(((__u32*)A)[O >> 5]),(O & MASK32(5)),S)
90
-
91 83
 /*
92 84
  * MT_INSERT_ARRAY32 macro is similar to INSERT but works on an array of (__u32),
93 85
  * thus offset may be larger than 32 (but not size).
@@ -98,8 +90,6 @@ struct addr_64_st {
98 90
 
99 91
 #define EX_FLD(a, st, fld) MT_EXTRACT_ARRAY32(a, MT_BIT_OFFSET(st, fld), MT_BIT_SIZE(st, fld))
100 92
 
101
-#define EX_FLD_BE(a, st, fld) MT_EXTRACT_ARRAY32_BE(a, MT_BIT_OFFSET(st, fld), MT_BIT_SIZE(st, fld))
102
-
103 93
 /* return the address of the dword holding the field 
104 94
 
105 95
 	buf = pointer to buffer where to place the value
@@ -133,185 +123,4 @@ struct addr_64_st {
133 123
 	field; \
134 124
 })
135 125
 
136
-
137
-
138
-/* Remaining code Copyright Fen Systems Ltd. 2007 */
139
-
140
-/**
141
- * Wrapper structure for pseudo_bit_t structures
142
- *
143
- * This structure provides a wrapper around the autogenerated
144
- * pseudo_bit_t structures.  It has the correct size, and also
145
- * encapsulates type information about the underlying pseudo_bit_t
146
- * structure, which allows the MLX_FILL etc. macros to work without
147
- * requiring explicit type information.
148
- */
149
-#define MLX_DECLARE_STRUCT( _structure )				     \
150
-	_structure {							     \
151
-	    union {							     \
152
-		uint8_t bytes[ sizeof ( struct _structure ## _st ) / 8 ];    \
153
-		uint32_t dwords[ sizeof ( struct _structure ## _st ) / 32 ]; \
154
-		struct _structure ## _st *dummy[0];			     \
155
-	    } u;							     \
156
-	}
157
-
158
-/** Get pseudo_bit_t structure type from wrapper structure pointer */
159
-#define MLX_PSEUDO_STRUCT( _ptr )					     \
160
-	typeof ( *((_ptr)->u.dummy[0]) )
161
-
162
-/** Bit offset of a field within a pseudo_bit_t structure */
163
-#define MLX_BIT_OFFSET( _structure_st, _field )				     \
164
-	offsetof ( _structure_st, _field )
165
-
166
-/** Dword offset of a field within a pseudo_bit_t structure */
167
-#define MLX_DWORD_OFFSET( _structure_st, _field )			     \
168
-	( MLX_BIT_OFFSET ( _structure_st, _field ) / 32 )
169
-
170
-/** Dword bit offset of a field within a pseudo_bit_t structure
171
- *
172
- * Yes, using mod-32 would work, but would lose the check for the
173
- * error of specifying a mismatched field name and dword index.
174
- */
175
-#define MLX_DWORD_BIT_OFFSET( _structure_st, _index, _field )		     \
176
-	( MLX_BIT_OFFSET ( _structure_st, _field ) - ( 32 * (_index) ) )
177
-
178
-/** Bit width of a field within a pseudo_bit_t structure */
179
-#define MLX_BIT_WIDTH( _structure_st, _field )				     \
180
-	sizeof ( ( ( _structure_st * ) NULL )->_field )
181
-
182
-/** Bit mask for a field within a pseudo_bit_t structure */
183
-#define MLX_BIT_MASK( _structure_st, _field )				     \
184
-	( ( ~( ( uint32_t ) 0 ) ) >>					     \
185
-	  ( 32 - MLX_BIT_WIDTH ( _structure_st, _field ) ) )
186
-
187
-/*
188
- * Assemble native-endian dword from named fields and values
189
- *
190
- */
191
-
192
-#define MLX_ASSEMBLE_1( _structure_st, _index, _field, _value )		     \
193
-	( (_value) << MLX_DWORD_BIT_OFFSET ( _structure_st, _index, _field ) )
194
-
195
-#define MLX_ASSEMBLE_2( _structure_st, _index, _field, _value, ... )	     \
196
-	( MLX_ASSEMBLE_1 ( _structure_st, _index, _field, _value ) |	     \
197
-	  MLX_ASSEMBLE_1 ( _structure_st, _index, __VA_ARGS__ ) )
198
-
199
-#define MLX_ASSEMBLE_3( _structure_st, _index, _field, _value, ... )	     \
200
-	( MLX_ASSEMBLE_1 ( _structure_st, _index, _field, _value ) |	     \
201
-	  MLX_ASSEMBLE_2 ( _structure_st, _index, __VA_ARGS__ ) )
202
-
203
-#define MLX_ASSEMBLE_4( _structure_st, _index, _field, _value, ... )	     \
204
-	( MLX_ASSEMBLE_1 ( _structure_st, _index, _field, _value ) |	     \
205
-	  MLX_ASSEMBLE_3 ( _structure_st, _index, __VA_ARGS__ ) )
206
-
207
-#define MLX_ASSEMBLE_5( _structure_st, _index, _field, _value, ... )	     \
208
-	( MLX_ASSEMBLE_1 ( _structure_st, _index, _field, _value ) |	     \
209
-	  MLX_ASSEMBLE_4 ( _structure_st, _index, __VA_ARGS__ ) )
210
-
211
-#define MLX_ASSEMBLE_6( _structure_st, _index, _field, _value, ... )	     \
212
-	( MLX_ASSEMBLE_1 ( _structure_st, _index, _field, _value ) |	     \
213
-	  MLX_ASSEMBLE_5 ( _structure_st, _index, __VA_ARGS__ ) )
214
-
215
-/*
216
- * Build native-endian (positive) dword bitmasks from named fields
217
- *
218
- */
219
-
220
-#define MLX_MASK_1( _structure_st, _index, _field )			     \
221
-	( MLX_BIT_MASK ( _structure_st, _field ) <<			     \
222
-	  MLX_DWORD_BIT_OFFSET ( _structure_st, _index, _field ) )
223
-
224
-#define MLX_MASK_2( _structure_st, _index, _field, ... )		     \
225
-	( MLX_MASK_1 ( _structure_st, _index, _field ) |		     \
226
-	  MLX_MASK_1 ( _structure_st, _index, __VA_ARGS__ ) )
227
-
228
-#define MLX_MASK_3( _structure_st, _index, _field, ... )		     \
229
-	( MLX_MASK_1 ( _structure_st, _index, _field ) |		     \
230
-	  MLX_MASK_2 ( _structure_st, _index, __VA_ARGS__ ) )
231
-
232
-#define MLX_MASK_4( _structure_st, _index, _field, ... )		     \
233
-	( MLX_MASK_1 ( _structure_st, _index, _field ) |		     \
234
-	  MLX_MASK_3 ( _structure_st, _index, __VA_ARGS__ ) )
235
-
236
-#define MLX_MASK_5( _structure_st, _index, _field, ... )		     \
237
-	( MLX_MASK_1 ( _structure_st, _index, _field ) |		     \
238
-	  MLX_MASK_4 ( _structure_st, _index, __VA_ARGS__ ) )
239
-
240
-#define MLX_MASK_6( _structure_st, _index, _field, ... )		     \
241
-	( MLX_MASK_1 ( _structure_st, _index, _field ) |		     \
242
-	  MLX_MASK_5 ( _structure_st, _index, __VA_ARGS__ ) )
243
-
244
-/*
245
- * Populate big-endian dwords from named fields and values
246
- *
247
- */
248
-
249
-#define MLX_FILL( _ptr, _index, _assembled )				     \
250
-	do {								     \
251
-		uint32_t *__ptr = &(_ptr)->u.dwords[(_index)];		     \
252
-		uint32_t __assembled = (_assembled);			     \
253
-		*__ptr = cpu_to_be32 ( __assembled );			     \
254
-	} while ( 0 )
255
-
256
-#define MLX_FILL_1( _ptr, _index, ... )					     \
257
-	MLX_FILL ( _ptr, _index, MLX_ASSEMBLE_1 ( MLX_PSEUDO_STRUCT ( _ptr ),\
258
-						  _index, __VA_ARGS__ ) )
259
-
260
-#define MLX_FILL_2( _ptr, _index, ... )					     \
261
-	MLX_FILL ( _ptr, _index, MLX_ASSEMBLE_2 ( MLX_PSEUDO_STRUCT ( _ptr ),\
262
-						  _index, __VA_ARGS__ ) )
263
-
264
-#define MLX_FILL_3( _ptr, _index, ... )					     \
265
-	MLX_FILL ( _ptr, _index, MLX_ASSEMBLE_3 ( MLX_PSEUDO_STRUCT ( _ptr ),\
266
-						  _index, __VA_ARGS__ ) )
267
-
268
-#define MLX_FILL_4( _ptr, _index, ... )					     \
269
-	MLX_FILL ( _ptr, _index, MLX_ASSEMBLE_4 ( MLX_PSEUDO_STRUCT ( _ptr ),\
270
-						  _index, __VA_ARGS__ ) )
271
-
272
-#define MLX_FILL_5( _ptr, _index, ... )					     \
273
-	MLX_FILL ( _ptr, _index, MLX_ASSEMBLE_5 ( MLX_PSEUDO_STRUCT ( _ptr ),\
274
-						  _index, __VA_ARGS__ ) )
275
-
276
-#define MLX_FILL_6( _ptr, _index, ... )					     \
277
-	MLX_FILL ( _ptr, _index, MLX_ASSEMBLE_6 ( MLX_PSEUDO_STRUCT ( _ptr ),\
278
-						  _index, __VA_ARGS__ ) )
279
-
280
-/*
281
- * Modify big-endian dword using named field and value
282
- *
283
- */
284
-
285
-#define MLX_SET( _ptr, _field, _value )					     \
286
-	do {								     \
287
-		unsigned int __index = 					     \
288
-		    MLX_DWORD_OFFSET ( MLX_PSEUDO_STRUCT ( _ptr ), _field ); \
289
-		uint32_t *__ptr = &(_ptr)->u.dwords[__index];		     \
290
-		uint32_t __value = be32_to_cpu ( *__ptr );		     \
291
-		__value &= ~( MLX_MASK_1 ( MLX_PSEUDO_STRUCT ( _ptr ),	     \
292
-					   __index, _field ) );		     \
293
-		__value |= MLX_ASSEMBLE_1 ( MLX_PSEUDO_STRUCT ( _ptr ),	     \
294
-					    __index, _field, _value );	     \
295
-		*__ptr = cpu_to_be32 ( __value );			     \
296
-	} while ( 0 )
297
-
298
-/*
299
- * Extract value of named field
300
- *
301
- */
302
-
303
-#define MLX_GET( _ptr, _field )						     \
304
-	( {								     \
305
-		unsigned int __index = 					     \
306
-		    MLX_DWORD_OFFSET ( MLX_PSEUDO_STRUCT ( _ptr ), _field ); \
307
-		uint32_t *__ptr = &(_ptr)->u.dwords[__index];		     \
308
-		uint32_t __value = be32_to_cpu ( *__ptr );		     \
309
-		__value >>=						     \
310
-		    MLX_DWORD_BIT_OFFSET ( MLX_PSEUDO_STRUCT ( _ptr ),	     \
311
-					    __index, _field );		     \
312
-		__value &=						     \
313
-		    MLX_BIT_MASK ( MLX_PSEUDO_STRUCT ( _ptr ), _field );     \
314
-		__value;						     \
315
-	} )
316
-
317 126
 #endif				/* __bit_ops_h__ */

+ 3
- 27
src/drivers/net/mlx_ipoib/cmdif_comm.c 查看文件

@@ -112,8 +112,6 @@ static XHH_cmd_status_t cmd_invoke(command_fields_t * cmd_prms)
112 112
 	__u32 hcr[7], data;
113 113
 	__u8 status;
114 114
 
115
-	DBG ( "Executing command:\n" );
116
-		
117 115
 	/* check if go bit is free */
118 116
 	ret = cmdif_is_free(&is_free);
119 117
 	if (ret) {
@@ -131,15 +129,6 @@ static XHH_cmd_status_t cmd_invoke(command_fields_t * cmd_prms)
131 129
 	edit_hcr(cmd_prms, hcr);
132 130
 	__asm__ __volatile__("":::"memory");
133 131
 
134
-	DBG_HD ( &hcr[0], sizeof ( hcr ) ); 
135
-	if ( cmd_prms->in_trans == TRANS_MAILBOX ) {
136
-		size_t size = ( 4 * cmd_prms->in_param_size );
137
-		if ( size > 512 )
138
-			size = 512;
139
-		DBG2 ( "Input mailbox:\n" );
140
-		DBG2_HD ( &cmd_prms->in_param[0], size );
141
-	}
142
-
143 132
 	for (i = 0; i < 7; ++i) {
144 133
 		ret = gw_write_cr(HCR_BASE + i * 4, hcr[i]);
145 134
 		if (ret) {
@@ -170,14 +159,6 @@ static XHH_cmd_status_t cmd_invoke(command_fields_t * cmd_prms)
170 159
 		return status;
171 160
 	}
172 161
 
173
-	if ( cmd_prms->out_trans == TRANS_MAILBOX ) {
174
-		size_t size = ( 4 * cmd_prms->out_param_size );
175
-		if ( size > 512 )
176
-			size = 512;
177
-		DBG2 ( "Output mailbox:\n" );
178
-		DBG2_HD ( &cmd_prms->out_param[0], size );
179
-	}
180
-
181 162
 	if (cmd_prms->out_trans == TRANS_MAILBOX)
182 163
 		be_to_cpu_buf(cmd_prms->out_param, cmd_prms->out_param_size);
183 164
 	else if (cmd_prms->out_trans == TRANS_IMMEDIATE) {
@@ -187,8 +168,6 @@ static XHH_cmd_status_t cmd_invoke(command_fields_t * cmd_prms)
187 168
 			return -1;
188 169
 	}
189 170
 
190
-	DBG ( "Command executed successfully\n" );
191
-
192 171
 	return 0;
193 172
 }
194 173
 
@@ -563,10 +542,7 @@ static int cmd_mgid_hash(__u8 * gid, __u16 * mgid_hash_p)
563 542
 {
564 543
 	int rc;
565 544
 	command_fields_t cmd_desc;
566
-	union {
567
-		__u32 u32;
568
-		__u16 u16[2];
569
-	} result;
545
+	__u16 result[2];
570 546
 
571 547
 	memset(&cmd_desc, 0, sizeof cmd_desc);
572 548
 
@@ -578,9 +554,9 @@ static int cmd_mgid_hash(__u8 * gid, __u16 * mgid_hash_p)
578 554
 
579 555
 	rc = cmd_invoke(&cmd_desc);
580 556
 	if (!rc) {
581
-		rc = gw_read_cr(HCR_BASE + 16, &result.u32);
557
+		rc = gw_read_cr(HCR_BASE + 16, (__u32 *) result);
582 558
 		if (!rc) {
583
-			*mgid_hash_p = result.u16[0];
559
+			*mgid_hash_p = result[0];
584 560
 		}
585 561
 	}
586 562
 

+ 8
- 43
src/drivers/net/mlx_ipoib/cmdif_mt25218.c 查看文件

@@ -22,6 +22,14 @@
22 22
 #include "cmdif_priv.h"
23 23
 #include "mt25218.h"
24 24
 
25
+/*
26
+ *  cmd_sys_dis
27
+ */
28
+static int cmd_sys_dis(void)
29
+{
30
+	return 0;
31
+}
32
+
25 33
 /*
26 34
  *  cmd_write_mgm
27 35
  */
@@ -317,24 +325,6 @@ static int cmd_map_icm_aux(struct map_icm_st *map_icm_aux_p)
317 325
 	return rc;
318 326
 }
319 327
 
320
-
321
-/*
322
- *  cmd_unmap_icm_aux
323
- */
324
-static int cmd_unmap_icm_aux(void)
325
-{
326
-	int rc;
327
-	command_fields_t cmd_desc;
328
-
329
-	memset(&cmd_desc, 0, sizeof cmd_desc);
330
-
331
-	cmd_desc.opcode = MEMFREE_CMD_UNMAP_ICM_AUX;
332
-
333
-	rc = cmd_invoke(&cmd_desc);
334
-
335
-	return rc;
336
-}
337
-
338 328
 /*
339 329
  *  cmd_map_icm
340 330
  */
@@ -381,31 +371,6 @@ static int cmd_map_icm(struct map_icm_st *map_icm_p)
381 371
 	return rc;
382 372
 }
383 373
 
384
-
385
-
386
-/*
387
- *  cmd_unmap_icm
388
- */
389
-static int cmd_unmap_icm(struct map_icm_st *map_icm_p)
390
-{
391
-	int rc;
392
-	command_fields_t cmd_desc;
393
-	__u32 iprm[2];
394
-
395
-	memset(&cmd_desc, 0, sizeof cmd_desc);
396
-
397
-	cmd_desc.opcode = MEMFREE_CMD_UNMAP_ICM;
398
-	iprm[0] = map_icm_p->vpm_arr[0].va_h;
399
-	iprm[1] = map_icm_p->vpm_arr[0].va_l;
400
-	cmd_desc.in_param = iprm;
401
-	cmd_desc.in_trans = TRANS_IMMEDIATE;
402
-	cmd_desc.input_modifier = 1 << map_icm_p->vpm_arr[0].log2_size;
403
-
404
-	rc = cmd_invoke(&cmd_desc);
405
-
406
-	return rc;
407
-}
408
-
409 374
 /*
410 375
  *  cmd_query_dev_lim
411 376
  */

+ 7
- 13
src/drivers/net/mlx_ipoib/doc/README.boot_over_ib 查看文件

@@ -92,11 +92,13 @@ files with .mlx extension also available from Mellanox's web site.
92 92
 
93 93
 6. Preparing the DHCP Server
94 94
 -----------------------------
95
-The DHCP server may need to be modified in order to work on IPOIB. Some
96
-distributuions alreay support this (Some SUSE distributuions) while others
97
-do not. If the pre-installed server does not support IPOIB, the user can download
98
-the sources from ISC http://www.isc.org/ and apply the appropriate patch in
99
-the patches directory.
95
+DHCP messages over IP Over IB are transmitted as broadcasts. In order to 
96
+distinguish between messages belonging to a certain DHCP session, the messages 
97
+must carry the client identifier option (see ietf documentation	referred to 
98
+above). As of November 2005, ISC DHCP servers do not support this feature. 
99
+They are expected to support this at the end of 2005. In order to work this 
100
+out, the appropriate patch must be applied (see patches directory). It has 
101
+been tested on version isc-dhcpd-V3.0.4b2.
100 102
 
101 103
 The DHCP server must run on a machine which supports IP Over IB. The Mellanox 
102 104
 IBGD package (gen1 or gen2) can be used to provide this.
@@ -169,14 +171,6 @@ PXE_IB_PORT.
169 171
 
170 172
 14. Installing a package from Mellanox
171 173
 --------------------------------------
172
-The package comes as a compressed file with extension .bz2 or .gz. Follow 
173
-these steps:
174
-1. Create a directory
175
-2. cd to this directory
176
-3. tar jxf <package file name>  for .bz2 files or
177
-   tar zxf <package file name>  for .gz files
178
-
179
-The binaries can be found under src/bin
180 174
 When using a package obtained from Mellanox Technologies' web site, the
181 175
 directory src/bin will contain the driver binary files. The files have a .bin
182 176
 extension and are equivalent to the same files with .zrom extension.

+ 7
- 25
src/drivers/net/mlx_ipoib/ib_driver.c 查看文件

@@ -62,9 +62,6 @@ static int wait_logic_link_up(__u8 port)
62 62
 	return 0;
63 63
 }
64 64
 
65
-unsigned long ipoib_qkey;
66
-unsigned long hack_ipoib_qkey;
67
-
68 65
 static int ib_driver_init(struct pci_device *pci, udqp_t * ipoib_qph_p)
69 66
 {
70 67
 	int rc;
@@ -150,9 +147,6 @@ static int ib_driver_init(struct pci_device *pci, udqp_t * ipoib_qph_p)
150 147
 			qkey, mlid);
151 148
 	}
152 149
 
153
-	hack_ipoib_qkey = ipoib_qkey = qkey;
154
-
155
-#if 0
156 150
 	rc = create_ipoib_qp(&ib_data.ipoib_qp,
157 151
 			     &ib_data.ipoib_snd_cq,
158 152
 			     &ib_data.ipoib_rcv_cq, qkey);
@@ -172,7 +166,6 @@ static int ib_driver_init(struct pci_device *pci, udqp_t * ipoib_qph_p)
172 166
 	} else {
173 167
 		tprintf("add_qp_to_mcast_group() success");
174 168
 	}
175
-#endif
176 169
 
177 170
 	/* create a broadcast group ud AV */
178 171
 	av = alloc_ud_av();
@@ -185,19 +178,6 @@ static int ib_driver_init(struct pci_device *pci, udqp_t * ipoib_qph_p)
185 178
 	tprintf("modify_av_params() success");
186 179
 	ib_data.bcast_av = av;
187 180
 
188
-#if ! CREATE_OWN
189
-	rc = create_ipoib_qp(&ib_data.ipoib_qp,
190
-			     &ib_data.ipoib_snd_cq,
191
-			     &ib_data.ipoib_rcv_cq, qkey);
192
-	if (rc) {
193
-		eprintf("");
194
-		return rc;
195
-	}
196
-
197
-	tprintf("create_ipoib_qp() success");
198
-	*ipoib_qph_p = ib_data.ipoib_qp;
199
-#endif
200
-
201 181
 	do {
202 182
 		rc = poll_eq(&ib_eqe, &num_eqe);
203 183
 		if (rc) {
@@ -268,10 +248,12 @@ static int ib_driver_close(int fw_fatal)
268 248
 		ret = 1;
269 249
 	}
270 250
 
271
-	rc = unset_hca();
272
-	if (rc) {
273
-		eprintf("");
274
-		ret = 1;
251
+	if (!fw_fatal) {
252
+		rc = cmd_sys_dis();
253
+		if (rc) {
254
+			eprintf("");
255
+			ret = 1;
256
+		}
275 257
 	}
276 258
 
277 259
 	return ret;
@@ -286,7 +268,7 @@ static int poll_cqe_tout(cq_t cqh, __u16 tout, void **wqe, int *good_p)
286 268
 
287 269
 	end = currticks() + tout;
288 270
 	do {
289
-		rc = ib_poll_cqx(cqh, &ib_cqe, &num_cqes);
271
+		rc = ib_poll_cq(cqh, &ib_cqe, &num_cqes);
290 272
 		if (rc)
291 273
 			return rc;
292 274
 

+ 6
- 6
src/drivers/net/mlx_ipoib/ib_driver.h 查看文件

@@ -49,17 +49,17 @@
49 49
 #define QPN_BASE 0x550000
50 50
 
51 51
 enum {
52
+	MADS_QPN_SN,
52 53
 	IPOIB_QPN_SN,
53
-	MADS_QPN_SN = 4,
54
-	MAX_APP_QPS = 8
54
+	MAX_APP_QPS
55 55
 };
56 56
 
57 57
 enum {
58
+	MADS_SND_CQN_SN,
59
+	MADS_RCV_CQN_SN,
58 60
 	IPOIB_SND_CQN_SN,
59 61
 	IPOIB_RCV_CQN_SN,
60
-	MADS_SND_CQN_SN = 4,
61
-	MADS_RCV_CQN_SN,
62
-	MAX_APP_CQS = 8
62
+	MAX_APP_CQS
63 63
 };
64 64
 
65 65
 enum {
@@ -153,7 +153,7 @@ static int gw_read_cr(__u32 addr, __u32 * result);
153 153
 static int gw_write_cr(__u32 addr, __u32 data);
154 154
 static ud_av_t alloc_ud_av(void);
155 155
 static void free_ud_av(ud_av_t av);
156
-static int ib_poll_cqx(cq_t cq, struct ib_cqe_st *ib_cqe_p, __u8 * num_cqes);
156
+static int ib_poll_cq(cq_t cq, struct ib_cqe_st *ib_cqe_p, __u8 * num_cqes);
157 157
 static int add_qp_to_mcast_group(union ib_gid_u mcast_gid, __u8 add);
158 158
 static int clear_interrupt(void);
159 159
 static int poll_cqe_tout(cq_t cqh, __u16 tout, void **wqe, int *good_p);

+ 2
- 5
src/drivers/net/mlx_ipoib/ib_mad.c 查看文件

@@ -158,7 +158,7 @@ static int join_mc_group(__u32 * qkey_p, __u16 * mlid_p, __u8 join)
158 158
 		eprintf("");
159 159
 		return -1;
160 160
 	}
161
-	tprintf("allocated snd_wqe=%p", snd_wqe);
161
+	tprintf("allocated snd_wqe=0x%lx", snd_wqe);
162 162
 
163 163
 	mad = get_send_wqe_buf(snd_wqe, 0);
164 164
 	memset(mad, 0, 256);
@@ -264,7 +264,7 @@ static int join_mc_group(__u32 * qkey_p, __u16 * mlid_p, __u8 join)
264 264
 	return is_good ? 0 : -1;
265 265
 }
266 266
 
267
-int get_path_record(union ib_gid_u *dgid, __u16 * dlid_p, u8 * sl_p,
267
+static int get_path_record(union ib_gid_u *dgid, __u16 * dlid_p, u8 * sl_p,
268 268
 			   u8 * rate_p)
269 269
 {
270 270
 	struct path_record_mad_st *mad, *rcv_mad;
@@ -321,9 +321,6 @@ int get_path_record(union ib_gid_u *dgid, __u16 * dlid_p, u8 * sl_p,
321 321
 	cpu_to_be_buf(mad, sizeof *mad);
322 322
 	memcpy(mad->path_record.sgid.raw, ib_data.port_gid.raw, 16);
323 323
 
324
-	DBG ( "data:\n" );
325
-	DBG_HD ( mad, sizeof ( *mad ) );
326
-
327 324
 	rc = post_send_req(qp, snd_wqe, 1);
328 325
 	if (rc) {
329 326
 		eprintf("");

+ 1
- 1
src/drivers/net/mlx_ipoib/ib_mad.h 查看文件

@@ -104,7 +104,7 @@ union mad_u {
104 104
 	struct ib_mad_st mad;
105 105
 } __attribute__ ((packed));
106 106
 
107
-int get_path_record(union ib_gid_u *dgid, __u16 * dlid_p, __u8 * sl_p,
107
+static int get_path_record(union ib_gid_u *dgid, __u16 * dlid_p, __u8 * sl_p,
108 108
 			   __u8 * rate_p);
109 109
 
110 110
 #endif				/* __ib_mad_h__ */

+ 18
- 46
src/drivers/net/mlx_ipoib/ib_mt23108.c 查看文件

@@ -92,12 +92,7 @@ static int find_mlx_bridge(__u8 hca_bus, __u8 * br_bus_p, __u8 * br_devfn_p)
92 92
 	for (bus = 0; bus < 256; ++bus) {
93 93
 		for (dev = 0; dev < 32; ++dev) {
94 94
 			devfn = (dev << 3);
95
-
96
-			struct pci_device tmp;
97
-			tmp.bus = bus;
98
-			tmp.devfn = devfn;
99
-
100
-			rc = pcibios_read_config_word(&tmp, PCI_VENDOR_ID,
95
+			rc = pcibios_read_config_word(bus, devfn, PCI_VENDOR_ID,
101 96
 						      &vendor);
102 97
 			if (rc)
103 98
 				return rc;
@@ -105,7 +100,7 @@ static int find_mlx_bridge(__u8 hca_bus, __u8 * br_bus_p, __u8 * br_devfn_p)
105 100
 			if (vendor != MELLANOX_VENDOR_ID)
106 101
 				continue;
107 102
 
108
-			rc = pcibios_read_config_word(&tmp, PCI_DEVICE_ID,
103
+			rc = pcibios_read_config_word(bus, devfn, PCI_DEVICE_ID,
109 104
 						      &dev_id);
110 105
 			if (rc)
111 106
 				return rc;
@@ -113,7 +108,7 @@ static int find_mlx_bridge(__u8 hca_bus, __u8 * br_bus_p, __u8 * br_devfn_p)
113 108
 			if (dev_id != TAVOR_BRIDGE_DEVICE_ID)
114 109
 				continue;
115 110
 
116
-			rc = pcibios_read_config_byte(&tmp,
111
+			rc = pcibios_read_config_byte(bus, devfn,
117 112
 						      PCI_SECONDARY_BUS,
118 113
 						      &sec_bus);
119 114
 			if (rc)
@@ -166,7 +161,7 @@ static int ib_device_init(struct pci_device *dev)
166 161
 	tavor_pci_dev.dev.dev = dev;
167 162
 
168 163
 	tprintf("");
169
-	if (dev->device == TAVOR_DEVICE_ID) {
164
+	if (dev->dev_id == TAVOR_DEVICE_ID) {
170 165
 
171 166
 		rc = find_mlx_bridge(dev->bus, &br_bus, &br_devfn);
172 167
 		if (rc) {
@@ -180,12 +175,7 @@ static int ib_device_init(struct pci_device *dev)
180 175
 		tprintf("bus=%d devfn=0x%x", br_bus, br_devfn);
181 176
 		/* save config space */
182 177
 		for (i = 0; i < 64; ++i) {
183
-
184
-			struct pci_device tmp;
185
-			tmp.bus = br_bus;
186
-			tmp.devfn = br_devfn;
187
-
188
-			rc = pcibios_read_config_dword(&tmp, i << 2,
178
+			rc = pcibios_read_config_dword(br_bus, br_devfn, i << 2,
189 179
 						       &tavor_pci_dev.br.
190 180
 						       dev_config_space[i]);
191 181
 			if (rc) {
@@ -213,7 +203,7 @@ static int ib_device_init(struct pci_device *dev)
213 203
 		eprintf("");
214 204
 		return -1;
215 205
 	}
216
-	tprintf("uar_base (pa:va) = 0x%lx %p",
206
+	tprintf("uar_base (pa:va) = 0x%lx 0x%lx",
217 207
 		tavor_pci_dev.dev.bar[2] + UAR_IDX * 0x1000, tavor_pci_dev.uar);
218 208
 
219 209
 	tprintf("");
@@ -235,7 +225,7 @@ static int init_dev_data(void)
235 225
 
236 226
 	dev_buffers_p = bus_to_virt(tmp);
237 227
 	memreg_size = (__u32) (&memreg_size) - (__u32) dev_buffers_p;
238
-	tprintf("src_buf=%p, dev_buffers_p=%p, memreg_size=0x%lx", src_buf,
228
+	tprintf("src_buf=0x%lx, dev_buffers_p=0x%lx, memreg_size=0x%x", src_buf,
239 229
 		dev_buffers_p, memreg_size);
240 230
 
241 231
 	return 0;
@@ -246,14 +236,10 @@ static int restore_config(void)
246 236
 	int i;
247 237
 	int rc;
248 238
 
249
-	if (tavor_pci_dev.dev.dev->device == TAVOR_DEVICE_ID) {
239
+	if (tavor_pci_dev.dev.dev->dev_id == TAVOR_DEVICE_ID) {
250 240
 		for (i = 0; i < 64; ++i) {
251
-
252
-			struct pci_device tmp;
253
-			tmp.bus = tavor_pci_dev.br.bus;
254
-			tmp.devfn = tavor_pci_dev.br.devfn;
255
-
256
-			rc = pcibios_write_config_dword(&tmp,
241
+			rc = pcibios_write_config_dword(tavor_pci_dev.br.bus,
242
+							tavor_pci_dev.br.devfn,
257 243
 							i << 2,
258 244
 							tavor_pci_dev.br.
259 245
 							dev_config_space[i]);
@@ -565,9 +551,9 @@ static int setup_hca(__u8 port, void **eq_p)
565 551
 		tprintf("fw_rev_major=%d", qfw.fw_rev_major);
566 552
 		tprintf("fw_rev_minor=%d", qfw.fw_rev_minor);
567 553
 		tprintf("fw_rev_subminor=%d", qfw.fw_rev_subminor);
568
-		tprintf("error_buf_start_h=0x%lx", qfw.error_buf_start_h);
569
-		tprintf("error_buf_start_l=0x%lx", qfw.error_buf_start_l);
570
-		tprintf("error_buf_size=%ld", qfw.error_buf_size);
554
+		tprintf("error_buf_start_h=0x%x", qfw.error_buf_start_h);
555
+		tprintf("error_buf_start_l=0x%x", qfw.error_buf_start_l);
556
+		tprintf("error_buf_size=%d", qfw.error_buf_size);
571 557
 	}
572 558
 
573 559
 	if (qfw.error_buf_start_h) {
@@ -813,20 +799,6 @@ static int setup_hca(__u8 port, void **eq_p)
813 799
 	return ret;
814 800
 }
815 801
 
816
-
817
-static int unset_hca(void)
818
-{
819
-	int rc = 0;
820
-
821
-	if (!fw_fatal) {
822
-		rc = cmd_sys_dis();
823
-		if (rc)
824
-			eprintf("");
825
-	}
826
-
827
-	return rc;
828
-}
829
-
830 802
 static void *get_inprm_buf(void)
831 803
 {
832 804
 	return dev_buffers_p->inprm_buf;
@@ -958,7 +930,7 @@ static int post_send_req(void *qph, void *wqeh, __u8 num_gather)
958 930
 	__u32 *psrc, *pdst;
959 931
 	__u32 nds;
960 932
 
961
-	tprintf("snd_wqe=%p, virt_to_bus(snd_wqe)=0x%lx", snd_wqe,
933
+	tprintf("snd_wqe=0x%lx, virt_to_bus(snd_wqe)=0x%lx", snd_wqe,
962 934
 		virt_to_bus(snd_wqe));
963 935
 
964 936
 	memset(&dbell, 0, sizeof dbell);
@@ -1082,7 +1054,7 @@ static int create_ipoib_qp(void **qp_pp,
1082 1054
 		/* update data */
1083 1055
 		qp->rcv_wq[i].wqe_cont.qp = qp;
1084 1056
 		qp->rcv_bufs[i] = ib_buffers.ipoib_rcv_buf[i];
1085
-		tprintf("rcv_buf=%p", qp->rcv_bufs[i]);
1057
+		tprintf("rcv_buf=%lx", qp->rcv_bufs[i]);
1086 1058
 	}
1087 1059
 
1088 1060
 	/* init send queue WQEs list */
@@ -1415,7 +1387,7 @@ static int ib_poll_cq(void *cqh, struct ib_cqe_st *ib_cqe_p, u8 * num_cqes)
1415 1387
 		eprintf("syndrome=0x%lx",
1416 1388
 			EX_FLD(cqe.error_cqe, tavorprm_completion_with_error_st,
1417 1389
 			       syndrome));
1418
-		eprintf("wqe_addr=%p", wqe_p);
1390
+		eprintf("wqe_addr=0x%lx", wqe_p);
1419 1391
 		eprintf("wqe_size=0x%lx",
1420 1392
 			EX_FLD(cqe.error_cqe, tavorprm_completion_with_error_st,
1421 1393
 			       wqe_size));
@@ -1544,7 +1516,7 @@ static struct recv_wqe_st *alloc_rcv_wqe(struct udqp_st *qp)
1544 1516
 	wqe->mpointer[1].lkey = dev_ib_data.mkey;
1545 1517
 	wqe->mpointer[1].byte_count = qp->rcv_buf_sz;
1546 1518
 
1547
-	tprintf("rcv_buf=%p\n", qp->rcv_bufs[new_entry]);
1519
+	tprintf("rcv_buf=%lx\n", qp->rcv_bufs[new_entry]);
1548 1520
 
1549 1521
 	/* we do it only on the data segment since the control
1550 1522
 	   segment is always owned by HW */
@@ -1671,7 +1643,7 @@ static int poll_eq(struct ib_eqe_st *ib_eqe_p, __u8 * num_eqes)
1671 1643
 	struct eq_st *eq = &dev_ib_data.eq;
1672 1644
 
1673 1645
 	ptr = (__u32 *) (&(eq->eq_buf[eq->cons_idx]));
1674
-	tprintf("cons)idx=%ld, addr(eqe)=%lx, val=0x%lx", eq->cons_idx, virt_to_bus(ptr), ptr[7]);
1646
+	tprintf("cons)idx=%d, addr(eqe)=%x, val=0x%x", eq->cons_idx, virt_to_bus(ptr), ptr[7]);
1675 1647
 	owner = (ptr[7] & 0x80000000) ? OWNER_HW : OWNER_SW;
1676 1648
 	if (owner == OWNER_SW) {
1677 1649
         tprintf("got eqe");

+ 18
- 107
src/drivers/net/mlx_ipoib/ib_mt25218.c 查看文件

@@ -89,10 +89,6 @@ static struct dev_pci_struct memfree_pci_dev;
89 89
 static struct device_buffers_st *dev_buffers_p;
90 90
 static struct device_ib_data_st dev_ib_data;
91 91
 
92
-
93
-
94
-struct map_icm_st icm_map_obj;
95
-
96 92
 static int gw_write_cr(__u32 addr, __u32 data)
97 93
 {
98 94
 	writel(htonl(data), memfree_pci_dev.cr_space + addr);
@@ -159,7 +155,7 @@ static int ib_device_init(struct pci_device *dev)
159 155
 		eprintf("");
160 156
 		return -1;
161 157
 	}
162
-	tprintf("uar_base (pa:va) = 0x%lx %p",
158
+	tprintf("uar_base (pa:va) = 0x%lx 0x%lx",
163 159
 		memfree_pci_dev.dev.bar[2] + UAR_IDX * 0x1000,
164 160
 		memfree_pci_dev.uar);
165 161
 
@@ -174,8 +170,6 @@ static inline unsigned long lalign(unsigned long buf, unsigned long align)
174 170
 			       (~(((unsigned long)align) - 1)));
175 171
 }
176 172
 
177
-#include <gpxe/umalloc.h>
178
-
179 173
 static int init_dev_data(void)
180 174
 {
181 175
 	unsigned long tmp;
@@ -185,21 +179,17 @@ static int init_dev_data(void)
185 179
 
186 180
 	dev_buffers_p = bus_to_virt(tmp);
187 181
 	memreg_size = (__u32) (&memreg_size) - (__u32) dev_buffers_p;
188
-	tprintf("src_buf=%p, dev_buffers_p=%p, memreg_size=0x%lx", src_buf,
182
+	tprintf("src_buf=0x%lx, dev_buffers_p=0x%lx, memreg_size=0x%x", src_buf,
189 183
 		dev_buffers_p, memreg_size);
190 184
 
191
-	tprintf("inprm: va=%p, pa=0x%lx", dev_buffers_p->inprm_buf,
185
+	tprintf("inprm: va=0x%lx, pa=0x%lx", dev_buffers_p->inprm_buf,
192 186
 		virt_to_bus(dev_buffers_p->inprm_buf));
193
-	tprintf("outprm: va=%p, pa=0x%lx", dev_buffers_p->outprm_buf,
187
+	tprintf("outprm: va=0x%lx, pa=0x%lx", dev_buffers_p->outprm_buf,
194 188
 		virt_to_bus(dev_buffers_p->outprm_buf));
195 189
 
196
-	userptr_t lotsofmem = umalloc ( reserve_size * 2 );
197
-	if ( ! lotsofmem ) {
198
-		printf ( "Could not allocate large memblock\n" );
199
-		return -1;
200
-	}
201
-	phys_mem.base = ( ( user_to_phys ( lotsofmem, 0 ) + reserve_size ) &
202
-			  ~( reserve_size - 1 ) );
190
+	phys_mem.base =
191
+	    (virt_to_phys(_text) - reserve_size) & (~(reserve_size - 1));
192
+
203 193
 	phys_mem.offset = 0;
204 194
 
205 195
 	return 0;
@@ -333,13 +323,9 @@ static void prep_sw2hw_mpt_buf(void *buf, __u32 mkey)
333 323
 	INS_FLD(1, buf, arbelprm_mpt_st, r_w);
334 324
 	INS_FLD(mkey, buf, arbelprm_mpt_st, mem_key);
335 325
 	INS_FLD(GLOBAL_PD, buf, arbelprm_mpt_st, pd);
336
-	//	INS_FLD(virt_to_bus(dev_buffers_p), buf, arbelprm_mpt_st,
337
-	//		start_address_l);
338
-	//	INS_FLD(memreg_size, buf, arbelprm_mpt_st, reg_wnd_len_l);
339
-	INS_FLD(0, buf, arbelprm_mpt_st, start_address_l);
340
-	INS_FLD(0, buf, arbelprm_mpt_st, start_address_h);
341
-	INS_FLD(0xffffffffUL, buf, arbelprm_mpt_st, reg_wnd_len_l);
342
-	INS_FLD(0xffffffffUL, buf, arbelprm_mpt_st, reg_wnd_len_h);
326
+	INS_FLD(virt_to_bus(dev_buffers_p), buf, arbelprm_mpt_st,
327
+		start_address_l);
328
+	INS_FLD(memreg_size, buf, arbelprm_mpt_st, reg_wnd_len_l);
343 329
 }
344 330
 
345 331
 static void prep_sw2hw_eq_buf(void *buf, struct eqe_t *eq_buf)
@@ -675,9 +661,9 @@ static int setup_hca(__u8 port, void **eq_p)
675 661
 		tprintf("fw_rev_major=%d", qfw.fw_rev_major);
676 662
 		tprintf("fw_rev_minor=%d", qfw.fw_rev_minor);
677 663
 		tprintf("fw_rev_subminor=%d", qfw.fw_rev_subminor);
678
-		tprintf("error_buf_start_h=0x%lx", qfw.error_buf_start_h);
679
-		tprintf("error_buf_start_l=0x%lx", qfw.error_buf_start_l);
680
-		tprintf("error_buf_size=%ld", qfw.error_buf_size);
664
+		tprintf("error_buf_start_h=0x%x", qfw.error_buf_start_h);
665
+		tprintf("error_buf_start_l=0x%x", qfw.error_buf_start_l);
666
+		tprintf("error_buf_size=%d", qfw.error_buf_size);
681 667
 	}
682 668
 
683 669
 
@@ -758,20 +744,17 @@ static int setup_hca(__u8 port, void **eq_p)
758 744
 	tmp = get_req_icm_pages(dev_lim.log2_rsvd_qps,
759 745
 				MAX_APP_QPS,
760 746
 				dev_lim.qpc_entry_sz, &log2_entries);
761
-	DBG ( "qpc_base_addr_l = %lx\n", icm_start );
762 747
 	init_hca.qpc_base_addr_l = icm_start;
763 748
 	init_hca.log_num_of_qp = log2_entries;
764 749
 	icm_start += (tmp << 12);
765 750
 	icm_size += (tmp << 12);
766 751
 
767
-	DBG ( "eqpc_base_addr_l = %lx\n", icm_start );
768 752
 	init_hca.eqpc_base_addr_l = icm_start;
769 753
 	icm_start += (tmp << 12);
770 754
 	icm_size += (tmp << 12);
771 755
 
772 756
 	tmp = get_req_icm_pages(dev_lim.log2_rsvd_srqs,
773 757
 				0, dev_lim.srq_entry_sz, &log2_entries);
774
-	DBG ( "srqc_base_addr_l = %lx\n", icm_start );
775 758
 	init_hca.srqc_base_addr_l = icm_start;
776 759
 	init_hca.log_num_of_srq = log2_entries;
777 760
 	icm_start += (tmp << 12);
@@ -779,18 +762,15 @@ static int setup_hca(__u8 port, void **eq_p)
779 762
 
780 763
 	tmp = get_req_icm_pages(dev_lim.log2_rsvd_ees,
781 764
 				0, dev_lim.eec_entry_sz, &log2_entries);
782
-	DBG ( "eec_base_addr_l = %lx\n", icm_start );
783 765
 	init_hca.eec_base_addr_l = icm_start;
784 766
 	init_hca.log_num_of_ee = log2_entries;
785 767
 	icm_start += (tmp << 12);
786 768
 	icm_size += (tmp << 12);
787 769
 
788
-	DBG ( "eeec_base_addr_l = %lx\n", icm_start );
789 770
 	init_hca.eeec_base_addr_l = icm_start;
790 771
 	icm_start += (tmp << 12);
791 772
 	icm_size += (tmp << 12);
792 773
 
793
-	DBG ( "cqc_base_addr_l = %lx\n", icm_start );
794 774
 	tmp = get_req_icm_pages(dev_lim.log2_rsvd_cqs,
795 775
 				MAX_APP_CQS,
796 776
 				dev_lim.cqc_entry_sz, &log2_entries);
@@ -801,35 +781,29 @@ static int setup_hca(__u8 port, void **eq_p)
801 781
 
802 782
 	tmp = get_req_icm_pages(dev_lim.log2_rsvd_mtts,
803 783
 				0, dev_lim.mtt_entry_sz, &log2_entries);
804
-	DBG ( "mtt_base_addr_l = %lx\n", icm_start );
805 784
 	init_hca.mtt_base_addr_l = icm_start;
806 785
 	icm_start += (tmp << 12);
807 786
 	icm_size += (tmp << 12);
808 787
 
809 788
 	tmp = get_req_icm_pages(dev_lim.log2_rsvd_mrws,
810 789
 				1, dev_lim.mpt_entry_sz, &log2_entries);
811
-	DBG ( "mpt_base_addr_l = %lx\n", icm_start );
812 790
 	init_hca.mpt_base_addr_l = icm_start;
813 791
 	init_hca.log_mpt_sz = log2_entries;
814
-	DBG ( "log2_entries for mpt = %ld\n", log2_entries );
815 792
 	icm_start += (tmp << 12);
816 793
 	icm_size += (tmp << 12);
817 794
 
818 795
 	tmp = get_req_icm_pages(dev_lim.log2_rsvd_rdbs, 1, 32,	/* size of rdb entry */
819 796
 				&log2_entries);
820
-	DBG ( "rdb_base_addr_l = %lx\n", icm_start );
821 797
 	init_hca.rdb_base_addr_l = icm_start;
822 798
 	icm_start += (tmp << 12);
823 799
 	icm_size += (tmp << 12);
824 800
 
825
-	DBG ( "eqc_base_addr_l = %lx\n", icm_start );
826 801
 	init_hca.eqc_base_addr_l = icm_start;
827 802
 	init_hca.log_num_of_eq = LOG2_EQS;
828 803
 	tmp = dev_lim.eqc_entry_sz * (1 << LOG2_EQS);
829 804
 	icm_start += tmp;
830 805
 	icm_size += tmp;
831 806
 
832
-	DBG ( "mc_base_addr_l = %lx\n", icm_start );
833 807
 	init_hca.mc_base_addr_l = icm_start;
834 808
 	init_hca.log_mc_table_entry_sz =
835 809
 	    my_log2(MT_STRUCT_SIZE(arbelprm_mgm_entry_st));
@@ -840,8 +814,6 @@ static int setup_hca(__u8 port, void **eq_p)
840 814
 	icm_start +=
841 815
 	    (MT_STRUCT_SIZE(arbelprm_mgm_entry_st) * init_hca.mc_table_hash_sz);
842 816
 
843
-	DBG ( "icm_size = %lx\n", icm_size );
844
-
845 817
 	rc = cmd_set_icm_size(icm_size, &aux_pages);
846 818
 	if (rc) {
847 819
 		ret = -1;
@@ -864,7 +836,7 @@ static int setup_hca(__u8 port, void **eq_p)
864 836
 	uar_context_pa = phys_mem.base + phys_mem.offset +
865 837
 	    dev_ib_data.uar_idx * 4096;
866 838
 	uar_context_va = phys_to_virt(uar_context_pa);
867
-	tprintf("uar_context: va=%p, pa=0x%lx", uar_context_va,
839
+	tprintf("uar_context: va=0x%lx, pa=0x%lx", uar_context_va,
868 840
 		uar_context_pa);
869 841
 	dev_ib_data.uar_context_base = uar_context_va;
870 842
 
@@ -878,12 +850,10 @@ static int setup_hca(__u8 port, void **eq_p)
878 850
 		eprintf("");
879 851
 		goto undo_map_fa;
880 852
 	}
881
-	icm_map_obj = map_obj;
882
-
883 853
 	phys_mem.offset += (1 << (map_obj.vpm_arr[0].log2_size + 12));
884 854
 
885 855
 	init_hca.log_max_uars = log_max_uars;
886
-	tprintf("inprm: va=%p, pa=0x%lx", inprm, virt_to_bus(inprm));
856
+	tprintf("inprm: va=0x%lx, pa=0x%lx", inprm, virt_to_bus(inprm));
887 857
 	prep_init_hca_buf(&init_hca, inprm);
888 858
 	rc = cmd_init_hca(inprm, MT_STRUCT_SIZE(arbelprm_init_hca_st));
889 859
 	if (rc) {
@@ -1008,30 +978,6 @@ static int setup_hca(__u8 port, void **eq_p)
1008 978
 	return ret;
1009 979
 }
1010 980
 
1011
-
1012
-static int unset_hca(void)
1013
-{
1014
-	int rc, ret = 0;
1015
-
1016
-	rc = cmd_unmap_icm(&icm_map_obj);
1017
-	if (rc)
1018
-		eprintf("");
1019
-	ret |= rc;
1020
-
1021
-
1022
-	rc = cmd_unmap_icm_aux();
1023
-	if (rc)
1024
-		eprintf("");
1025
-	ret |= rc;
1026
-
1027
-	rc = cmd_unmap_fa();
1028
-	if (rc)
1029
-		eprintf("");
1030
-	ret |= rc;
1031
-
1032
-	return ret;
1033
-}
1034
-
1035 981
 static void *get_inprm_buf(void)
1036 982
 {
1037 983
 	return dev_buffers_p->inprm_buf;
@@ -1140,14 +1086,9 @@ static int post_send_req(void *qph, void *wqeh, __u8 num_gather)
1140 1086
 	struct send_doorbell_st dbell;
1141 1087
 	__u32 nds;
1142 1088
 
1143
-	DBG ( "Work queue entry:\n" );
1144
-	DBG_HD ( snd_wqe, sizeof ( *snd_wqe ) );
1145
-
1146 1089
 	qp->post_send_counter++;
1147 1090
 
1148 1091
 	WRITE_WORD_VOL(qp->send_uar_context, 2, htons(qp->post_send_counter));
1149
-	DBG ( "Doorbell record:\n" );
1150
-	DBG_HD ( qp->send_uar_context, 8 );
1151 1092
 
1152 1093
 	memset(&dbell, 0, sizeof dbell);
1153 1094
 	INS_FLD(XDEV_NOPCODE_SEND, &dbell, arbelprm_send_doorbell_st, nopcode);
@@ -1171,10 +1112,6 @@ static int post_send_req(void *qph, void *wqeh, __u8 num_gather)
1171 1112
 		INS_FLD_TO_BE(XDEV_NOPCODE_SEND,
1172 1113
 			      &qp->last_posted_snd_wqe->next.next,
1173 1114
 			      arbelprm_wqe_segment_next_st, nopcode);
1174
-
1175
-		DBG ( "Previous work queue entry's next field:\n" );
1176
-		DBG_HD ( &qp->last_posted_snd_wqe->next.next,
1177
-			 sizeof ( qp->last_posted_snd_wqe->next.next ) );
1178 1115
 	}
1179 1116
 
1180 1117
 	rc = cmd_post_doorbell(&dbell, POST_SND_OFFSET);
@@ -1195,8 +1132,6 @@ static int create_mads_qp(void **qp_pp, void **snd_cq_pp, void **rcv_cq_pp)
1195 1132
 	__u8 nds;
1196 1133
 	void *ptr;
1197 1134
 
1198
-	DBG ( "*** Creating MADS queue pair ***\n" );
1199
-
1200 1135
 	qp = &dev_ib_data.mads_qp;
1201 1136
 
1202 1137
 	/* set the pointer to the receive WQEs buffer */
@@ -1307,8 +1242,6 @@ static int create_mads_qp(void **qp_pp, void **snd_cq_pp, void **rcv_cq_pp)
1307 1242
 		*rcv_cq_pp = &qp->rcv_cq;
1308 1243
 	}
1309 1244
 
1310
-	DBG ( "*** Created MADS queue pair ***\n" );
1311
-
1312 1245
 	return rc;
1313 1246
 }
1314 1247
 
@@ -1322,8 +1255,6 @@ static int create_ipoib_qp(void **qp_pp,
1322 1255
 	__u8 nds;
1323 1256
 	void *ptr;
1324 1257
 
1325
-	DBG ( "*** Creating IPoIB queue pair ***\n" );
1326
-
1327 1258
 	qp = &dev_ib_data.ipoib_qp;
1328 1259
 
1329 1260
 	/* set the pointer to the receive WQEs buffer */
@@ -1333,7 +1264,7 @@ static int create_ipoib_qp(void **qp_pp,
1333 1264
 	qp->rcv_buf_sz = IPOIB_RCV_BUF_SZ;
1334 1265
 
1335 1266
 	qp->max_recv_wqes = NUM_IPOIB_RCV_WQES;
1336
-	qp->recv_wqe_cur_free = 0; //NUM_IPOIB_RCV_WQES;
1267
+	qp->recv_wqe_cur_free = NUM_IPOIB_RCV_WQES;
1337 1268
 
1338 1269
 	qp->rcv_uar_context =
1339 1270
 	    dev_ib_data.uar_context_base + 8 * IPOIB_RCV_QP_DB_IDX;
@@ -1429,8 +1360,6 @@ static int create_ipoib_qp(void **qp_pp,
1429 1360
 		*rcv_cq_pp = &qp->rcv_cq;
1430 1361
 	}
1431 1362
 
1432
-	DBG ( "*** Created IPoIB queue pair ***\n" );
1433
-
1434 1363
 	return rc;
1435 1364
 }
1436 1365
 
@@ -1451,8 +1380,6 @@ static int create_udqp(struct udqp_st *qp)
1451 1380
 	qp->snd_cq.ci_db_ctx_pointer =
1452 1381
 	    dev_ib_data.uar_context_base + 8 * qp->snd_cq.ci_db_ctx_idx;
1453 1382
 
1454
-	DBG ( "* Creating send CQ *\n" );
1455
-
1456 1383
 	/* create send CQ */
1457 1384
 	init_cq_buf(qp->snd_cq.cq_buf, qp->snd_cq.num_cqes);
1458 1385
 	qp->snd_cq.cons_counter = 0;
@@ -1469,8 +1396,6 @@ static int create_udqp(struct udqp_st *qp)
1469 1396
 		goto exit;
1470 1397
 	}
1471 1398
 
1472
-	DBG ( "* Creating receive CQ *\n" );
1473
-
1474 1399
 	/* create receive CQ */
1475 1400
 	init_cq_buf(qp->rcv_cq.cq_buf, qp->rcv_cq.num_cqes);
1476 1401
 	qp->rcv_cq.cons_counter = 0;
@@ -1488,8 +1413,6 @@ static int create_udqp(struct udqp_st *qp)
1488 1413
 		goto undo_snd_cq;
1489 1414
 	}
1490 1415
 
1491
-	DBG ( "* Creating QP *\n" );
1492
-
1493 1416
 	prep_rst2init_qpee_buf(inprm,
1494 1417
 			       qp->snd_cq.cqn,
1495 1418
 			       qp->rcv_cq.cqn,
@@ -1627,15 +1550,6 @@ static void prep_send_wqe_buf(void *qph,
1627 1550
 		len += offset;
1628 1551
 	}
1629 1552
 	snd_wqe->mpointer[0].byte_count = cpu_to_be32(len);
1630
-
1631
-#if 0
1632
-	DBG ( "prep_send_wqe_buf()\n" );
1633
-	DBG ( "snd_wqe:\n" );
1634
-	DBG_HD ( snd_wqe, sizeof ( *snd_wqe ) );
1635
-	DBG ( "packet:\n" );
1636
-	DBG_HD ( bus_to_virt(be32_to_cpu(snd_wqe->mpointer[0].local_addr_l)),
1637
-		 len );
1638
-#endif
1639 1553
 }
1640 1554
 
1641 1555
 static void *alloc_ud_av(void)
@@ -1744,7 +1658,7 @@ static void dev2ib_cqe(struct ib_cqe_st *ib_cqe_p, union cqe_st *cqe_p)
1744 1658
 		   byte_cnt);
1745 1659
 }
1746 1660
 
1747
-static int ib_poll_cqx(void *cqh, struct ib_cqe_st *ib_cqe_p, u8 * num_cqes)
1661
+static int ib_poll_cq(void *cqh, struct ib_cqe_st *ib_cqe_p, u8 * num_cqes)
1748 1662
 {
1749 1663
 	int rc;
1750 1664
 	union cqe_st cqe;
@@ -1776,7 +1690,7 @@ static int ib_poll_cqx(void *cqh, struct ib_cqe_st *ib_cqe_p, u8 * num_cqes)
1776 1690
 		eprintf("vendor_syndrome=0x%lx",
1777 1691
 			EX_FLD(cqe.error_cqe, arbelprm_completion_with_error_st,
1778 1692
 			       vendor_code));
1779
-		eprintf("wqe_addr=%p", wqe_p);
1693
+		eprintf("wqe_addr=0x%lx", wqe_p);
1780 1694
 		eprintf("myqpn=0x%lx",
1781 1695
 			EX_FLD(cqe.error_cqe, arbelprm_completion_with_error_st,
1782 1696
 			       myqpn));
@@ -2006,9 +1920,6 @@ static void dev_post_dbell(void *dbell, __u32 offset)
2006 1920
 	address = (unsigned long)(memfree_pci_dev.uar) + offset;
2007 1921
 	tprintf("va=0x%lx pa=0x%lx", address,
2008 1922
 		virt_to_bus((const void *)address));
2009
-	DBG ( "dev_post_dbell %08lx:%08lx to %lx\n",
2010
-	      htonl ( ptr[0] ), htonl ( ptr[1] ),
2011
-	      virt_to_phys ( memfree_pci_dev.uar + offset ) );
2012 1923
 	writel(htonl(ptr[0]), memfree_pci_dev.uar + offset);
2013 1924
 	barrier();
2014 1925
 	address += 4;

+ 62
- 6
src/drivers/net/mlx_ipoib/ipoib.c 查看文件

@@ -357,12 +357,52 @@ static void modify_dhcp_resp(void *buf, __u16 size)
357 357
 	modify_udp_csum(buf, size);
358 358
 }
359 359
 
360
+static void get_my_client_id(__u8 * my_client_id)
361
+{
362
+
363
+	my_client_id[0] = 0;
364
+	qpn2buf(ipoib_data.ipoib_qpn, my_client_id + 1);
365
+	memcpy(my_client_id + 4, ipoib_data.port_gid_raw, 16);
366
+}
367
+
368
+static const __u8 *get_client_id(const void *buf, int len)
369
+{
370
+	const __u8 *ptr;
371
+	int delta;
372
+
373
+	if (len < 268)
374
+		return NULL;
375
+
376
+	/* pointer to just after magic cookie */
377
+	ptr = (const __u8 *)buf + 268;
378
+
379
+	/* find last client identifier option */
380
+	do {
381
+		if (ptr[0] == 255) {
382
+			/* found end of options list */
383
+			return NULL;
384
+		}
385
+
386
+		if (ptr[0] == 0x3d) {
387
+			/* client identifer option */
388
+			return ptr + 3;
389
+		}
390
+
391
+		delta = ptr[1] + 2;
392
+		ptr += delta;
393
+		len -= delta;
394
+	} while (len > 0);
395
+
396
+	return NULL;
397
+}
398
+
360 399
 static int handle_ipv4_packet(void *buf, void **out_buf_p,
361 400
 			      unsigned int *new_size_p, int *is_bcast_p)
362 401
 {
363 402
 	void *new_buf;
364 403
 	__u16 new_size;
365 404
 	__u8 msg_type;
405
+	__u8 my_client_id[20];
366 406
 
367 407
 	new_buf = (void *)(((__u8 *) buf) + 4);
368 408
 	new_size = (*new_size_p) - 4;
@@ -371,6 +411,7 @@ static int handle_ipv4_packet(void *buf, void **out_buf_p,
371 411
 
372 412
 	if (get_ip_protocl(new_buf) == IP_PROT_UDP) {
373 413
 		__u16 udp_dst_port;
414
+		const __u8 *client_id;
374 415
 
375 416
 		udp_dst_port = get_udp_dst_port(new_buf);
376 417
 
@@ -379,6 +420,22 @@ static int handle_ipv4_packet(void *buf, void **out_buf_p,
379 420
 			*out_buf_p = 0;
380 421
 			return 0;
381 422
 		}
423
+
424
+		if (udp_dst_port == 68) {
425
+			get_my_client_id(my_client_id);
426
+
427
+			/* packet client id */
428
+			client_id = get_client_id(new_buf, new_size);
429
+			if (!client_id) {
430
+				*out_buf_p = 0;
431
+				return 0;
432
+			}
433
+
434
+			if (memcmp(client_id, my_client_id, 20)) {
435
+				*out_buf_p = 0;
436
+				return 0;
437
+			}
438
+		}
382 439
 	}
383 440
 
384 441
 	msg_type = get_dhcp_msg_type(new_buf);
@@ -458,9 +515,8 @@ static int ipoib_handle_rcv(void *buf, void **out_buf_p,
458 515
 		rc = handle_ipv4_packet(buf, out_buf_p, new_size_p, is_bcast_p);
459 516
 		return rc;
460 517
 	}
461
-	tprintf("prot=0x%x", prot_type);
462
-    *out_buf_p = NULL;
463
-	return 0;
518
+	eprintf("prot=0x%x", prot_type);
519
+	return -1;
464 520
 }
465 521
 
466 522
 static int is_null_mac(const __u8 * mac)
@@ -879,7 +935,7 @@ static int ipoib_read_packet(__u16 * prot_p, void *data, unsigned int *size_p,
879 935
 	void *buf, *out_buf;
880 936
 	__u16 prot_type;
881 937
 
882
-	rc = ib_poll_cqx(ipoib_data.rcv_cqh, &ib_cqe, &num_cqes);
938
+	rc = ib_poll_cq(ipoib_data.rcv_cqh, &ib_cqe, &num_cqes);
883 939
 	if (rc) {
884 940
 		return rc;
885 941
 	}
@@ -897,7 +953,7 @@ static int ipoib_read_packet(__u16 * prot_p, void *data, unsigned int *size_p,
897 953
 
898 954
 	new_size = ib_cqe.count - GRH_SIZE;
899 955
 	buf = get_rcv_wqe_buf(ib_cqe.wqe, 1);
900
-	tprintf("buf=%p", buf);
956
+	tprintf("buf=%lx", buf);
901 957
 	rc = ipoib_handle_rcv(buf, &out_buf, &new_size, is_bcast_p);
902 958
 	if (rc) {
903 959
 		eprintf("");
@@ -944,7 +1000,7 @@ static int ipoib_init(struct pci_device *pci)
944 1000
 	ipoib_data.ipoib_qpn = ib_get_qpn(qph);
945 1001
 
946 1002
 	if(print_info)
947
-		printf("local ipoib qpn=0x%lx\n", ipoib_data.ipoib_qpn);
1003
+		printf("local ipoib qpn=0x%x\n", ipoib_data.ipoib_qpn);
948 1004
 
949 1005
 	ipoib_data.bcast_av = ib_data.bcast_av;
950 1006
 	ipoib_data.port_gid_raw = ib_data.port_gid.raw;

+ 21
- 16
src/drivers/net/mlx_ipoib/mt23108.c 查看文件

@@ -14,6 +14,10 @@ Skeleton NIC driver for Etherboot
14 14
 #include "etherboot.h"
15 15
 /* to get the interface to the body of the program */
16 16
 #include "nic.h"
17
+/* to get the PCI support functions, if this is a PCI NIC */
18
+#include <gpxe/pci.h>
19
+/* to get the ISA support functions, if this is an ISA NIC */
20
+#include <gpxe/isa.h>
17 21
 
18 22
 #include "mt_version.c"
19 23
 #include "mt23108_imp.c"
@@ -148,7 +152,7 @@ static void tavor_transmit(struct nic *nic, const char *dest,	/* Destination */
148 152
 /**************************************************************************
149 153
 DISABLE - Turn off ethernet interface
150 154
 ***************************************************************************/
151
-static void tavor_disable(struct nic *nic)
155
+static void tavor_disable(struct dev *dev)
152 156
 {
153 157
 	/* put the card in its initial state */
154 158
 	/* This function serves 3 purposes.
@@ -160,24 +164,18 @@ static void tavor_disable(struct nic *nic)
160 164
 	 * This allows etherboot to reinitialize the interface
161 165
 	 *  if something is something goes wrong.
162 166
 	 */
163
-	if (nic || 1) {		// ????
167
+	if (dev || 1) {		// ????
164 168
 		disable_imp();
165 169
 	}
166 170
 }
167 171
 
168
-static struct nic_operations tavor_operations = {
169
-	.connect	= dummy_connect,
170
-	.poll		= tavor_poll,
171
-	.transmit	= tavor_transmit,
172
-	.irq		= tavor_irq,
173
-};
174
-
175 172
 /**************************************************************************
176 173
 PROBE - Look for an adapter, this routine's visible to the outside
177 174
 ***************************************************************************/
178 175
 
179
-static int tavor_probe(struct nic *nic, struct pci_device *pci)
176
+static int tavor_probe(struct dev *dev, struct pci_device *pci)
180 177
 {
178
+	struct nic *nic = (struct nic *)dev;
181 179
 	int rc;
182 180
 	unsigned char user_request;
183 181
 
@@ -221,7 +219,10 @@ static int tavor_probe(struct nic *nic, struct pci_device *pci)
221 219
 		nic->ioaddr = pci->ioaddr & ~3;
222 220
 		nic->irqno = pci->irq;
223 221
 		/* point to NIC specific routines */
224
-		nic->nic_op = &tavor_operations;
222
+		dev->disable = tavor_disable;
223
+		nic->poll = tavor_poll;
224
+		nic->transmit = tavor_transmit;
225
+		nic->irq = tavor_irq;
225 226
 
226 227
 		return 1;
227 228
 	}
@@ -229,12 +230,16 @@ static int tavor_probe(struct nic *nic, struct pci_device *pci)
229 230
 	return 0;
230 231
 }
231 232
 
232
-static struct pci_device_id tavor_nics[] = {
233
+static struct pci_id tavor_nics[] = {
233 234
 	PCI_ROM(0x15b3, 0x5a44, "MT23108", "MT23108 HCA driver"),
234 235
 	PCI_ROM(0x15b3, 0x6278, "MT25208", "MT25208 HCA driver"),
235 236
 };
236 237
 
237
-PCI_DRIVER ( tavor_driver, tavor_nics, PCI_NO_CLASS );
238
-
239
-DRIVER ( "MT23108/MT25208", nic_driver, pci_driver, tavor_driver,
240
-	 tavor_probe, tavor_disable );
238
+struct pci_driver tavor_driver __pci_driver = {
239
+	.type = NIC_DRIVER,
240
+	.name = "MT23108/MT25208",
241
+	.probe = tavor_probe,
242
+	.ids = tavor_nics,
243
+	.id_count = sizeof(tavor_nics) / sizeof(tavor_nics[0]),
244
+	.class = 0,
245
+};

+ 1
- 5
src/drivers/net/mlx_ipoib/mt23108_imp.c 查看文件

@@ -91,12 +91,10 @@ static int transmit_imp(const char *dest,	/* Destination */
91 91
 	rc = ipoib_send_packet(dest, type, packet, size);
92 92
 	if (rc) {
93 93
 		printf("*** ERROR IN SEND FLOW ***\n");
94
-#if 0
95 94
 		printf("restarting Etherboot\n");
96 95
 		sleep(1);
97 96
 		longjmp(restart_etherboot, -1);
98 97
 		/* we should not be here ... */
99
-#endif
100 98
 		return -1; 
101 99
 	}
102 100
 
@@ -108,7 +106,7 @@ static void hd(void *where, int n)
108 106
 	int i;
109 107
 
110 108
 	while (n > 0) {
111
-		printf("%p ", where);
109
+		printf("%X ", where);
112 110
 		for (i = 0; i < ((n > 16) ? 16 : n); i++)
113 111
 			printf(" %hhX", ((char *)where)[i]);
114 112
 		printf("\n");
@@ -224,11 +222,9 @@ static int poll_imp(struct nic *nic, int retrieve, unsigned int *size_p)
224 222
 
225 223
 fatal_handling:
226 224
 	printf("restarting Etherboot\n");
227
-#if 0
228 225
 	sleep(1);
229 226
 	longjmp(restart_etherboot, -1);
230 227
 	/* we should not be here ... */
231
-#endif
232 228
 	return -1; 
233 229
 	
234 230
 }

+ 176
- 2091
src/drivers/net/mlx_ipoib/mt25218.c
文件差异内容过多而无法显示
查看文件


+ 15
- 35
src/drivers/net/mlx_ipoib/mt25218.h 查看文件

@@ -26,9 +26,7 @@
26 26
 #define MEMFREE_CMD_RUN_FW			0xff6
27 27
 #define MEMFREE_CMD_SET_ICM_SIZE	0xffd
28 28
 #define MEMFREE_CMD_MAP_ICM_AUX		0xffc
29
-#define MEMFREE_CMD_UNMAP_ICM_AUX		0xffb
30 29
 #define MEMFREE_CMD_MAP_ICM			0xffa
31
-#define MEMFREE_CMD_UNMAP_ICM			0xff9
32 30
 #define MEMFREE_CMD_QUERY_DEV_LIM   0x003
33 31
 
34 32
 /*
@@ -146,24 +144,24 @@
146 144
 
147 145
 /* uar context indexes */
148 146
 enum {
149
-	MADS_SND_CQ_ARM_DB_IDX = MADS_SND_CQN_SN,
150
-	MADS_RCV_CQ_ARM_DB_IDX = MADS_RCV_CQN_SN,
151
-	IPOIB_SND_CQ_ARM_DB_IDX = IPOIB_SND_CQN_SN,
152
-	IPOIB_RCV_CQ_ARM_DB_IDX = IPOIB_RCV_CQN_SN,
153
-	MADS_SND_QP_DB_IDX = ( MAX_APP_CQS + MADS_QPN_SN ),
154
-	IPOIB_SND_QP_DB_IDX = ( MAX_APP_CQS + IPOIB_QPN_SN ),
155
-	GROUP_SEP_IDX = ( MAX_APP_CQS + MAX_APP_QPS ),
156
-	//	START_UNMAPPED_DB_IDX,
147
+	MADS_RCV_CQ_ARM_DB_IDX,
148
+	MADS_SND_CQ_ARM_DB_IDX,
149
+	IPOIB_RCV_CQ_ARM_DB_IDX,
150
+	IPOIB_SND_CQ_ARM_DB_IDX,
151
+	MADS_SND_QP_DB_IDX,
152
+	IPOIB_SND_QP_DB_IDX,
153
+	GROUP_SEP_IDX,
154
+	START_UNMAPPED_DB_IDX,
157 155
 	/* --------------------------
158 156
 	   unmapped doorbell records
159 157
 	   -------------------------- */
160
-	//	END_UNMAPPED_DB_IDX,
161
-	IPOIB_RCV_QP_DB_IDX = ( 512 - MAX_APP_CQS - IPOIB_QPN_SN - 1 ),
162
-	MADS_RCV_QP_DB_IDX = ( 512 - MAX_APP_CQS - MADS_QPN_SN - 1 ),
163
-	IPOIB_RCV_CQ_CI_DB_IDX = ( 512 - IPOIB_RCV_CQN_SN - 1 ),
164
-	IPOIB_SND_CQ_CI_DB_IDX = ( 512 - IPOIB_SND_CQN_SN - 1 ),
165
-	MADS_RCV_CQ_CI_DB_IDX = ( 512 - MADS_RCV_CQN_SN - 1 ),
166
-	MADS_SND_CQ_CI_DB_IDX = ( 512 - MADS_SND_CQN_SN - 1 ),
158
+	END_UNMAPPED_DB_IDX = 505,
159
+	MADS_RCV_QP_DB_IDX = 506,
160
+	IPOIB_RCV_QP_DB_IDX = 507,
161
+	MADS_RCV_CQ_CI_DB_IDX = 508,
162
+	MADS_SND_CQ_CI_DB_IDX = 509,
163
+	IPOIB_RCV_CQ_CI_DB_IDX = 510,
164
+	IPOIB_SND_CQ_CI_DB_IDX = 511
167 165
 };
168 166
 
169 167
 /* uar resources types */
@@ -342,24 +340,6 @@ struct cq_dbell_st {
342 340
 	__u8 raw[MT_STRUCT_SIZE(arbelprm_cq_cmd_doorbell_st)];
343 341
 } __attribute__ ((packed));
344 342
 
345
-struct qp_db_record_st {
346
-	__u8 raw[MT_STRUCT_SIZE(arbelprm_qp_db_record_st)];
347
-} __attribute__ ((packed));
348
-
349
-struct cq_arm_db_record_st {
350
-	__u8 raw[MT_STRUCT_SIZE(arbelprm_cq_arm_db_record_st)];
351
-} __attribute__ ((packed));
352
-
353
-struct cq_ci_db_record_st {
354
-	__u8 raw[MT_STRUCT_SIZE(arbelprm_cq_ci_db_record_st)];
355
-} __attribute__ ((packed));
356
-
357
-union db_record_st {
358
-	struct qp_db_record_st qp;
359
-	struct cq_arm_db_record_st cq_arm;
360
-	struct cq_ci_db_record_st cq_ci;
361
-} __attribute__ ((packed));
362
-
363 343
 struct mad_ifc_inprm_st {
364 344
 	union mad_u mad;
365 345
 } __attribute__ ((packed));

+ 1
- 7
src/drivers/net/mlx_ipoib/mt25218_imp.c 查看文件

@@ -45,7 +45,6 @@ static void be_to_cpu_buf(void *buf, int size)
45 45
 #include "ib_driver.c"
46 46
 #include "ipoib.c"
47 47
 
48
-#if 0
49 48
 static int probe_imp(struct pci_device *pci, struct nic *nic)
50 49
 {
51 50
 	int rc;
@@ -92,12 +91,10 @@ static int transmit_imp(const char *dest,	/* Destination */
92 91
 	rc = ipoib_send_packet(dest, type, packet, size);
93 92
 	if (rc) {
94 93
 		printf("*** ERROR IN SEND FLOW ***\n");
95
-#if 0
96 94
 		printf("restarting Etherboot\n");
97 95
 		sleep(1);
98 96
 		longjmp(restart_etherboot, -1);
99 97
 		/* we should not be here ... */
100
-#endif
101 98
 		return -1; 
102 99
 	}
103 100
 
@@ -109,7 +106,7 @@ static void hd(void *where, int n)
109 106
 	int i;
110 107
 
111 108
 	while (n > 0) {
112
-		printf("%p ", where);
109
+		printf("%X ", where);
113 110
 		for (i = 0; i < ((n > 16) ? 16 : n); i++)
114 111
 			printf(" %hhX", ((char *)where)[i]);
115 112
 		printf("\n");
@@ -224,13 +221,10 @@ static int poll_imp(struct nic *nic, int retrieve, unsigned int *size_p)
224 221
 	return 0;
225 222
 
226 223
 fatal_handling:
227
-#if 0
228 224
 	printf("restarting Etherboot\n");
229 225
 	sleep(1);
230 226
 	longjmp(restart_etherboot, -1);
231 227
 	/* we should not be here ... */
232
-#endif
233 228
 	return -1; 
234 229
 	
235 230
 }
236
-#endif

+ 1
- 1
src/drivers/net/mlx_ipoib/mt_version.c 查看文件

@@ -20,4 +20,4 @@
20 20
 */
21 21
 
22 22
 /* definition of the build version goes here */
23
-const char *build_revision= "191";
23
+const char *build_revision= "113";

+ 14
- 4
src/drivers/net/mlx_ipoib/patches/dhcpd.patch 查看文件

@@ -1,7 +1,17 @@
1
-Index: dhcp-3.0.4b3/includes/site.h
2
-===================================================================
3
---- dhcp-3.0.4b3.orig/includes/site.h	2002-03-12 20:33:39.000000000 +0200
4
-+++ dhcp-3.0.4b3/includes/site.h	2006-03-15 12:50:00.000000000 +0200
1
+diff -ru ../../orig/dhcp-3.0.4b2/common/options.c ./common/options.c
2
+--- ../../orig/dhcp-3.0.4b2/common/options.c	2005-11-02 01:19:03.000000000 +0200
3
++++ ./common/options.c	2005-12-06 14:38:17.000000000 +0200
4
+@@ -537,6 +537,7 @@
5
+ 	priority_list [priority_len++] = DHO_DHCP_LEASE_TIME;
6
+ 	priority_list [priority_len++] = DHO_DHCP_MESSAGE;
7
+ 	priority_list [priority_len++] = DHO_DHCP_REQUESTED_ADDRESS;
8
++	priority_list [priority_len++] = DHO_DHCP_CLIENT_IDENTIFIER;
9
+ 	priority_list [priority_len++] = DHO_FQDN;
10
+ 
11
+ 	if (prl && prl -> len > 0) {
12
+diff -ru ../../orig/dhcp-3.0.4b2/includes/site.h ./includes/site.h
13
+--- ../../orig/dhcp-3.0.4b2/includes/site.h	2002-03-12 20:33:39.000000000 +0200
14
++++ ./includes/site.h	2005-12-06 14:36:55.000000000 +0200
5 15
 @@ -135,7 +135,7 @@
6 16
     the aforementioned problems do not matter to you, or if no other
7 17
     API is supported for your system, you may want to go with it. */

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