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@@ -206,7 +206,7 @@ static s32 e1000e_init_phy_params_pchlan(struct e1000_hw *hw)
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206
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206
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e1000e_get_phy_id(hw);
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207
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207
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phy->type = e1000e_get_phy_type_from_id(phy->id);
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208
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208
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209
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- if (phy->type == e1000_phy_82577) {
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209
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+ if (phy->type == e1000_phy_82577 || phy->type == e1000_phy_82579) {
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210
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210
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phy->ops.check_polarity = e1000e_check_polarity_82577;
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211
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211
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#if 0
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212
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212
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phy->ops.force_speed_duplex =
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@@ -449,6 +449,7 @@ static s32 e1000e_init_mac_params_ich8lan(struct e1000_hw *hw)
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449
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449
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mac->ops.led_off = e1000e_led_off_ich8lan;
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450
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450
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break;
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451
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451
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case e1000_pchlan:
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452
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+ case e1000_pch2lan:
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452
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453
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/* ID LED init */
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453
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454
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mac->ops.id_led_init = e1000e_id_led_init_pchlan;
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454
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455
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/* setup LED */
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@@ -467,6 +468,14 @@ static s32 e1000e_init_mac_params_ich8lan(struct e1000_hw *hw)
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467
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468
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if (mac->type == e1000_ich8lan)
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468
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469
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e1000e_set_kmrn_lock_loss_workaround_ich8lan(hw, true);
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469
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470
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|
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471
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+ /* Disable PHY configuration by hardware, config by software */
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472
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+ if (mac->type == e1000_pch2lan) {
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473
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+ u32 extcnf_ctrl = er32(EXTCNF_CTRL);
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474
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+
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475
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+ extcnf_ctrl |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
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476
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+ ew32(EXTCNF_CTRL, extcnf_ctrl);
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477
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+ }
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|
478
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+
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470
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479
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471
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480
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return E1000_SUCCESS;
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472
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481
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}
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@@ -577,6 +586,7 @@ void e1000e_init_function_pointers_ich8lan(struct e1000_hw *hw)
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577
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586
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hw->phy.ops.init_params = e1000e_init_phy_params_ich8lan;
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578
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587
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break;
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579
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588
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case e1000_pchlan:
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589
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+ case e1000_pch2lan:
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580
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590
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hw->phy.ops.init_params = e1000e_init_phy_params_pchlan;
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581
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591
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break;
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582
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592
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default:
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@@ -765,7 +775,8 @@ static s32 e1000e_sw_lcd_config_ich8lan(struct e1000_hw *hw)
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765
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775
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/* Check if SW needs to configure the PHY */
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766
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776
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if ((hw->device_id == E1000_DEV_ID_ICH8_IGP_M_AMT) ||
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767
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777
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(hw->device_id == E1000_DEV_ID_ICH8_IGP_M) ||
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768
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- (hw->mac.type == e1000_pchlan))
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778
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+ (hw->mac.type == e1000_pchlan) ||
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779
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+ (hw->mac.type == e1000_pch2lan))
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769
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780
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sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
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770
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781
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else
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771
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782
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sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG;
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@@ -777,13 +788,15 @@ static s32 e1000e_sw_lcd_config_ich8lan(struct e1000_hw *hw)
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777
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788
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/* Wait for basic configuration completes before proceeding */
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778
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789
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e1000e_lan_init_done_ich8lan(hw);
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779
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790
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780
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- /*
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781
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- * Make sure HW does not configure LCD from PHY
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782
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- * extended configuration before SW configuration
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783
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- */
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784
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- data = er32(EXTCNF_CTRL);
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785
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- if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE)
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786
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- goto out;
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791
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+ if (hw->mac.type != e1000_pch2lan) {
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792
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+ /*
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793
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+ * Make sure HW does not configure LCD from PHY
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794
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+ * extended configuration before SW configuration
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795
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+ */
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796
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+ data = er32(EXTCNF_CTRL);
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797
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+ if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE)
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798
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+ goto out;
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799
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+ }
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787
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800
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788
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801
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cnf_size = er32(EXTCNF_SIZE);
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789
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802
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cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK;
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@@ -795,7 +808,8 @@ static s32 e1000e_sw_lcd_config_ich8lan(struct e1000_hw *hw)
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795
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808
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cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;
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796
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809
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797
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810
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if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) &&
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798
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- (hw->mac.type == e1000_pchlan)) {
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811
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+ (hw->mac.type == e1000_pchlan ||
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812
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+ hw->mac.type == e1000_pch2lan)) {
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799
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813
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/*
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800
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814
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* HW configures the SMBus address and LEDs when the
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801
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815
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* OEM and LCD Write Enable bits are set in the NVM.
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@@ -1006,16 +1020,18 @@ s32 e1000e_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
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1006
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1020
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u32 mac_reg;
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1007
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1021
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u16 oem_reg;
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1008
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1022
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1009
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- if (hw->mac.type != e1000_pchlan)
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1023
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+ if (hw->mac.type != e1000_pchlan && hw->mac.type != e1000_pch2lan)
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1010
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1024
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return ret_val;
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1011
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1025
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1012
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1026
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ret_val = hw->phy.ops.acquire(hw);
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1013
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1027
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if (ret_val)
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1014
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1028
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return ret_val;
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1015
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1029
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1016
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- mac_reg = er32(EXTCNF_CTRL);
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1017
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- if (mac_reg & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE)
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1018
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- goto out;
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1030
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+ if (hw->mac.type != e1000_pch2lan) {
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1031
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+ mac_reg = er32(EXTCNF_CTRL);
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1032
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+ if (mac_reg & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE)
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1033
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+ goto out;
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1034
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+ }
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1019
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1035
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1020
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1036
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mac_reg = er32(FEXTNVM);
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1021
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1037
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if (!(mac_reg & E1000_FEXTNVM_SW_CONFIG_ICH8M))
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@@ -2573,7 +2589,7 @@ static s32 e1000e_reset_hw_ich8lan(struct e1000_hw *hw)
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2573
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2589
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}
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2574
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2590
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}
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2575
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2591
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/* Dummy read to clear the phy wakeup bit after lcd reset */
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2576
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- if (hw->mac.type == e1000_pchlan)
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2592
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+ if (hw->mac.type == e1000_pchlan || hw->mac.type == e1000_pch2lan)
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2577
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2593
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e1e_rphy(hw, BM_WUC, ®);
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2578
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2594
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2579
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2595
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ret_val = e1000e_sw_lcd_config_ich8lan(hw);
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@@ -2791,6 +2807,7 @@ static s32 e1000e_setup_link_ich8lan(struct e1000_hw *hw)
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2791
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2807
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2792
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2808
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ew32(FCTTV, hw->fc.pause_time);
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2793
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2809
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if ((hw->phy.type == e1000_phy_82578) ||
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2810
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+ (hw->phy.type == e1000_phy_82579) ||
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2794
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2811
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(hw->phy.type == e1000_phy_82577)) {
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2795
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2812
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ret_val = e1e_wphy(hw,
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2796
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2813
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PHY_REG(BM_PORT_CTRL_PAGE, 27),
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@@ -2859,6 +2876,7 @@ static s32 e1000e_setup_copper_link_ich8lan(struct e1000_hw *hw)
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2859
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2876
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goto out;
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2860
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2877
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break;
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2861
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2878
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case e1000_phy_82577:
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2879
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+ case e1000_phy_82579:
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2862
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2880
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ret_val = e1000e_copper_link_setup_82577(hw);
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2863
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2881
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if (ret_val)
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2864
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2882
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goto out;
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@@ -3388,6 +3406,7 @@ static void e1000e_clear_hw_cntrs_ich8lan(struct e1000_hw *hw __unused)
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3388
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3406
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3389
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3407
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/* Clear PHY statistics registers */
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3390
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3408
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if ((hw->phy.type == e1000_phy_82578) ||
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3409
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+ (hw->phy.type == e1000_phy_82579) ||
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3391
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3410
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(hw->phy.type == e1000_phy_82577)) {
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3392
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3411
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e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
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3393
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3412
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e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
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@@ -3434,6 +3453,8 @@ static struct pci_device_id e1000e_ich8lan_nics[] = {
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3434
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3453
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PCI_ROM(0x8086, 0x10EB, "E1000_DEV_ID_PCH_M_HV_LC", "E1000_DEV_ID_PCH_M_HV_LC", board_pchlan),
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3435
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3454
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PCI_ROM(0x8086, 0x10EF, "E1000_DEV_ID_PCH_D_HV_DM", "E1000_DEV_ID_PCH_D_HV_DM", board_pchlan),
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3436
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3455
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PCI_ROM(0x8086, 0x10F0, "E1000_DEV_ID_PCH_D_HV_DC", "E1000_DEV_ID_PCH_D_HV_DC", board_pchlan),
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3456
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+ PCI_ROM(0x8086, 0x1502, "E1000_DEV_ID_PCH2_LV_LM", "E1000_DEV_ID_PCH2_LV_LM", board_pch2lan),
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3457
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+ PCI_ROM(0x8086, 0x1503, "E1000_DEV_ID_PCH2_LV_V", "E1000_DEV_ID_PCH2_LV_V", board_pch2lan),
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3437
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3458
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};
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3438
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3459
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3439
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3460
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struct pci_driver e1000e_ich8lan_driver __pci_driver = {
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